3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * Based on original work by
6 * Roel Loeffen, (C) Copyright 2006 Prodrive B.V.
7 * Josh Huber, (C) Copyright 2001 Mission Critical Linux, Inc.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
28 * modifications for the cpci750 by reinhard.arlt@esd-electronics.com
29 * modifications for the P3M750 by roel.loeffen@prodrive.nl
33 * p3m750.c - main board support/init for the Prodrive p3m750/p3m7448.
38 #include "../../Marvell/include/memory.h"
39 #include "../../Marvell/include/pci.h"
40 #include "../../Marvell/include/mv_gen_reg.h"
50 DECLARE_GLOBAL_DATA_PTR
;
57 #endif /* of CONFIG_PCI */
65 extern flash_info_t flash_info
[];
67 /* ------------------------------------------------------------------------- */
69 /* this is the current GT register space location */
70 /* it starts at CONFIG_SYS_DFL_GT_REGS but moves later to CONFIG_SYS_GT_REGS */
72 /* Unfortunately, we cant change it while we are in flash, so we initialize it
73 * to the "final" value. This means that any debug_led calls before
74 * board_early_init_f wont work right (like in cpu_init_f).
75 * See also my_remap_gt_regs below. (NTL)
78 void board_prebootm_init (void);
79 unsigned int INTERNAL_REG_BASE_ADDR
= CONFIG_SYS_GT_REGS
;
80 int display_mem_map (void);
83 /* ------------------------------------------------------------------------- */
86 * This is a version of the GT register space remapping function that
87 * doesn't touch globals (meaning, it's ok to run from flash.)
89 * Unfortunately, this has the side effect that a writable
90 * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
93 void my_remap_gt_regs (u32 cur_loc
, u32 new_loc
)
97 /* check and see if it's already moved */
98 temp
= in_le32 ((u32
*) (new_loc
+ INTERNAL_SPACE_DECODE
));
99 if ((temp
& 0xffff) == new_loc
>> 16)
102 temp
= (in_le32 ((u32
*) (cur_loc
+ INTERNAL_SPACE_DECODE
)) &
103 0xffff0000) | (new_loc
>> 16);
105 out_le32 ((u32
*) (cur_loc
+ INTERNAL_SPACE_DECODE
), temp
);
107 while (GTREGREAD (INTERNAL_SPACE_DECODE
) != temp
);
112 static void gt_pci_config (void)
115 unsigned int val
= 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, */
116 /* FuncNum 10:8, RegNum 7:2 */
119 * In PCIX mode devices provide their own bus and device numbers.
120 * We query the Discovery II's
121 * config registers by writing ones to the bus and device.
122 * We then update the Virtual register with the correct value for the
125 if ((GTREGREAD (PCI_0_MODE
) & (BIT4
| BIT5
)) != 0) { /* if PCI-X */
126 GT_REG_WRITE (PCI_0_CONFIG_ADDR
, BIT31
| val
);
128 GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG
, &stat
);
130 GT_REG_WRITE (PCI_0_CONFIG_ADDR
, BIT31
| val
);
131 GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG
,
132 (stat
& 0xffff0000) | CONFIG_SYS_PCI_IDSEL
);
135 if ((GTREGREAD (PCI_1_MODE
) & (BIT4
| BIT5
)) != 0) { /* if PCI-X */
136 GT_REG_WRITE (PCI_1_CONFIG_ADDR
, BIT31
| val
);
137 GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG
, &stat
);
139 GT_REG_WRITE (PCI_1_CONFIG_ADDR
, BIT31
| val
);
140 GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG
,
141 (stat
& 0xffff0000) | CONFIG_SYS_PCI_IDSEL
);
145 PCI_MASTER_ENABLE (0, SELF
);
146 PCI_MASTER_ENABLE (1, SELF
);
148 /* Enable PCI0/1 Mem0 and IO 0 disable all others */
149 GT_REG_READ (BASE_ADDR_ENABLE
, &stat
);
150 stat
|= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) |
152 stat
&= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
153 GT_REG_WRITE (BASE_ADDR_ENABLE
, stat
);
156 * add write to pci remap registers for 64460.
157 * in 64360 when writing to pci base go and overide remap automaticaly,
158 * in 64460 it doesn't
160 GT_REG_WRITE (PCI_0_IO_BASE_ADDR
, CONFIG_SYS_PCI0_IO_SPACE
>> 16);
161 GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP
, CONFIG_SYS_PCI0_IO_SPACE_PCI
>> 16);
162 GT_REG_WRITE (PCI_0_IO_SIZE
, (CONFIG_SYS_PCI0_IO_SIZE
- 1) >> 16);
164 GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR
, CONFIG_SYS_PCI0_MEM_BASE
>> 16);
165 GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP
, CONFIG_SYS_PCI0_MEM_BASE
>> 16);
166 GT_REG_WRITE (PCI_0_MEMORY0_SIZE
, (CONFIG_SYS_PCI0_MEM_SIZE
- 1) >> 16);
168 GT_REG_WRITE (PCI_1_IO_BASE_ADDR
, CONFIG_SYS_PCI1_IO_SPACE
>> 16);
169 GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP
, CONFIG_SYS_PCI1_IO_SPACE_PCI
>> 16);
170 GT_REG_WRITE (PCI_1_IO_SIZE
, (CONFIG_SYS_PCI1_IO_SIZE
- 1) >> 16);
172 GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR
, CONFIG_SYS_PCI1_MEM_BASE
>> 16);
173 GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP
, CONFIG_SYS_PCI1_MEM_BASE
>> 16);
174 GT_REG_WRITE (PCI_1_MEMORY0_SIZE
, (CONFIG_SYS_PCI1_MEM_SIZE
- 1) >> 16);
176 /* PCI interface settings */
177 /* Timeout set to retry forever */
178 GT_REG_WRITE (PCI_0TIMEOUT_RETRY
, 0x0);
179 GT_REG_WRITE (PCI_1TIMEOUT_RETRY
, 0x0);
181 /* ronen - enable only CS0 and Internal reg!! */
182 GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE
, 0xfffffdfe);
183 GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE
, 0xfffffdfe);
186 * update the pci internal registers base address.
189 for (stat
= 0; stat
<= PCI_HOST1
; stat
++)
190 pciWriteConfigReg (stat
,
191 PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS
,
192 SELF
, CONFIG_SYS_GT_REGS
);
198 /* Setup CPU interface paramaters */
199 static void gt_cpu_config (void)
201 cpu_t cpu
= get_cpu_type ();
204 /* cpu configuration register */
205 tmp
= GTREGREAD (CPU_CONFIGURATION
);
206 /* set the SINGLE_CPU bit see MV64460 */
207 #ifndef CONFIG_SYS_GT_DUAL_CPU /* SINGLE_CPU seems to cause JTAG problems */
208 tmp
|= CPU_CONF_SINGLE_CPU
;
210 tmp
&= ~CPU_CONF_AACK_DELAY_2
;
211 tmp
|= CPU_CONF_DP_VALID
;
212 tmp
|= CPU_CONF_AP_VALID
;
213 tmp
|= CPU_CONF_PIPELINE
;
214 GT_REG_WRITE (CPU_CONFIGURATION
, tmp
); /* Marvell (VXWorks) writes 0x20220FF */
216 /* CPU master control register */
217 tmp
= GTREGREAD (CPU_MASTER_CONTROL
);
218 tmp
|= CPU_MAST_CTL_ARB_EN
;
220 if ((cpu
== CPU_7400
) ||
221 (cpu
== CPU_7410
) || (cpu
== CPU_7455
) || (cpu
== CPU_7450
)) {
223 tmp
|= CPU_MAST_CTL_CLEAN_BLK
;
224 tmp
|= CPU_MAST_CTL_FLUSH_BLK
;
227 /* cleanblock must be cleared for CPUs
228 * that do not support this command (603e, 750)
230 tmp
&= ~CPU_MAST_CTL_CLEAN_BLK
;
231 tmp
&= ~CPU_MAST_CTL_FLUSH_BLK
;
233 GT_REG_WRITE (CPU_MASTER_CONTROL
, tmp
);
237 * board_early_init_f.
239 * set up gal. device mappings, etc.
241 int board_early_init_f (void)
243 /* set up the GT the way the kernel wants it
244 * the call to move the GT register space will obviously
245 * fail if it has already been done, but we're going to assume
246 * that if it's not at the power-on location, it's where we put
247 * it last time. (huber)
249 my_remap_gt_regs (CONFIG_SYS_DFL_GT_REGS
, CONFIG_SYS_GT_REGS
);
254 /* mask all external interrupt sources */
255 GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW
, 0);
256 GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH
, 0);
257 /* new in >MV6436x */
258 GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW
, 0);
259 GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH
, 0);
260 /* --------------------- */
261 GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW
, 0);
262 GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH
, 0);
263 GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW
, 0);
264 GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH
, 0);
266 /* Device and Boot bus settings
268 memoryMapDeviceSpace(DEVICE0
, 0, 0);
269 GT_REG_WRITE(DEVICE_BANK0PARAMETERS
, 0);
270 memoryMapDeviceSpace(DEVICE1
, 0, 0);
271 GT_REG_WRITE(DEVICE_BANK1PARAMETERS
, 0);
272 memoryMapDeviceSpace(DEVICE2
, 0, 0);
273 GT_REG_WRITE(DEVICE_BANK2PARAMETERS
, 0);
274 memoryMapDeviceSpace(DEVICE3
, 0, 0);
275 GT_REG_WRITE(DEVICE_BANK3PARAMETERS
, 0);
277 GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS
, CONFIG_SYS_BOOT_PAR
);
282 GT_REG_WRITE (MPP_CONTROL0
, CONFIG_SYS_MPP_CONTROL_0
);
283 GT_REG_WRITE (MPP_CONTROL1
, CONFIG_SYS_MPP_CONTROL_1
);
284 GT_REG_WRITE (MPP_CONTROL2
, CONFIG_SYS_MPP_CONTROL_2
);
285 GT_REG_WRITE (MPP_CONTROL3
, CONFIG_SYS_MPP_CONTROL_3
);
287 GT_REG_WRITE (GPP_LEVEL_CONTROL
, CONFIG_SYS_GPP_LEVEL_CONTROL
);
294 /* various things to do after relocation */
310 * Enable trickle changing in RTC upon powerup
311 * No diode, 250 ohm series resistor
314 i2c_write(CONFIG_SYS_I2C_RTC_ADDR
, 8, 1, &val
, 1);
319 void after_reloc (ulong dest_addr
, gd_t
* gd
)
321 memoryMapDeviceSpace (BOOT_DEVICE
, CONFIG_SYS_BOOT_SPACE
, CONFIG_SYS_BOOT_SIZE
);
323 /* display_mem_map(); */
325 /* now, jump to the main U-Boot board init code */
327 board_init_r (gd
, dest_addr
);
332 * Check Board Identity:
333 * right now, assume borad type. (there is just one...after all)
336 int checkboard (void)
339 int i
= getenv_f("serial#", buf
, sizeof(buf
));
341 printf("Board: %s", CONFIG_SYS_BOARD_NAME
);
352 void set_led(int col
)
358 /* Program Mpp[22] as Gpp[22]
359 * Program Mpp[23] as Gpp[23]
361 tmp
= GTREGREAD(MPP_CONTROL2
);
363 GT_REG_WRITE(MPP_CONTROL2
,tmp
);
365 /* Program Gpp[22] and Gpp[23] as output
367 tmp
= GTREGREAD(GPP_IO_CONTROL
);
369 GT_REG_WRITE(GPP_IO_CONTROL
, tmp
);
371 /* Program Gpp[22] and Gpp[23] as active high
373 tmp
= GTREGREAD(GPP_LEVEL_CONTROL
);
375 GT_REG_WRITE(GPP_LEVEL_CONTROL
, tmp
);
381 off_pin
= ((1 << 23) | (1 << 22));
392 on_pin
= ((1 << 23) | (1 << 22));
397 /* Set output Gpp[22] and Gpp[23]
399 tmp
= GTREGREAD(GPP_VALUE
);
402 GT_REG_WRITE(GPP_VALUE
, tmp
);
405 int display_mem_map (void)
408 unsigned int base
, size
, width
;
414 printf ("SD (DDR) RAM\n");
415 for (i
= 0; i
<= BANK3
; i
++) {
416 base
= memoryGetBankBaseAddress (i
);
417 size
= memoryGetBankSize (i
);
419 printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
420 i
, base
, size
>> 20);
423 /* CPU's PCI windows */
424 for (i
= 0; i
<= PCI_HOST1
; i
++) {
425 printf ("\nCPU's PCI %d windows\n", i
);
426 base
= pciGetSpaceBase (i
, PCI_IO
);
427 size
= pciGetSpaceSize (i
, PCI_IO
);
428 printf (" IO: base - 0x%08x\tsize - %dM bytes\n", base
,
430 /* ronen currently only first PCI MEM is used 3 */
431 for (j
= 0; j
<= PCI_REGION0
; j
++) {
432 base
= pciGetSpaceBase (i
, j
);
433 size
= pciGetSpaceSize (i
, j
);
434 printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n",
435 j
, base
, size
>> 20);
438 #endif /* of CONFIG_PCI */
441 base
= memoryGetDeviceBaseAddress (BOOT_DEVICE
); /* Boot */
442 size
= memoryGetDeviceSize (BOOT_DEVICE
);
443 width
= memoryGetDeviceWidth (BOOT_DEVICE
) * 8;
444 printf (" BOOT: base - 0x%08x size - %dM bytes\twidth - %d bits\t- FLASH\n",
445 base
, size
>> 20, width
);
450 /* DRAM check routines copied from gw8260 */
452 #if defined (CONFIG_SYS_DRAM_TEST)
454 /*********************************************************************/
455 /* NAME: move64() - moves a double word (64-bit) */
458 /* this function performs a double word move from the data at */
459 /* the source pointer to the location at the destination pointer. */
462 /* unsigned long long *src - pointer to data to move */
465 /* unsigned long long *dest - pointer to locate to move data */
470 /* RESTRICTIONS/LIMITATIONS: */
471 /* May cloober fr0. */
473 /*********************************************************************/
474 static void move64 (unsigned long long *src
, unsigned long long *dest
)
476 asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
477 "stfd 0, 0(4)" /* *dest = fpr0 */
478 : : : "fr0"); /* Clobbers fr0 */
483 #if defined (CONFIG_SYS_DRAM_TEST_DATA)
485 unsigned long long pattern
[] = {
486 0xaaaaaaaaaaaaaaaaULL
,
487 0xccccccccccccccccULL
,
488 0xf0f0f0f0f0f0f0f0ULL
,
489 0xff00ff00ff00ff00ULL
,
490 0xffff0000ffff0000ULL
,
491 0xffffffff00000000ULL
,
492 0x00000000ffffffffULL
,
493 0x0000ffff0000ffffULL
,
494 0x00ff00ff00ff00ffULL
,
495 0x0f0f0f0f0f0f0f0fULL
,
496 0x3333333333333333ULL
,
497 0x5555555555555555ULL
500 /*********************************************************************/
501 /* NAME: mem_test_data() - test data lines for shorts and opens */
504 /* Tests data lines for shorts and opens by forcing adjacent data */
505 /* to opposite states. Because the data lines could be routed in */
506 /* an arbitrary manner the must ensure test patterns ensure that */
507 /* every case is tested. By using the following series of binary */
508 /* patterns every combination of adjacent bits is test regardless */
511 /* ...101010101010101010101010 */
512 /* ...110011001100110011001100 */
513 /* ...111100001111000011110000 */
514 /* ...111111110000000011111111 */
516 /* Carrying this out, gives us six hex patterns as follows: */
518 /* 0xaaaaaaaaaaaaaaaa */
519 /* 0xcccccccccccccccc */
520 /* 0xf0f0f0f0f0f0f0f0 */
521 /* 0xff00ff00ff00ff00 */
522 /* 0xffff0000ffff0000 */
523 /* 0xffffffff00000000 */
525 /* The number test patterns will always be given by: */
527 /* log(base 2)(number data bits) = log2 (64) = 6 */
529 /* To test for short and opens to other signals on our boards. we */
531 /* test with the 1's complemnt of the paterns as well. */
534 /* Displays failing test pattern */
537 /* 0 - Passed test */
538 /* 1 - Failed test */
540 /* RESTRICTIONS/LIMITATIONS: */
541 /* Assumes only one one SDRAM bank */
543 /*********************************************************************/
544 int mem_test_data (void)
546 unsigned long long *pmem
= (unsigned long long *) CONFIG_SYS_MEMTEST_START
;
547 unsigned long long temp64
= 0;
548 int num_patterns
= sizeof (pattern
) / sizeof (pattern
[0]);
552 for (i
= 0; i
< num_patterns
; i
++) {
553 move64 (&(pattern
[i
]), pmem
);
554 move64 (pmem
, &temp64
);
556 /* hi = (temp64>>32) & 0xffffffff; */
557 /* lo = temp64 & 0xffffffff; */
558 /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
560 hi
= (pattern
[i
] >> 32) & 0xffffffff;
561 lo
= pattern
[i
] & 0xffffffff;
562 /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
564 if (temp64
!= pattern
[i
]) {
565 printf ("\n Data Test Failed, pattern 0x%08x%08x",
573 #endif /* CONFIG_SYS_DRAM_TEST_DATA */
575 #if defined (CONFIG_SYS_DRAM_TEST_ADDRESS)
576 /*********************************************************************/
577 /* NAME: mem_test_address() - test address lines */
580 /* This function performs a test to verify that each word im */
581 /* memory is uniquly addressable. The test sequence is as follows: */
583 /* 1) write the address of each word to each word. */
584 /* 2) verify that each location equals its address */
587 /* Displays failing test pattern and address */
590 /* 0 - Passed test */
591 /* 1 - Failed test */
593 /* RESTRICTIONS/LIMITATIONS: */
596 /*********************************************************************/
597 int mem_test_address (void)
599 volatile unsigned int *pmem
=
600 (volatile unsigned int *) CONFIG_SYS_MEMTEST_START
;
601 const unsigned int size
= (CONFIG_SYS_MEMTEST_END
- CONFIG_SYS_MEMTEST_START
) / 4;
604 /* write address to each location */
605 for (i
= 0; i
< size
; i
++)
608 /* verify each loaction */
609 for (i
= 0; i
< size
; i
++) {
611 printf ("\n Address Test Failed at 0x%x", i
);
617 #endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */
619 #if defined (CONFIG_SYS_DRAM_TEST_WALK)
620 /*********************************************************************/
621 /* NAME: mem_march() - memory march */
624 /* Marches up through memory. At each location verifies rmask if */
625 /* read = 1. At each location write wmask if write = 1. Displays */
626 /* failing address and pattern. */
629 /* volatile unsigned long long * base - start address of test */
630 /* unsigned int size - number of dwords(64-bit) to test */
631 /* unsigned long long rmask - read verify mask */
632 /* unsigned long long wmask - wrtie verify mask */
633 /* short read - verifies rmask if read = 1 */
634 /* short write - writes wmask if write = 1 */
637 /* Displays failing test pattern and address */
640 /* 0 - Passed test */
641 /* 1 - Failed test */
643 /* RESTRICTIONS/LIMITATIONS: */
646 /*********************************************************************/
647 int mem_march (volatile unsigned long long *base
,
649 unsigned long long rmask
,
650 unsigned long long wmask
, short read
, short write
)
653 unsigned long long temp
= 0;
654 unsigned int hitemp
, lotemp
, himask
, lomask
;
656 for (i
= 0; i
< size
; i
++) {
658 /* temp = base[i]; */
659 move64 ((unsigned long long *) &(base
[i
]), &temp
);
661 hitemp
= (temp
>> 32) & 0xffffffff;
662 lotemp
= temp
& 0xffffffff;
663 himask
= (rmask
>> 32) & 0xffffffff;
664 lomask
= rmask
& 0xffffffff;
666 printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i
<< 3, himask
, lomask
, hitemp
, lotemp
);
671 /* base[i] = wmask; */
672 move64 (&wmask
, (unsigned long long *) &(base
[i
]));
677 #endif /* CONFIG_SYS_DRAM_TEST_WALK */
679 /*********************************************************************/
680 /* NAME: mem_test_walk() - a simple walking ones test */
683 /* Performs a walking ones through entire physical memory. The */
684 /* test uses as series of memory marches, mem_march(), to verify */
685 /* and write the test patterns to memory. The test sequence is as */
687 /* 1) march writing 0000...0001 */
688 /* 2) march verifying 0000...0001 , writing 0000...0010 */
689 /* 3) repeat step 2 shifting masks left 1 bit each time unitl */
690 /* the write mask equals 1000...0000 */
691 /* 4) march verifying 1000...0000 */
692 /* The test fails if any of the memory marches return a failure. */
695 /* Displays which pass on the memory test is executing */
698 /* 0 - Passed test */
699 /* 1 - Failed test */
701 /* RESTRICTIONS/LIMITATIONS: */
704 /*********************************************************************/
705 int mem_test_walk (void)
707 unsigned long long mask
;
708 volatile unsigned long long *pmem
=
709 (volatile unsigned long long *) CONFIG_SYS_MEMTEST_START
;
710 const unsigned long size
= (CONFIG_SYS_MEMTEST_END
- CONFIG_SYS_MEMTEST_START
) / 8;
716 printf ("Initial Pass");
717 mem_march (pmem
, size
, 0x0, 0x1, 0, 1);
719 printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
722 printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
724 for (i
= 0; i
< 63; i
++) {
725 printf ("Pass %2d", i
+ 2);
726 if (mem_march (pmem
, size
, mask
, mask
<< 1, 1, 1) != 0) {
727 /*printf("mask: 0x%x, pass: %d, ", mask, i); */
731 printf ("\b\b\b\b\b\b\b");
734 printf ("Last Pass");
735 if (mem_march (pmem
, size
, 0, mask
, 0, 1) != 0) {
736 /* printf("mask: 0x%x", mask); */
739 printf ("\b\b\b\b\b\b\b\b\b");
741 printf ("\b\b\b\b\b\b\b\b\b");
746 /*********************************************************************/
747 /* NAME: testdram() - calls any enabled memory tests */
750 /* Runs memory tests if the environment test variables are set to */
754 /* testdramdata - If set to 'y', data test is run. */
755 /* testdramaddress - If set to 'y', address test is run. */
756 /* testdramwalk - If set to 'y', walking ones test is run */
762 /* 0 - Passed test */
763 /* 1 - Failed test */
765 /* RESTRICTIONS/LIMITATIONS: */
768 /*********************************************************************/
776 #ifdef CONFIG_SYS_DRAM_TEST_DATA
777 s
= getenv ("testdramdata");
778 rundata
= (s
&& (*s
== 'y')) ? 1 : 0;
780 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
781 s
= getenv ("testdramaddress");
782 runaddress
= (s
&& (*s
== 'y')) ? 1 : 0;
784 #ifdef CONFIG_SYS_DRAM_TEST_WALK
785 s
= getenv ("testdramwalk");
786 runwalk
= (s
&& (*s
== 'y')) ? 1 : 0;
789 if ((rundata
== 1) || (runaddress
== 1) || (runwalk
== 1))
790 printf ("Testing RAM from 0x%08x to 0x%08x ... "
791 "(don't panic... that will take a moment !!!!)\n",
792 CONFIG_SYS_MEMTEST_START
, CONFIG_SYS_MEMTEST_END
);
793 #ifdef CONFIG_SYS_DRAM_TEST_DATA
795 printf ("Test DATA ... ");
796 if (mem_test_data () == 1) {
797 printf ("failed \n");
803 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
804 if (runaddress
== 1) {
805 printf ("Test ADDRESS ... ");
806 if (mem_test_address () == 1) {
807 printf ("failed \n");
813 #ifdef CONFIG_SYS_DRAM_TEST_WALK
815 printf ("Test WALKING ONEs ... ");
816 if (mem_test_walk () == 1) {
817 printf ("failed \n");
823 if ((rundata
== 1) || (runaddress
== 1) || (runwalk
== 1))
828 #endif /* CONFIG_SYS_DRAM_TEST */
830 /* ronen - the below functions are used by the bootm function */
831 /* - we map the base register to fbe00000 (same mapping as in the LSP) */
832 /* - we turn off the RX gig dmas - to prevent the dma from overunning */
833 /* the kernel data areas. */
834 /* - we diable and invalidate the icache and dcache. */
835 void my_remap_gt_regs_bootm (u32 cur_loc
, u32 new_loc
)
839 temp
= in_le32 ((u32
*) (new_loc
+ INTERNAL_SPACE_DECODE
));
840 if ((temp
& 0xffff) == new_loc
>> 16)
843 temp
= (in_le32 ((u32
*) (cur_loc
+ INTERNAL_SPACE_DECODE
)) &
844 0xffff0000) | (new_loc
>> 16);
846 out_le32 ((u32
*) (cur_loc
+ INTERNAL_SPACE_DECODE
), temp
);
848 while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE
|
850 (INTERNAL_SPACE_DECODE
)))))