board/prodrive/p3p440/init.S

   1 /*
   2  * (C) Copyright 2005
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <ppc_asm.tmpl>
  11 #include <asm/mmu.h>
  12 #include <config.h>
  13 #include <asm/ppc4xx.h>
  14
  15 /**************************************************************************
  16  * TLB TABLE
  17  *
  18  * This table is used by the cpu boot code to setup the initial tlb
  19  * entries. Rather than make broad assumptions in the cpu source tree,
  20  * this table lets each board set things up however they like.
  21  *
  22  *  Pointer to the table is returned in r1
  23  *
  24  *************************************************************************/
  25
  26     .section .bootpg,"ax"
  27     .globl tlbtab
  28
  29 tlbtab:
  30     tlbtab_start
  31     tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
  32     tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
  33     tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX )
  34     tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX )
  35     tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
  36     tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
  37     tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
  38     tlbtab_end