board/prodrive/pdnb3/pdnb3.c

   1 /*
   2  * (C) Copyright 2006
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <command.h>
  26 #include <malloc.h>
  27 #include <asm/arch/ixp425.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 /* Prototypes */
  32 int gunzip(void *, int, unsigned char *, unsigned long *);
  33 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  34
  35 /* predefine these here for FPGA programming (before including fpga.c) */
  36 #define SET_FPGA(data)  *IXP425_GPIO_GPOUTR = (data)
  37 #define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_DONE)
  38 #define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_INIT)
  39 #define OLD_VAL         old_val
  40
  41 static unsigned long old_val = 0;
  42
  43 /*
  44  * include common fpga code (for prodrive boards)
  45  */
  46 #include "../common/fpga.c"
  47
  48 /*
  49  * Miscelaneous platform dependent initialisations
  50  */
  51 int board_init(void)
  52 {
  53         /* arch number of PDNB3 */
  54         gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
  55
  56         /* adress of boot parameters */
  57         gd->bd->bi_boot_params = 0x00000100;
  58
  59         GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
  60         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_FPGA_RESET);
  61
  62         GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SYS_RUNNING);
  63         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SYS_RUNNING);
  64
  65         /*
  66          * Setup GPIO's for FPGA programming
  67          */
  68         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
  69         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
  70         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
  71         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PRG);
  72         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK);
  73         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DATA);
  74         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_INIT);
  75         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DONE);
  76
  77         /*
  78          * Setup GPIO's for interrupts
  79          */
  80         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
  81         GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
  82         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
  83         GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
  84         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTORE_INT);
  85         GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTORE_INT);
  86         GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTART_INT);
  87         GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTART_INT);
  88
  89         /*
  90          * Setup GPIO's for 33MHz clock output
  91          */
  92         *IXP425_GPIO_GPCLKR = 0x01FF0000;
  93         GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK_33M);
  94
  95         /*
  96          * Setup other chip select's
  97          */
  98         *IXP425_EXP_CS1 = CONFIG_SYS_EXP_CS1;
  99
 100         return 0;
 101 }
 102
 103 /*
 104  * Check Board Identity
 105  */
 106 int checkboard(void)
 107 {
 108         char *s = getenv("serial#");
 109
 110         puts("Board: PDNB3");
 111
 112         if (s != NULL) {
 113                 puts(", serial# ");
 114                 puts(s);
 115         }
 116         putc('\n');
 117
 118         return (0);
 119 }
 120
 121 int dram_init(void)
 122 {
 123         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 124         gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 125
 126         return (0);
 127 }
 128
 129 int do_fpga_boot(unsigned char *fpgadata)
 130 {
 131         unsigned char *dst;
 132         int status;
 133         int index;
 134         int i;
 135         ulong len = CONFIG_SYS_MALLOC_LEN;
 136
 137         /*
 138          * Setup GPIO's for FPGA programming
 139          */
 140         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
 141         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
 142         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
 143
 144         /*
 145          * Save value so no readback is required upon programming
 146          */
 147         old_val = *IXP425_GPIO_GPOUTR;
 148
 149         /*
 150          * First try to decompress fpga image (gzip compressed?)
 151          */
 152         dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
 153         if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
 154                 printf("Error: Image has to be gzipp'ed!\n");
 155                 return -1;
 156         }
 157
 158         status = fpga_boot(dst, len);
 159         if (status != 0) {
 160                 printf("\nFPGA: Booting failed ");
 161                 switch (status) {
 162                 case ERROR_FPGA_PRG_INIT_LOW:
 163                         printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
 164                         break;
 165                 case ERROR_FPGA_PRG_INIT_HIGH:
 166                         printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
 167                         break;
 168                 case ERROR_FPGA_PRG_DONE:
 169                         printf("(Timeout: DONE not high after programming FPGA)\n ");
 170                         break;
 171                 }
 172
 173                 /* display infos on fpgaimage */
 174                 index = 15;
 175                 for (i=0; i<4; i++) {
 176                         len = dst[index];
 177                         printf("FPGA: %s\n", &(dst[index+1]));
 178                         index += len+3;
 179                 }
 180                 putc ('\n');
 181                 /* delayed reboot */
 182                 for (i=5; i>0; i--) {
 183                         printf("Rebooting in %2d seconds \r",i);
 184                         for (index=0;index<1000;index++)
 185                                 udelay(1000);
 186                 }
 187                 putc('\n');
 188                 do_reset(NULL, 0, 0, NULL);
 189         }
 190
 191         puts("FPGA:  ");
 192
 193         /* display infos on fpgaimage */
 194         index = 15;
 195         for (i=0; i<4; i++) {
 196                 len = dst[index];
 197                 printf("%s ", &(dst[index+1]));
 198                 index += len+3;
 199         }
 200         putc('\n');
 201
 202         free(dst);
 203
 204         /*
 205          * Reset FPGA
 206          */
 207         GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_FPGA_RESET);
 208         udelay(10);
 209         GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
 210
 211         return (0);
 212 }
 213
 214 int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 215 {
 216         ulong addr;
 217
 218         if (argc < 2) {
 219                 printf ("Usage:\n%s\n", cmdtp->usage);
 220                 return 1;
 221         }
 222
 223         addr = simple_strtoul(argv[1], NULL, 16);
 224
 225         return do_fpga_boot((unsigned char *)addr);
 226 }
 227
 228 U_BOOT_CMD(
 229         fpga,     2,     0,      do_fpga,
 230         "fpga    - boot FPGA\n",
 231         "address size\n    - boot FPGA with gzipped image at <address>\n"
 232 );
 233
 234 #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
 235 extern struct pci_controller hose;
 236 extern void pci_ixp_init(struct pci_controller * hose);
 237
 238 void pci_init_board(void)
 239 {
 240         extern void pci_ixp_init (struct pci_controller *hose);
 241
 242         pci_ixp_init(&hose);
 243 }
 244 #endif