board/quad100hd/nand.c

   1 /*
   2  * (C) Copyright 2008
   3  * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <config.h>
  26 #if defined(CONFIG_CMD_NAND)
  27 #include <asm/gpio.h>
  28 #include <nand.h>
  29
  30 /*
  31  *      hardware specific access to control-lines
  32  */
  33 static void quad100hd_hwcontrol(struct mtd_info *mtd, int cmd)
  34 {
  35         switch(cmd) {
  36         case NAND_CTL_SETCLE:
  37                 gpio_write_bit(CFG_NAND_CLE, 1);
  38                 break;
  39         case NAND_CTL_CLRCLE:
  40                 gpio_write_bit(CFG_NAND_CLE, 0);
  41                 break;
  42
  43         case NAND_CTL_SETALE:
  44                 gpio_write_bit(CFG_NAND_ALE, 1);
  45                 break;
  46         case NAND_CTL_CLRALE:
  47                 gpio_write_bit(CFG_NAND_ALE, 0);
  48                 break;
  49
  50         case NAND_CTL_SETNCE:
  51                 gpio_write_bit(CFG_NAND_CE, 0);
  52                 break;
  53         case NAND_CTL_CLRNCE:
  54                 gpio_write_bit(CFG_NAND_CE, 1);
  55                 break;
  56         }
  57 }
  58
  59 static int quad100hd_nand_ready(struct mtd_info *mtd)
  60 {
  61         return gpio_read_in_bit(CFG_NAND_RDY);
  62 }
  63
  64 /*
  65  * Main initialization routine
  66  */
  67 int board_nand_init(struct nand_chip *nand)
  68 {
  69         /* Set address of hardware control function */
  70         nand->hwcontrol = quad100hd_hwcontrol;
  71         nand->dev_ready = quad100hd_nand_ready;
  72         nand->eccmode = NAND_ECC_SOFT;
  73         /* 15 us command delay time */
  74         nand->chip_delay =  20;
  75
  76         /* Return happy */
  77         return 0;
  78 }
  79 #endif /* CONFIG_CMD_NAND */