2 * board/renesas/porter/qos.c
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2015 Cogent Embedded, Inc.
7 * SPDX-License-Identifier: GPL-2.0
12 #include <asm/processor.h>
13 #include <asm/mach-types.h>
15 #include <asm/arch/rmobile.h>
17 /* QoS version 0.240 for ES1 and version 0.334 for ES2 */
18 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
20 DBSC3_00
, DBSC3_01
, DBSC3_02
, DBSC3_03
, DBSC3_04
,
21 DBSC3_05
, DBSC3_06
, DBSC3_07
, DBSC3_08
, DBSC3_09
,
22 DBSC3_10
, DBSC3_11
, DBSC3_12
, DBSC3_13
, DBSC3_14
,
27 static u32 dbsc3_0_r_qos_addr
[DBSC3_NR
] = {
28 [DBSC3_00
] = DBSC3_0_QOS_R0_BASE
,
29 [DBSC3_01
] = DBSC3_0_QOS_R1_BASE
,
30 [DBSC3_02
] = DBSC3_0_QOS_R2_BASE
,
31 [DBSC3_03
] = DBSC3_0_QOS_R3_BASE
,
32 [DBSC3_04
] = DBSC3_0_QOS_R4_BASE
,
33 [DBSC3_05
] = DBSC3_0_QOS_R5_BASE
,
34 [DBSC3_06
] = DBSC3_0_QOS_R6_BASE
,
35 [DBSC3_07
] = DBSC3_0_QOS_R7_BASE
,
36 [DBSC3_08
] = DBSC3_0_QOS_R8_BASE
,
37 [DBSC3_09
] = DBSC3_0_QOS_R9_BASE
,
38 [DBSC3_10
] = DBSC3_0_QOS_R10_BASE
,
39 [DBSC3_11
] = DBSC3_0_QOS_R11_BASE
,
40 [DBSC3_12
] = DBSC3_0_QOS_R12_BASE
,
41 [DBSC3_13
] = DBSC3_0_QOS_R13_BASE
,
42 [DBSC3_14
] = DBSC3_0_QOS_R14_BASE
,
43 [DBSC3_15
] = DBSC3_0_QOS_R15_BASE
,
46 static u32 dbsc3_0_w_qos_addr
[DBSC3_NR
] = {
47 [DBSC3_00
] = DBSC3_0_QOS_W0_BASE
,
48 [DBSC3_01
] = DBSC3_0_QOS_W1_BASE
,
49 [DBSC3_02
] = DBSC3_0_QOS_W2_BASE
,
50 [DBSC3_03
] = DBSC3_0_QOS_W3_BASE
,
51 [DBSC3_04
] = DBSC3_0_QOS_W4_BASE
,
52 [DBSC3_05
] = DBSC3_0_QOS_W5_BASE
,
53 [DBSC3_06
] = DBSC3_0_QOS_W6_BASE
,
54 [DBSC3_07
] = DBSC3_0_QOS_W7_BASE
,
55 [DBSC3_08
] = DBSC3_0_QOS_W8_BASE
,
56 [DBSC3_09
] = DBSC3_0_QOS_W9_BASE
,
57 [DBSC3_10
] = DBSC3_0_QOS_W10_BASE
,
58 [DBSC3_11
] = DBSC3_0_QOS_W11_BASE
,
59 [DBSC3_12
] = DBSC3_0_QOS_W12_BASE
,
60 [DBSC3_13
] = DBSC3_0_QOS_W13_BASE
,
61 [DBSC3_14
] = DBSC3_0_QOS_W14_BASE
,
62 [DBSC3_15
] = DBSC3_0_QOS_W15_BASE
,
65 static u32 dbsc3_1_r_qos_addr
[DBSC3_NR
] = {
66 [DBSC3_00
] = DBSC3_1_QOS_R0_BASE
,
67 [DBSC3_01
] = DBSC3_1_QOS_R1_BASE
,
68 [DBSC3_02
] = DBSC3_1_QOS_R2_BASE
,
69 [DBSC3_03
] = DBSC3_1_QOS_R3_BASE
,
70 [DBSC3_04
] = DBSC3_1_QOS_R4_BASE
,
71 [DBSC3_05
] = DBSC3_1_QOS_R5_BASE
,
72 [DBSC3_06
] = DBSC3_1_QOS_R6_BASE
,
73 [DBSC3_07
] = DBSC3_1_QOS_R7_BASE
,
74 [DBSC3_08
] = DBSC3_1_QOS_R8_BASE
,
75 [DBSC3_09
] = DBSC3_1_QOS_R9_BASE
,
76 [DBSC3_10
] = DBSC3_1_QOS_R10_BASE
,
77 [DBSC3_11
] = DBSC3_1_QOS_R11_BASE
,
78 [DBSC3_12
] = DBSC3_1_QOS_R12_BASE
,
79 [DBSC3_13
] = DBSC3_1_QOS_R13_BASE
,
80 [DBSC3_14
] = DBSC3_1_QOS_R14_BASE
,
81 [DBSC3_15
] = DBSC3_1_QOS_R15_BASE
,
84 static u32 dbsc3_1_w_qos_addr
[DBSC3_NR
] = {
85 [DBSC3_00
] = DBSC3_1_QOS_W0_BASE
,
86 [DBSC3_01
] = DBSC3_1_QOS_W1_BASE
,
87 [DBSC3_02
] = DBSC3_1_QOS_W2_BASE
,
88 [DBSC3_03
] = DBSC3_1_QOS_W3_BASE
,
89 [DBSC3_04
] = DBSC3_1_QOS_W4_BASE
,
90 [DBSC3_05
] = DBSC3_1_QOS_W5_BASE
,
91 [DBSC3_06
] = DBSC3_1_QOS_W6_BASE
,
92 [DBSC3_07
] = DBSC3_1_QOS_W7_BASE
,
93 [DBSC3_08
] = DBSC3_1_QOS_W8_BASE
,
94 [DBSC3_09
] = DBSC3_1_QOS_W9_BASE
,
95 [DBSC3_10
] = DBSC3_1_QOS_W10_BASE
,
96 [DBSC3_11
] = DBSC3_1_QOS_W11_BASE
,
97 [DBSC3_12
] = DBSC3_1_QOS_W12_BASE
,
98 [DBSC3_13
] = DBSC3_1_QOS_W13_BASE
,
99 [DBSC3_14
] = DBSC3_1_QOS_W14_BASE
,
100 [DBSC3_15
] = DBSC3_1_QOS_W15_BASE
,
106 struct rcar_s3c
*s3c
;
107 struct rcar_s3c_qos
*s3c_qos
;
108 struct rcar_dbsc3_qos
*qos_addr
;
109 struct rcar_mxi
*mxi
;
110 struct rcar_mxi_qos
*mxi_qos
;
111 struct rcar_axi_qos
*axi_qos
;
114 writel(0x20042004, DBSC3_0_DBADJ2
);
115 writel(0x20042004, DBSC3_1_DBADJ2
);
118 s3c
= (struct rcar_s3c
*)S3C_BASE
;
119 if (IS_R8A7791_ES2()) {
120 /* Linear All mode */
121 /* writel(0x00000000, &s3c->s3cadsplcr); */
122 /* Linear Linear 0x7000 to 0x7800 mode */
123 writel(0x00BF1B0C, &s3c
->s3cadsplcr
);
124 /* Split Linear 0x6800 t 0x7000 mode */
125 /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */
126 /* Ssplit All mode */
127 /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */
128 writel(0x1F0B0908, &s3c
->s3crorr
);
129 writel(0x1F0C0A08, &s3c
->s3cworr
);
131 writel(0x00FF1B1D, &s3c
->s3cadsplcr
);
132 writel(0x1F0D0C0C, &s3c
->s3crorr
);
133 writel(0x1F0D0C0A, &s3c
->s3cworr
);
135 /* QoS Control Registers */
136 s3c_qos
= (struct rcar_s3c_qos
*)S3C_QOS_CCI0_BASE
;
137 writel(0x00890089, &s3c_qos
->s3cqos0
);
138 writel(0x20960010, &s3c_qos
->s3cqos1
);
139 writel(0x20302030, &s3c_qos
->s3cqos2
);
140 writel(0x20AA2200, &s3c_qos
->s3cqos3
);
141 writel(0x00002032, &s3c_qos
->s3cqos4
);
142 writel(0x20960010, &s3c_qos
->s3cqos5
);
143 writel(0x20302030, &s3c_qos
->s3cqos6
);
144 writel(0x20AA2200, &s3c_qos
->s3cqos7
);
145 writel(0x00002032, &s3c_qos
->s3cqos8
);
147 s3c_qos
= (struct rcar_s3c_qos
*)S3C_QOS_CCI1_BASE
;
148 writel(0x00890089, &s3c_qos
->s3cqos0
);
149 writel(0x20960010, &s3c_qos
->s3cqos1
);
150 writel(0x20302030, &s3c_qos
->s3cqos2
);
151 writel(0x20AA2200, &s3c_qos
->s3cqos3
);
152 writel(0x00002032, &s3c_qos
->s3cqos4
);
153 writel(0x20960010, &s3c_qos
->s3cqos5
);
154 writel(0x20302030, &s3c_qos
->s3cqos6
);
155 writel(0x20AA2200, &s3c_qos
->s3cqos7
);
156 writel(0x00002032, &s3c_qos
->s3cqos8
);
158 s3c_qos
= (struct rcar_s3c_qos
*)S3C_QOS_MXI_BASE
;
159 writel(0x00820082, &s3c_qos
->s3cqos0
);
160 writel(0x20960020, &s3c_qos
->s3cqos1
);
161 writel(0x20302030, &s3c_qos
->s3cqos2
);
162 writel(0x20AA20DC, &s3c_qos
->s3cqos3
);
163 writel(0x00002032, &s3c_qos
->s3cqos4
);
164 writel(0x20960020, &s3c_qos
->s3cqos5
);
165 writel(0x20302030, &s3c_qos
->s3cqos6
);
166 writel(0x20AA20DC, &s3c_qos
->s3cqos7
);
167 writel(0x00002032, &s3c_qos
->s3cqos8
);
169 s3c_qos
= (struct rcar_s3c_qos
*)S3C_QOS_AXI_BASE
;
170 writel(0x00820082, &s3c_qos
->s3cqos0
);
171 writel(0x20960020, &s3c_qos
->s3cqos1
);
172 writel(0x20302030, &s3c_qos
->s3cqos2
);
173 writel(0x20AA20FA, &s3c_qos
->s3cqos3
);
174 writel(0x00002032, &s3c_qos
->s3cqos4
);
175 writel(0x20960020, &s3c_qos
->s3cqos5
);
176 writel(0x20302030, &s3c_qos
->s3cqos6
);
177 writel(0x20AA20FA, &s3c_qos
->s3cqos7
);
178 writel(0x00002032, &s3c_qos
->s3cqos8
);
182 for (i
= DBSC3_00
; i
< DBSC3_NR
; i
++) {
183 qos_addr
= (struct rcar_dbsc3_qos
*)dbsc3_0_r_qos_addr
[i
];
184 writel(0x00000002, &qos_addr
->dblgcnt
);
185 writel(0x00002096, &qos_addr
->dbtmval0
);
186 writel(0x00002064, &qos_addr
->dbtmval1
);
187 writel(0x00002032, &qos_addr
->dbtmval2
);
188 writel(0x00001FB0, &qos_addr
->dbtmval3
);
189 writel(0x00000001, &qos_addr
->dbrqctr
);
190 writel(0x00002078, &qos_addr
->dbthres0
);
191 writel(0x0000204B, &qos_addr
->dbthres1
);
192 writel(0x0000201E, &qos_addr
->dbthres2
);
193 writel(0x00000001, &qos_addr
->dblgqon
);
197 for (i
= DBSC3_00
; i
< DBSC3_NR
; i
++) {
198 qos_addr
= (struct rcar_dbsc3_qos
*)dbsc3_0_w_qos_addr
[i
];
199 writel(0x00000002, &qos_addr
->dblgcnt
);
200 writel(0x00002096, &qos_addr
->dbtmval0
);
201 writel(0x00002064, &qos_addr
->dbtmval1
);
202 writel(0x00002050, &qos_addr
->dbtmval2
);
203 writel(0x0000203A, &qos_addr
->dbtmval3
);
204 writel(0x00000001, &qos_addr
->dbrqctr
);
205 writel(0x00002078, &qos_addr
->dbthres0
);
206 writel(0x0000204B, &qos_addr
->dbthres1
);
207 writel(0x0000203C, &qos_addr
->dbthres2
);
208 writel(0x00000001, &qos_addr
->dblgqon
);
212 for (i
= DBSC3_00
; i
< DBSC3_NR
; i
++) {
213 qos_addr
= (struct rcar_dbsc3_qos
*)dbsc3_1_r_qos_addr
[i
];
214 writel(0x00000002, &qos_addr
->dblgcnt
);
215 writel(0x00002096, &qos_addr
->dbtmval0
);
216 writel(0x00002064, &qos_addr
->dbtmval1
);
217 writel(0x00002032, &qos_addr
->dbtmval2
);
218 writel(0x00001FB0, &qos_addr
->dbtmval3
);
219 writel(0x00000001, &qos_addr
->dbrqctr
);
220 writel(0x00002078, &qos_addr
->dbthres0
);
221 writel(0x0000204B, &qos_addr
->dbthres1
);
222 writel(0x0000201E, &qos_addr
->dbthres2
);
223 writel(0x00000001, &qos_addr
->dblgqon
);
227 for (i
= DBSC3_00
; i
< DBSC3_NR
; i
++) {
228 qos_addr
= (struct rcar_dbsc3_qos
*)dbsc3_1_w_qos_addr
[i
];
229 writel(0x00000002, &qos_addr
->dblgcnt
);
230 writel(0x00002096, &qos_addr
->dbtmval0
);
231 writel(0x00002064, &qos_addr
->dbtmval1
);
232 writel(0x00002050, &qos_addr
->dbtmval2
);
233 writel(0x0000203A, &qos_addr
->dbtmval3
);
234 writel(0x00000001, &qos_addr
->dbrqctr
);
235 writel(0x00002078, &qos_addr
->dbthres0
);
236 writel(0x0000204B, &qos_addr
->dbthres1
);
237 writel(0x0000203C, &qos_addr
->dbthres2
);
238 writel(0x00000001, &qos_addr
->dblgqon
);
242 writel(0x20001000, CCI_400_MAXOT_1
);
243 writel(0x20001000, CCI_400_MAXOT_2
);
244 writel(0x0000000C, CCI_400_QOSCNTL_1
);
245 writel(0x0000000C, CCI_400_QOSCNTL_2
);
248 /* Transaction Control (MXI) */
249 mxi
= (struct rcar_mxi
*)MXI_BASE
;
250 writel(0x00000013, &mxi
->mxrtcr
);
251 writel(0x00000013, &mxi
->mxwtcr
);
253 /* QoS Control (MXI) */
254 mxi_qos
= (struct rcar_mxi_qos
*)MXI_QOS_BASE
;
255 writel(0x0000000C, &mxi_qos
->vspdu0
);
256 writel(0x0000000C, &mxi_qos
->vspdu1
);
257 writel(0x0000000E, &mxi_qos
->du0
);
258 writel(0x0000000D, &mxi_qos
->du1
);
261 /* Transaction Control (MXI) */
262 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SYX64TO128_BASE
;
263 writel(0x00000002, &axi_qos
->qosconf
);
264 writel(0x00002245, &axi_qos
->qosctset0
);
265 writel(0x00002096, &axi_qos
->qosctset1
);
266 writel(0x00002030, &axi_qos
->qosctset2
);
267 writel(0x00002030, &axi_qos
->qosctset3
);
268 writel(0x00000001, &axi_qos
->qosreqctr
);
269 writel(0x00002064, &axi_qos
->qosthres0
);
270 writel(0x00002004, &axi_qos
->qosthres1
);
271 writel(0x00000000, &axi_qos
->qosthres2
);
272 writel(0x00000001, &axi_qos
->qosqon
);
274 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_AVB_BASE
;
275 writel(0x00000000, &axi_qos
->qosconf
);
276 writel(0x000020A6, &axi_qos
->qosctset0
);
277 writel(0x00000001, &axi_qos
->qosreqctr
);
278 writel(0x00002064, &axi_qos
->qosthres0
);
279 writel(0x00002004, &axi_qos
->qosthres1
);
280 writel(0x00000000, &axi_qos
->qosthres2
);
281 writel(0x00000001, &axi_qos
->qosqon
);
283 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_G2D_BASE
;
284 writel(0x00000000, &axi_qos
->qosconf
);
285 writel(0x000020A6, &axi_qos
->qosctset0
);
286 writel(0x00000001, &axi_qos
->qosreqctr
);
287 writel(0x00002064, &axi_qos
->qosthres0
);
288 writel(0x00002004, &axi_qos
->qosthres1
);
289 writel(0x00000000, &axi_qos
->qosthres2
);
290 writel(0x00000001, &axi_qos
->qosqon
);
292 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_IMP0_BASE
;
293 writel(0x00000000, &axi_qos
->qosconf
);
294 writel(0x00002021, &axi_qos
->qosctset0
);
295 writel(0x00000001, &axi_qos
->qosreqctr
);
296 writel(0x00002064, &axi_qos
->qosthres0
);
297 writel(0x00002004, &axi_qos
->qosthres1
);
298 writel(0x00000000, &axi_qos
->qosthres2
);
299 writel(0x00000001, &axi_qos
->qosqon
);
301 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_IMP1_BASE
;
302 writel(0x00000000, &axi_qos
->qosconf
);
303 writel(0x00002037, &axi_qos
->qosctset0
);
304 writel(0x00000001, &axi_qos
->qosreqctr
);
305 writel(0x00002064, &axi_qos
->qosthres0
);
306 writel(0x00002004, &axi_qos
->qosthres1
);
307 writel(0x00000000, &axi_qos
->qosthres2
);
308 writel(0x00000001, &axi_qos
->qosqon
);
310 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_IMUX0_BASE
;
311 writel(0x00000002, &axi_qos
->qosconf
);
312 writel(0x00002245, &axi_qos
->qosctset0
);
313 writel(0x00002096, &axi_qos
->qosctset1
);
314 writel(0x00002030, &axi_qos
->qosctset2
);
315 writel(0x00002030, &axi_qos
->qosctset3
);
316 writel(0x00000001, &axi_qos
->qosreqctr
);
317 writel(0x00002064, &axi_qos
->qosthres0
);
318 writel(0x00002004, &axi_qos
->qosthres1
);
319 writel(0x00000000, &axi_qos
->qosthres2
);
320 writel(0x00000001, &axi_qos
->qosqon
);
322 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_IMUX1_BASE
;
323 writel(0x00000002, &axi_qos
->qosconf
);
324 writel(0x00002245, &axi_qos
->qosctset0
);
325 writel(0x00002096, &axi_qos
->qosctset1
);
326 writel(0x00002030, &axi_qos
->qosctset2
);
327 writel(0x00002030, &axi_qos
->qosctset3
);
328 writel(0x00000001, &axi_qos
->qosreqctr
);
329 writel(0x00002064, &axi_qos
->qosthres0
);
330 writel(0x00002004, &axi_qos
->qosthres1
);
331 writel(0x00000000, &axi_qos
->qosthres2
);
332 writel(0x00000001, &axi_qos
->qosqon
);
334 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_IMUX2_BASE
;
335 writel(0x00000002, &axi_qos
->qosconf
);
336 writel(0x00002245, &axi_qos
->qosctset0
);
337 writel(0x00002096, &axi_qos
->qosctset1
);
338 writel(0x00002030, &axi_qos
->qosctset2
);
339 writel(0x00002030, &axi_qos
->qosctset3
);
340 writel(0x00000001, &axi_qos
->qosreqctr
);
341 writel(0x00002064, &axi_qos
->qosthres0
);
342 writel(0x00002004, &axi_qos
->qosthres1
);
343 writel(0x00000000, &axi_qos
->qosthres2
);
344 writel(0x00000001, &axi_qos
->qosqon
);
346 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_LBS_BASE
;
347 writel(0x00000000, &axi_qos
->qosconf
);
348 writel(0x0000214C, &axi_qos
->qosctset0
);
349 writel(0x00000001, &axi_qos
->qosreqctr
);
350 writel(0x00002064, &axi_qos
->qosthres0
);
351 writel(0x00002004, &axi_qos
->qosthres1
);
352 writel(0x00000000, &axi_qos
->qosthres2
);
353 writel(0x00000001, &axi_qos
->qosqon
);
355 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MMUDS_BASE
;
356 writel(0x00000001, &axi_qos
->qosconf
);
357 writel(0x00002004, &axi_qos
->qosctset0
);
358 writel(0x00002096, &axi_qos
->qosctset1
);
359 writel(0x00002030, &axi_qos
->qosctset2
);
360 writel(0x00002030, &axi_qos
->qosctset3
);
361 writel(0x00000001, &axi_qos
->qosreqctr
);
362 writel(0x00002064, &axi_qos
->qosthres0
);
363 writel(0x00002004, &axi_qos
->qosthres1
);
364 writel(0x00000000, &axi_qos
->qosthres2
);
365 writel(0x00000001, &axi_qos
->qosqon
);
367 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MMUM_BASE
;
368 writel(0x00000001, &axi_qos
->qosconf
);
369 writel(0x00002004, &axi_qos
->qosctset0
);
370 writel(0x00002096, &axi_qos
->qosctset1
);
371 writel(0x00002030, &axi_qos
->qosctset2
);
372 writel(0x00002030, &axi_qos
->qosctset3
);
373 writel(0x00000001, &axi_qos
->qosreqctr
);
374 writel(0x00002064, &axi_qos
->qosthres0
);
375 writel(0x00002004, &axi_qos
->qosthres1
);
376 writel(0x00000000, &axi_qos
->qosthres2
);
377 writel(0x00000001, &axi_qos
->qosqon
);
379 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MMUR_BASE
;
380 writel(0x00000001, &axi_qos
->qosconf
);
381 writel(0x00002004, &axi_qos
->qosctset0
);
382 writel(0x00002096, &axi_qos
->qosctset1
);
383 writel(0x00002030, &axi_qos
->qosctset2
);
384 writel(0x00002030, &axi_qos
->qosctset3
);
385 writel(0x00000001, &axi_qos
->qosreqctr
);
386 writel(0x00002064, &axi_qos
->qosthres0
);
387 writel(0x00002004, &axi_qos
->qosthres1
);
388 writel(0x00000000, &axi_qos
->qosthres2
);
389 writel(0x00000001, &axi_qos
->qosqon
);
391 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MMUS0_BASE
;
392 writel(0x00000001, &axi_qos
->qosconf
);
393 writel(0x00002004, &axi_qos
->qosctset0
);
394 writel(0x00002096, &axi_qos
->qosctset1
);
395 writel(0x00002030, &axi_qos
->qosctset2
);
396 writel(0x00002030, &axi_qos
->qosctset3
);
397 writel(0x00000001, &axi_qos
->qosreqctr
);
398 writel(0x00002064, &axi_qos
->qosthres0
);
399 writel(0x00002004, &axi_qos
->qosthres1
);
400 writel(0x00000000, &axi_qos
->qosthres2
);
401 writel(0x00000001, &axi_qos
->qosqon
);
403 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MMUS1_BASE
;
404 writel(0x00000001, &axi_qos
->qosconf
);
405 writel(0x00002004, &axi_qos
->qosctset0
);
406 writel(0x00002096, &axi_qos
->qosctset1
);
407 writel(0x00002030, &axi_qos
->qosctset2
);
408 writel(0x00002030, &axi_qos
->qosctset3
);
409 writel(0x00000001, &axi_qos
->qosreqctr
);
410 writel(0x00002064, &axi_qos
->qosthres0
);
411 writel(0x00002004, &axi_qos
->qosthres1
);
412 writel(0x00000000, &axi_qos
->qosthres2
);
413 writel(0x00000001, &axi_qos
->qosqon
);
415 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MTSB0_BASE
;
416 writel(0x00000000, &axi_qos
->qosconf
);
417 writel(0x00002021, &axi_qos
->qosctset0
);
418 writel(0x00000001, &axi_qos
->qosreqctr
);
419 writel(0x00002064, &axi_qos
->qosthres0
);
420 writel(0x00002004, &axi_qos
->qosthres1
);
421 writel(0x00000000, &axi_qos
->qosthres2
);
422 writel(0x00000001, &axi_qos
->qosqon
);
424 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MTSB1_BASE
;
425 writel(0x00000000, &axi_qos
->qosconf
);
426 writel(0x00002021, &axi_qos
->qosctset0
);
427 writel(0x00000001, &axi_qos
->qosreqctr
);
428 writel(0x00002064, &axi_qos
->qosthres0
);
429 writel(0x00002004, &axi_qos
->qosthres1
);
430 writel(0x00000000, &axi_qos
->qosthres2
);
431 writel(0x00000001, &axi_qos
->qosqon
);
433 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_PCI_BASE
;
434 writel(0x00000000, &axi_qos
->qosconf
);
435 writel(0x0000214C, &axi_qos
->qosctset0
);
436 writel(0x00000001, &axi_qos
->qosreqctr
);
437 writel(0x00002064, &axi_qos
->qosthres0
);
438 writel(0x00002004, &axi_qos
->qosthres1
);
439 writel(0x00000000, &axi_qos
->qosthres2
);
440 writel(0x00000001, &axi_qos
->qosqon
);
442 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_RTX_BASE
;
443 writel(0x00000002, &axi_qos
->qosconf
);
444 writel(0x00002245, &axi_qos
->qosctset0
);
445 writel(0x00002096, &axi_qos
->qosctset1
);
446 writel(0x00002030, &axi_qos
->qosctset2
);
447 writel(0x00002030, &axi_qos
->qosctset3
);
448 writel(0x00000001, &axi_qos
->qosreqctr
);
449 writel(0x00002064, &axi_qos
->qosthres0
);
450 writel(0x00002004, &axi_qos
->qosthres1
);
451 writel(0x00000000, &axi_qos
->qosthres2
);
452 writel(0x00000001, &axi_qos
->qosqon
);
454 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SDS0_BASE
;
455 writel(0x00000000, &axi_qos
->qosconf
);
456 writel(0x000020A6, &axi_qos
->qosctset0
);
457 writel(0x00000001, &axi_qos
->qosreqctr
);
458 writel(0x00002064, &axi_qos
->qosthres0
);
459 writel(0x00002004, &axi_qos
->qosthres1
);
460 writel(0x00000000, &axi_qos
->qosthres2
);
461 writel(0x00000001, &axi_qos
->qosqon
);
463 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SDS1_BASE
;
464 writel(0x00000000, &axi_qos
->qosconf
);
465 writel(0x000020A6, &axi_qos
->qosctset0
);
466 writel(0x00000001, &axi_qos
->qosreqctr
);
467 writel(0x00002064, &axi_qos
->qosthres0
);
468 writel(0x00002004, &axi_qos
->qosthres1
);
469 writel(0x00000000, &axi_qos
->qosthres2
);
470 writel(0x00000001, &axi_qos
->qosqon
);
472 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_USB20_BASE
;
473 writel(0x00000000, &axi_qos
->qosconf
);
474 writel(0x00002053, &axi_qos
->qosctset0
);
475 writel(0x00000001, &axi_qos
->qosreqctr
);
476 writel(0x00002064, &axi_qos
->qosthres0
);
477 writel(0x00002004, &axi_qos
->qosthres1
);
478 writel(0x00000000, &axi_qos
->qosthres2
);
479 writel(0x00000001, &axi_qos
->qosqon
);
481 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_USB21_BASE
;
482 writel(0x00000000, &axi_qos
->qosconf
);
483 writel(0x00002053, &axi_qos
->qosctset0
);
484 writel(0x00000001, &axi_qos
->qosreqctr
);
485 writel(0x00002064, &axi_qos
->qosthres0
);
486 writel(0x00002004, &axi_qos
->qosthres1
);
487 writel(0x00000000, &axi_qos
->qosthres2
);
488 writel(0x00000001, &axi_qos
->qosqon
);
490 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_USB22_BASE
;
491 writel(0x00000000, &axi_qos
->qosconf
);
492 writel(0x00002053, &axi_qos
->qosctset0
);
493 writel(0x00000001, &axi_qos
->qosreqctr
);
494 writel(0x00002064, &axi_qos
->qosthres0
);
495 writel(0x00002004, &axi_qos
->qosthres1
);
496 writel(0x00000000, &axi_qos
->qosthres2
);
497 writel(0x00000001, &axi_qos
->qosqon
);
499 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_USB30_BASE
;
500 writel(0x00000000, &axi_qos
->qosconf
);
501 writel(0x0000214C, &axi_qos
->qosctset0
);
502 writel(0x00000001, &axi_qos
->qosreqctr
);
503 writel(0x00002064, &axi_qos
->qosthres0
);
504 writel(0x00002004, &axi_qos
->qosthres1
);
505 writel(0x00000000, &axi_qos
->qosthres2
);
506 writel(0x00000001, &axi_qos
->qosqon
);
508 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_AX2M_BASE
;
509 writel(0x00000002, &axi_qos
->qosconf
);
510 writel(0x00002245, &axi_qos
->qosctset0
);
511 writel(0x00000001, &axi_qos
->qosreqctr
);
512 writel(0x00002064, &axi_qos
->qosthres0
);
513 writel(0x00002004, &axi_qos
->qosthres1
);
514 writel(0x00000000, &axi_qos
->qosthres2
);
515 writel(0x00000001, &axi_qos
->qosqon
);
517 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_CC50_BASE
;
518 writel(0x00000000, &axi_qos
->qosconf
);
519 writel(0x00002029, &axi_qos
->qosctset0
);
520 writel(0x00000001, &axi_qos
->qosreqctr
);
521 writel(0x00002064, &axi_qos
->qosthres0
);
522 writel(0x00002004, &axi_qos
->qosthres1
);
523 writel(0x00000000, &axi_qos
->qosthres2
);
524 writel(0x00000001, &axi_qos
->qosqon
);
526 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_CCI_BASE
;
527 writel(0x00000002, &axi_qos
->qosconf
);
528 writel(0x00002245, &axi_qos
->qosctset0
);
529 writel(0x00000001, &axi_qos
->qosreqctr
);
530 writel(0x00002064, &axi_qos
->qosthres0
);
531 writel(0x00002004, &axi_qos
->qosthres1
);
532 writel(0x00000000, &axi_qos
->qosthres2
);
533 writel(0x00000001, &axi_qos
->qosqon
);
535 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_CS_BASE
;
536 writel(0x00000000, &axi_qos
->qosconf
);
537 writel(0x00002053, &axi_qos
->qosctset0
);
538 writel(0x00000001, &axi_qos
->qosreqctr
);
539 writel(0x00002064, &axi_qos
->qosthres0
);
540 writel(0x00002004, &axi_qos
->qosthres1
);
541 writel(0x00000000, &axi_qos
->qosthres2
);
542 writel(0x00000001, &axi_qos
->qosqon
);
544 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_DDM_BASE
;
545 writel(0x00000000, &axi_qos
->qosconf
);
546 writel(0x000020A6, &axi_qos
->qosctset0
);
547 writel(0x00000001, &axi_qos
->qosreqctr
);
548 writel(0x00002064, &axi_qos
->qosthres0
);
549 writel(0x00002004, &axi_qos
->qosthres1
);
550 writel(0x00000000, &axi_qos
->qosthres2
);
551 writel(0x00000001, &axi_qos
->qosqon
);
553 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_ETH_BASE
;
554 writel(0x00000000, &axi_qos
->qosconf
);
555 writel(0x00002053, &axi_qos
->qosctset0
);
556 writel(0x00000001, &axi_qos
->qosreqctr
);
557 writel(0x00002064, &axi_qos
->qosthres0
);
558 writel(0x00002004, &axi_qos
->qosthres1
);
559 writel(0x00000000, &axi_qos
->qosthres2
);
560 writel(0x00000001, &axi_qos
->qosqon
);
562 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_MPXM_BASE
;
563 writel(0x00000002, &axi_qos
->qosconf
);
564 writel(0x00002245, &axi_qos
->qosctset0
);
565 writel(0x00000001, &axi_qos
->qosreqctr
);
566 writel(0x00002064, &axi_qos
->qosthres0
);
567 writel(0x00002004, &axi_qos
->qosthres1
);
568 writel(0x00000000, &axi_qos
->qosthres2
);
569 writel(0x00000001, &axi_qos
->qosqon
);
571 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SAT0_BASE
;
572 writel(0x00000000, &axi_qos
->qosconf
);
573 writel(0x00002053, &axi_qos
->qosctset0
);
574 writel(0x00000001, &axi_qos
->qosreqctr
);
575 writel(0x00002064, &axi_qos
->qosthres0
);
576 writel(0x00002004, &axi_qos
->qosthres1
);
577 writel(0x00000000, &axi_qos
->qosthres2
);
578 writel(0x00000001, &axi_qos
->qosqon
);
580 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SAT1_BASE
;
581 writel(0x00000000, &axi_qos
->qosconf
);
582 writel(0x00002053, &axi_qos
->qosctset0
);
583 writel(0x00000001, &axi_qos
->qosreqctr
);
584 writel(0x00002064, &axi_qos
->qosthres0
);
585 writel(0x00002004, &axi_qos
->qosthres1
);
586 writel(0x00000000, &axi_qos
->qosthres2
);
587 writel(0x00000001, &axi_qos
->qosqon
);
589 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SDM0_BASE
;
590 writel(0x00000000, &axi_qos
->qosconf
);
591 writel(0x0000214C, &axi_qos
->qosctset0
);
592 writel(0x00000001, &axi_qos
->qosreqctr
);
593 writel(0x00002064, &axi_qos
->qosthres0
);
594 writel(0x00002004, &axi_qos
->qosthres1
);
595 writel(0x00000000, &axi_qos
->qosthres2
);
596 writel(0x00000001, &axi_qos
->qosqon
);
598 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_SDM1_BASE
;
599 writel(0x00000000, &axi_qos
->qosconf
);
600 writel(0x0000214C, &axi_qos
->qosctset0
);
601 writel(0x00000001, &axi_qos
->qosreqctr
);
602 writel(0x00002064, &axi_qos
->qosthres0
);
603 writel(0x00002004, &axi_qos
->qosthres1
);
604 writel(0x00000000, &axi_qos
->qosthres2
);
605 writel(0x00000001, &axi_qos
->qosqon
);
607 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_TRAB_BASE
;
608 writel(0x00000000, &axi_qos
->qosconf
);
609 writel(0x000020A6, &axi_qos
->qosctset0
);
610 writel(0x00000001, &axi_qos
->qosreqctr
);
611 writel(0x00002064, &axi_qos
->qosthres0
);
612 writel(0x00002004, &axi_qos
->qosthres1
);
613 writel(0x00000000, &axi_qos
->qosthres2
);
614 writel(0x00000001, &axi_qos
->qosqon
);
616 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_UDM0_BASE
;
617 writel(0x00000000, &axi_qos
->qosconf
);
618 writel(0x00002053, &axi_qos
->qosctset0
);
619 writel(0x00000001, &axi_qos
->qosreqctr
);
620 writel(0x00002064, &axi_qos
->qosthres0
);
621 writel(0x00002004, &axi_qos
->qosthres1
);
622 writel(0x00000000, &axi_qos
->qosthres2
);
623 writel(0x00000001, &axi_qos
->qosqon
);
625 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI_UDM1_BASE
;
626 writel(0x00000000, &axi_qos
->qosconf
);
627 writel(0x00002053, &axi_qos
->qosctset0
);
628 writel(0x00000001, &axi_qos
->qosreqctr
);
629 writel(0x00002064, &axi_qos
->qosthres0
);
630 writel(0x00002004, &axi_qos
->qosthres1
);
631 writel(0x00000000, &axi_qos
->qosthres2
);
632 writel(0x00000001, &axi_qos
->qosqon
);
634 /* QoS Register (RT-AXI) */
635 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_SHX_BASE
;
636 writel(0x00000000, &axi_qos
->qosconf
);
637 writel(0x00002053, &axi_qos
->qosctset0
);
638 writel(0x00002096, &axi_qos
->qosctset1
);
639 writel(0x00002030, &axi_qos
->qosctset2
);
640 writel(0x00002030, &axi_qos
->qosctset3
);
641 writel(0x00000001, &axi_qos
->qosreqctr
);
642 writel(0x00002064, &axi_qos
->qosthres0
);
643 writel(0x00002004, &axi_qos
->qosthres1
);
644 writel(0x00000000, &axi_qos
->qosthres2
);
645 writel(0x00000001, &axi_qos
->qosqon
);
647 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_DBG_BASE
;
648 writel(0x00000000, &axi_qos
->qosconf
);
649 writel(0x00002053, &axi_qos
->qosctset0
);
650 writel(0x00002096, &axi_qos
->qosctset1
);
651 writel(0x00002030, &axi_qos
->qosctset2
);
652 writel(0x00002030, &axi_qos
->qosctset3
);
653 writel(0x00000001, &axi_qos
->qosreqctr
);
654 writel(0x00002064, &axi_qos
->qosthres0
);
655 writel(0x00002004, &axi_qos
->qosthres1
);
656 writel(0x00000000, &axi_qos
->qosthres2
);
657 writel(0x00000001, &axi_qos
->qosqon
);
659 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_RDM_BASE
;
660 writel(0x00000000, &axi_qos
->qosconf
);
661 writel(0x00002299, &axi_qos
->qosctset0
);
662 writel(0x00000001, &axi_qos
->qosreqctr
);
663 writel(0x00002064, &axi_qos
->qosthres0
);
664 writel(0x00002004, &axi_qos
->qosthres1
);
665 writel(0x00000000, &axi_qos
->qosthres2
);
666 writel(0x00000001, &axi_qos
->qosqon
);
668 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_RDS_BASE
;
669 writel(0x00000000, &axi_qos
->qosconf
);
670 writel(0x00002029, &axi_qos
->qosctset0
);
671 writel(0x00000001, &axi_qos
->qosreqctr
);
672 writel(0x00002064, &axi_qos
->qosthres0
);
673 writel(0x00002004, &axi_qos
->qosthres1
);
674 writel(0x00000000, &axi_qos
->qosthres2
);
675 writel(0x00000001, &axi_qos
->qosqon
);
677 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_RTX64TO128_BASE
;
678 writel(0x00000002, &axi_qos
->qosconf
);
679 writel(0x00002245, &axi_qos
->qosctset0
);
680 writel(0x00002096, &axi_qos
->qosctset1
);
681 writel(0x00002030, &axi_qos
->qosctset2
);
682 writel(0x00002030, &axi_qos
->qosctset3
);
683 writel(0x00000001, &axi_qos
->qosreqctr
);
684 writel(0x00002064, &axi_qos
->qosthres0
);
685 writel(0x00002004, &axi_qos
->qosthres1
);
686 writel(0x00000000, &axi_qos
->qosthres2
);
687 writel(0x00000001, &axi_qos
->qosqon
);
689 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_STPRO_BASE
;
690 writel(0x00000000, &axi_qos
->qosconf
);
691 writel(0x00002029, &axi_qos
->qosctset0
);
692 writel(0x00002096, &axi_qos
->qosctset1
);
693 writel(0x00002030, &axi_qos
->qosctset2
);
694 writel(0x00002030, &axi_qos
->qosctset3
);
695 writel(0x00000001, &axi_qos
->qosreqctr
);
696 writel(0x00002064, &axi_qos
->qosthres0
);
697 writel(0x00002004, &axi_qos
->qosthres1
);
698 writel(0x00000000, &axi_qos
->qosthres2
);
699 writel(0x00000001, &axi_qos
->qosqon
);
701 axi_qos
= (struct rcar_axi_qos
*)RT_AXI_SY2RT_BASE
;
702 writel(0x00000002, &axi_qos
->qosconf
);
703 writel(0x00002245, &axi_qos
->qosctset0
);
704 writel(0x00000001, &axi_qos
->qosreqctr
);
705 writel(0x00002064, &axi_qos
->qosthres0
);
706 writel(0x00002004, &axi_qos
->qosthres1
);
707 writel(0x00000000, &axi_qos
->qosthres2
);
708 writel(0x00000001, &axi_qos
->qosqon
);
710 /* QoS Register (MP-AXI) */
711 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_ADSP_BASE
;
712 writel(0x00000000, &axi_qos
->qosconf
);
713 writel(0x00002037, &axi_qos
->qosctset0
);
714 writel(0x00000001, &axi_qos
->qosreqctr
);
715 writel(0x00002064, &axi_qos
->qosthres0
);
716 writel(0x00002004, &axi_qos
->qosthres1
);
717 writel(0x00000000, &axi_qos
->qosthres2
);
718 writel(0x00000001, &axi_qos
->qosqon
);
720 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_ASDS0_BASE
;
721 writel(0x00000001, &axi_qos
->qosconf
);
722 writel(0x00002014, &axi_qos
->qosctset0
);
723 writel(0x00000040, &axi_qos
->qosreqctr
);
724 writel(0x00002064, &axi_qos
->qosthres0
);
725 writel(0x00002004, &axi_qos
->qosthres1
);
726 writel(0x00000000, &axi_qos
->qosthres2
);
727 writel(0x00000001, &axi_qos
->qosqon
);
729 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_ASDS1_BASE
;
730 writel(0x00000001, &axi_qos
->qosconf
);
731 writel(0x00002014, &axi_qos
->qosctset0
);
732 writel(0x00000040, &axi_qos
->qosreqctr
);
733 writel(0x00002064, &axi_qos
->qosthres0
);
734 writel(0x00002004, &axi_qos
->qosthres1
);
735 writel(0x00000000, &axi_qos
->qosthres2
);
736 writel(0x00000001, &axi_qos
->qosqon
);
738 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_MLP_BASE
;
739 writel(0x00000001, &axi_qos
->qosconf
);
740 writel(0x00001FF0, &axi_qos
->qosctset0
);
741 writel(0x00000020, &axi_qos
->qosreqctr
);
742 writel(0x00002064, &axi_qos
->qosthres0
);
743 writel(0x00002004, &axi_qos
->qosthres1
);
744 writel(0x00002001, &axi_qos
->qosthres2
);
745 writel(0x00000001, &axi_qos
->qosqon
);
747 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_MMUMP_BASE
;
748 writel(0x00000001, &axi_qos
->qosconf
);
749 writel(0x00002004, &axi_qos
->qosctset0
);
750 writel(0x00002096, &axi_qos
->qosctset1
);
751 writel(0x00002030, &axi_qos
->qosctset2
);
752 writel(0x00002030, &axi_qos
->qosctset3
);
753 writel(0x00000001, &axi_qos
->qosreqctr
);
754 writel(0x00002064, &axi_qos
->qosthres0
);
755 writel(0x00002004, &axi_qos
->qosthres1
);
756 writel(0x00000000, &axi_qos
->qosthres2
);
757 writel(0x00000001, &axi_qos
->qosqon
);
759 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_SPU_BASE
;
760 writel(0x00000000, &axi_qos
->qosconf
);
761 writel(0x00002053, &axi_qos
->qosctset0
);
762 writel(0x00000001, &axi_qos
->qosreqctr
);
763 writel(0x00002064, &axi_qos
->qosthres0
);
764 writel(0x00002004, &axi_qos
->qosthres1
);
765 writel(0x00000000, &axi_qos
->qosthres2
);
766 writel(0x00000001, &axi_qos
->qosqon
);
768 axi_qos
= (struct rcar_axi_qos
*)MP_AXI_SPUC_BASE
;
769 writel(0x00000000, &axi_qos
->qosconf
);
770 writel(0x0000206E, &axi_qos
->qosctset0
);
771 writel(0x00000001, &axi_qos
->qosreqctr
);
772 writel(0x00002064, &axi_qos
->qosthres0
);
773 writel(0x00002004, &axi_qos
->qosthres1
);
774 writel(0x00000000, &axi_qos
->qosthres2
);
775 writel(0x00000001, &axi_qos
->qosqon
);
777 /* QoS Register (SYS-AXI256) */
778 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI256_AXI128TO256_BASE
;
779 writel(0x00000002, &axi_qos
->qosconf
);
780 if (IS_R8A7791_ES2())
781 writel(0x000020EB, &axi_qos
->qosctset0
);
783 writel(0x00002245, &axi_qos
->qosctset0
);
784 writel(0x00002096, &axi_qos
->qosctset1
);
785 writel(0x00002030, &axi_qos
->qosctset2
);
786 writel(0x00002030, &axi_qos
->qosctset3
);
787 writel(0x00000001, &axi_qos
->qosreqctr
);
788 writel(0x00002064, &axi_qos
->qosthres0
);
789 writel(0x00002004, &axi_qos
->qosthres1
);
790 writel(0x00000000, &axi_qos
->qosthres2
);
791 writel(0x00000001, &axi_qos
->qosqon
);
793 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI256_SYX_BASE
;
794 writel(0x00000002, &axi_qos
->qosconf
);
795 if (IS_R8A7791_ES2())
796 writel(0x000020EB, &axi_qos
->qosctset0
);
798 writel(0x00002245, &axi_qos
->qosctset0
);
799 writel(0x00002096, &axi_qos
->qosctset1
);
800 writel(0x00002030, &axi_qos
->qosctset2
);
801 writel(0x00002030, &axi_qos
->qosctset3
);
802 writel(0x00000001, &axi_qos
->qosreqctr
);
803 writel(0x00002064, &axi_qos
->qosthres0
);
804 writel(0x00002004, &axi_qos
->qosthres1
);
805 writel(0x00000000, &axi_qos
->qosthres2
);
806 writel(0x00000001, &axi_qos
->qosqon
);
808 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI256_MPX_BASE
;
809 writel(0x00000002, &axi_qos
->qosconf
);
810 if (IS_R8A7791_ES2())
811 writel(0x000020EB, &axi_qos
->qosctset0
);
813 writel(0x00002245, &axi_qos
->qosctset0
);
814 writel(0x00002096, &axi_qos
->qosctset1
);
815 writel(0x00002030, &axi_qos
->qosctset2
);
816 writel(0x00002030, &axi_qos
->qosctset3
);
817 writel(0x00000001, &axi_qos
->qosreqctr
);
818 writel(0x00002064, &axi_qos
->qosthres0
);
819 writel(0x00002004, &axi_qos
->qosthres1
);
820 writel(0x00000000, &axi_qos
->qosthres2
);
821 writel(0x00000001, &axi_qos
->qosqon
);
823 axi_qos
= (struct rcar_axi_qos
*)SYS_AXI256_MXI_BASE
;
824 writel(0x00000002, &axi_qos
->qosconf
);
825 writel(0x00002245, &axi_qos
->qosctset0
);
826 writel(0x00002096, &axi_qos
->qosctset1
);
827 writel(0x00002030, &axi_qos
->qosctset2
);
828 writel(0x00002030, &axi_qos
->qosctset3
);
829 writel(0x00000001, &axi_qos
->qosreqctr
);
830 writel(0x00002064, &axi_qos
->qosthres0
);
831 writel(0x00002004, &axi_qos
->qosthres1
);
832 writel(0x00000000, &axi_qos
->qosthres2
);
833 writel(0x00000001, &axi_qos
->qosqon
);
835 /* QoS Register (CCI-AXI) */
836 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUS0_BASE
;
837 writel(0x00000001, &axi_qos
->qosconf
);
838 writel(0x00002004, &axi_qos
->qosctset0
);
839 writel(0x00002096, &axi_qos
->qosctset1
);
840 writel(0x00002030, &axi_qos
->qosctset2
);
841 writel(0x00002030, &axi_qos
->qosctset3
);
842 writel(0x00000001, &axi_qos
->qosreqctr
);
843 writel(0x00002064, &axi_qos
->qosthres0
);
844 writel(0x00002004, &axi_qos
->qosthres1
);
845 writel(0x00000000, &axi_qos
->qosthres2
);
846 writel(0x00000001, &axi_qos
->qosqon
);
848 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_SYX2_BASE
;
849 writel(0x00000002, &axi_qos
->qosconf
);
850 writel(0x00002245, &axi_qos
->qosctset0
);
851 writel(0x00002096, &axi_qos
->qosctset1
);
852 writel(0x00002030, &axi_qos
->qosctset2
);
853 writel(0x00002030, &axi_qos
->qosctset3
);
854 writel(0x00000001, &axi_qos
->qosreqctr
);
855 writel(0x00002064, &axi_qos
->qosthres0
);
856 writel(0x00002004, &axi_qos
->qosthres1
);
857 writel(0x00000000, &axi_qos
->qosthres2
);
858 writel(0x00000001, &axi_qos
->qosqon
);
860 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUR_BASE
;
861 writel(0x00000001, &axi_qos
->qosconf
);
862 writel(0x00002004, &axi_qos
->qosctset0
);
863 writel(0x00002096, &axi_qos
->qosctset1
);
864 writel(0x00002030, &axi_qos
->qosctset2
);
865 writel(0x00002030, &axi_qos
->qosctset3
);
866 writel(0x00000001, &axi_qos
->qosreqctr
);
867 writel(0x00002064, &axi_qos
->qosthres0
);
868 writel(0x00002004, &axi_qos
->qosthres1
);
869 writel(0x00000000, &axi_qos
->qosthres2
);
870 writel(0x00000001, &axi_qos
->qosqon
);
872 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUDS_BASE
;
873 writel(0x00000001, &axi_qos
->qosconf
);
874 writel(0x00002004, &axi_qos
->qosctset0
);
875 writel(0x00002096, &axi_qos
->qosctset1
);
876 writel(0x00002030, &axi_qos
->qosctset2
);
877 writel(0x00002030, &axi_qos
->qosctset3
);
878 writel(0x00000001, &axi_qos
->qosreqctr
);
879 writel(0x00002064, &axi_qos
->qosthres0
);
880 writel(0x00002004, &axi_qos
->qosthres1
);
881 writel(0x00000000, &axi_qos
->qosthres2
);
882 writel(0x00000001, &axi_qos
->qosqon
);
884 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUM_BASE
;
885 writel(0x00000001, &axi_qos
->qosconf
);
886 writel(0x00002004, &axi_qos
->qosctset0
);
887 writel(0x00002096, &axi_qos
->qosctset1
);
888 writel(0x00002030, &axi_qos
->qosctset2
);
889 writel(0x00002030, &axi_qos
->qosctset3
);
890 writel(0x00000001, &axi_qos
->qosreqctr
);
891 writel(0x00002064, &axi_qos
->qosthres0
);
892 writel(0x00002004, &axi_qos
->qosthres1
);
893 writel(0x00000000, &axi_qos
->qosthres2
);
894 writel(0x00000001, &axi_qos
->qosqon
);
896 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MXI_BASE
;
897 writel(0x00000002, &axi_qos
->qosconf
);
898 writel(0x00002245, &axi_qos
->qosctset0
);
899 writel(0x00002096, &axi_qos
->qosctset1
);
900 writel(0x00002030, &axi_qos
->qosctset2
);
901 writel(0x00002030, &axi_qos
->qosctset3
);
902 writel(0x00000001, &axi_qos
->qosreqctr
);
903 writel(0x00002064, &axi_qos
->qosthres0
);
904 writel(0x00002004, &axi_qos
->qosthres1
);
905 writel(0x00000000, &axi_qos
->qosthres2
);
906 writel(0x00000001, &axi_qos
->qosqon
);
908 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUS1_BASE
;
909 writel(0x00000001, &axi_qos
->qosconf
);
910 writel(0x00002004, &axi_qos
->qosctset0
);
911 writel(0x00002096, &axi_qos
->qosctset1
);
912 writel(0x00002030, &axi_qos
->qosctset2
);
913 writel(0x00002030, &axi_qos
->qosctset3
);
914 writel(0x00000001, &axi_qos
->qosreqctr
);
915 writel(0x00002064, &axi_qos
->qosthres0
);
916 writel(0x00002004, &axi_qos
->qosthres1
);
917 writel(0x00000000, &axi_qos
->qosthres2
);
918 writel(0x00000001, &axi_qos
->qosqon
);
920 axi_qos
= (struct rcar_axi_qos
*)CCI_AXI_MMUMP_BASE
;
921 writel(0x00000001, &axi_qos
->qosconf
);
922 writel(0x00002004, &axi_qos
->qosctset0
);
923 writel(0x00002096, &axi_qos
->qosctset1
);
924 writel(0x00002030, &axi_qos
->qosctset2
);
925 writel(0x00002030, &axi_qos
->qosctset3
);
926 writel(0x00000001, &axi_qos
->qosreqctr
);
927 writel(0x00002064, &axi_qos
->qosthres0
);
928 writel(0x00002004, &axi_qos
->qosthres1
);
929 writel(0x00000000, &axi_qos
->qosthres2
);
930 writel(0x00000001, &axi_qos
->qosqon
);
932 /* QoS Register (Media-AXI) */
933 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_MXR_BASE
;
934 writel(0x00000002, &axi_qos
->qosconf
);
935 writel(0x000020DC, &axi_qos
->qosctset0
);
936 writel(0x00002096, &axi_qos
->qosctset1
);
937 writel(0x00002030, &axi_qos
->qosctset2
);
938 writel(0x00002030, &axi_qos
->qosctset3
);
939 writel(0x00000020, &axi_qos
->qosreqctr
);
940 writel(0x000020AA, &axi_qos
->qosthres0
);
941 writel(0x00002032, &axi_qos
->qosthres1
);
942 writel(0x00000001, &axi_qos
->qosthres2
);
944 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_MXW_BASE
;
945 writel(0x00000002, &axi_qos
->qosconf
);
946 writel(0x000020DC, &axi_qos
->qosctset0
);
947 writel(0x00002096, &axi_qos
->qosctset1
);
948 writel(0x00002030, &axi_qos
->qosctset2
);
949 writel(0x00002030, &axi_qos
->qosctset3
);
950 writel(0x00000020, &axi_qos
->qosreqctr
);
951 writel(0x000020AA, &axi_qos
->qosthres0
);
952 writel(0x00002032, &axi_qos
->qosthres1
);
953 writel(0x00000001, &axi_qos
->qosthres2
);
955 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_JPR_BASE
;
956 writel(0x00000001, &axi_qos
->qosconf
);
957 writel(0x00002190, &axi_qos
->qosctset0
);
958 writel(0x00000020, &axi_qos
->qosreqctr
);
959 writel(0x00002064, &axi_qos
->qosthres0
);
960 writel(0x00002004, &axi_qos
->qosthres1
);
961 writel(0x00000001, &axi_qos
->qosthres2
);
962 writel(0x00000001, &axi_qos
->qosqon
);
964 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_JPW_BASE
;
965 writel(0x00000001, &axi_qos
->qosconf
);
966 writel(0x00002190, &axi_qos
->qosctset0
);
967 writel(0x00000020, &axi_qos
->qosreqctr
);
968 if (IS_R8A7791_ES2()) {
969 writel(0x00000001, &axi_qos
->qosthres0
);
970 writel(0x00000001, &axi_qos
->qosthres1
);
972 writel(0x00002064, &axi_qos
->qosthres0
);
973 writel(0x00002004, &axi_qos
->qosthres1
);
975 writel(0x00000001, &axi_qos
->qosthres2
);
976 writel(0x00000001, &axi_qos
->qosqon
);
978 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_TDMR_BASE
;
979 writel(0x00000001, &axi_qos
->qosconf
);
980 writel(0x00002190, &axi_qos
->qosctset0
);
981 writel(0x00000020, &axi_qos
->qosreqctr
);
982 writel(0x00002064, &axi_qos
->qosthres0
);
983 writel(0x00002004, &axi_qos
->qosthres1
);
984 writel(0x00000001, &axi_qos
->qosthres2
);
985 writel(0x00000001, &axi_qos
->qosqon
);
987 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_TDMW_BASE
;
988 writel(0x00000001, &axi_qos
->qosconf
);
989 writel(0x00002190, &axi_qos
->qosctset0
);
990 writel(0x00000020, &axi_qos
->qosreqctr
);
991 writel(0x00002064, &axi_qos
->qosthres0
);
992 writel(0x00002004, &axi_qos
->qosthres1
);
993 writel(0x00000001, &axi_qos
->qosthres2
);
994 writel(0x00000001, &axi_qos
->qosqon
);
996 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSP1CR_BASE
;
997 writel(0x00000001, &axi_qos
->qosconf
);
998 writel(0x00002190, &axi_qos
->qosctset0
);
999 writel(0x00000020, &axi_qos
->qosreqctr
);
1000 writel(0x00002064, &axi_qos
->qosthres0
);
1001 writel(0x00002004, &axi_qos
->qosthres1
);
1002 writel(0x00000001, &axi_qos
->qosthres2
);
1003 writel(0x00000001, &axi_qos
->qosqon
);
1005 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSP1CW_BASE
;
1006 writel(0x00000001, &axi_qos
->qosconf
);
1007 writel(0x00002190, &axi_qos
->qosctset0
);
1008 writel(0x00000020, &axi_qos
->qosreqctr
);
1009 if (IS_R8A7791_ES2()) {
1010 writel(0x00000001, &axi_qos
->qosthres0
);
1011 writel(0x00000001, &axi_qos
->qosthres1
);
1013 writel(0x00002064, &axi_qos
->qosthres0
);
1014 writel(0x00002004, &axi_qos
->qosthres1
);
1016 writel(0x00000001, &axi_qos
->qosthres2
);
1017 writel(0x00000001, &axi_qos
->qosqon
);
1019 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPDU0CR_BASE
;
1020 writel(0x00000001, &axi_qos
->qosconf
);
1021 writel(0x00002190, &axi_qos
->qosctset0
);
1022 writel(0x00000020, &axi_qos
->qosreqctr
);
1023 writel(0x00002064, &axi_qos
->qosthres0
);
1024 writel(0x00002004, &axi_qos
->qosthres1
);
1025 writel(0x00000001, &axi_qos
->qosthres2
);
1026 writel(0x00000001, &axi_qos
->qosqon
);
1028 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPDU0CW_BASE
;
1029 writel(0x00000001, &axi_qos
->qosconf
);
1030 writel(0x00002190, &axi_qos
->qosctset0
);
1031 writel(0x00000020, &axi_qos
->qosreqctr
);
1032 if (IS_R8A7791_ES2()) {
1033 writel(0x00000001, &axi_qos
->qosthres0
);
1034 writel(0x00000001, &axi_qos
->qosthres1
);
1036 writel(0x00002064, &axi_qos
->qosthres0
);
1037 writel(0x00002004, &axi_qos
->qosthres1
);
1039 writel(0x00000001, &axi_qos
->qosthres2
);
1040 writel(0x00000001, &axi_qos
->qosqon
);
1042 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPDU1CR_BASE
;
1043 writel(0x00000001, &axi_qos
->qosconf
);
1044 writel(0x00002190, &axi_qos
->qosctset0
);
1045 writel(0x00000020, &axi_qos
->qosreqctr
);
1046 writel(0x00002064, &axi_qos
->qosthres0
);
1047 writel(0x00002004, &axi_qos
->qosthres1
);
1048 writel(0x00000001, &axi_qos
->qosthres2
);
1049 writel(0x00000001, &axi_qos
->qosqon
);
1051 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPDU1CW_BASE
;
1052 writel(0x00000001, &axi_qos
->qosconf
);
1053 writel(0x00002190, &axi_qos
->qosctset0
);
1054 writel(0x00000020, &axi_qos
->qosreqctr
);
1055 if (IS_R8A7791_ES2()) {
1056 writel(0x00000001, &axi_qos
->qosthres0
);
1057 writel(0x00000001, &axi_qos
->qosthres1
);
1059 writel(0x00002064, &axi_qos
->qosthres0
);
1060 writel(0x00002004, &axi_qos
->qosthres1
);
1062 writel(0x00000001, &axi_qos
->qosthres2
);
1063 writel(0x00000001, &axi_qos
->qosqon
);
1065 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VIN0W_BASE
;
1066 writel(0x00000001, &axi_qos
->qosconf
);
1067 if (IS_R8A7791_ES2())
1068 writel(0x00001FF0, &axi_qos
->qosctset0
);
1070 writel(0x000020C8, &axi_qos
->qosctset0
);
1071 writel(0x00000020, &axi_qos
->qosreqctr
);
1072 writel(0x00002064, &axi_qos
->qosthres0
);
1073 writel(0x00002004, &axi_qos
->qosthres1
);
1074 if (IS_R8A7791_ES2())
1075 writel(0x00002001, &axi_qos
->qosthres2
);
1077 writel(0x00000001, &axi_qos
->qosthres2
);
1078 writel(0x00000001, &axi_qos
->qosqon
);
1080 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_FDP0R_BASE
;
1081 writel(0x00000001, &axi_qos
->qosconf
);
1082 writel(0x000020C8, &axi_qos
->qosctset0
);
1083 writel(0x00000020, &axi_qos
->qosreqctr
);
1084 writel(0x00002064, &axi_qos
->qosthres0
);
1085 writel(0x00002004, &axi_qos
->qosthres1
);
1086 writel(0x00000001, &axi_qos
->qosthres2
);
1087 writel(0x00000001, &axi_qos
->qosqon
);
1089 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_FDP0W_BASE
;
1090 writel(0x00000001, &axi_qos
->qosconf
);
1091 writel(0x000020C8, &axi_qos
->qosctset0
);
1092 writel(0x00000020, &axi_qos
->qosreqctr
);
1093 if (IS_R8A7791_ES2()) {
1094 writel(0x00000001, &axi_qos
->qosthres0
);
1095 writel(0x00000001, &axi_qos
->qosthres1
);
1097 writel(0x00002064, &axi_qos
->qosthres0
);
1098 writel(0x00002004, &axi_qos
->qosthres1
);
1100 writel(0x00000001, &axi_qos
->qosthres2
);
1101 writel(0x00000001, &axi_qos
->qosqon
);
1103 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_IMSR_BASE
;
1104 writel(0x00000001, &axi_qos
->qosconf
);
1105 writel(0x000020C8, &axi_qos
->qosctset0
);
1106 writel(0x00000020, &axi_qos
->qosreqctr
);
1107 writel(0x00002064, &axi_qos
->qosthres0
);
1108 writel(0x00002004, &axi_qos
->qosthres1
);
1109 writel(0x00000001, &axi_qos
->qosthres2
);
1110 writel(0x00000001, &axi_qos
->qosqon
);
1112 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_IMSW_BASE
;
1113 writel(0x00000001, &axi_qos
->qosconf
);
1114 writel(0x000020C8, &axi_qos
->qosctset0
);
1115 writel(0x00000020, &axi_qos
->qosreqctr
);
1116 writel(0x00002064, &axi_qos
->qosthres0
);
1117 writel(0x00002004, &axi_qos
->qosthres1
);
1118 writel(0x00000001, &axi_qos
->qosthres2
);
1119 writel(0x00000001, &axi_qos
->qosqon
);
1121 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSP1R_BASE
;
1122 writel(0x00000001, &axi_qos
->qosconf
);
1123 writel(0x000020C8, &axi_qos
->qosctset0
);
1124 writel(0x00000020, &axi_qos
->qosreqctr
);
1125 writel(0x00002064, &axi_qos
->qosthres0
);
1126 writel(0x00002004, &axi_qos
->qosthres1
);
1127 writel(0x00000001, &axi_qos
->qosthres2
);
1128 writel(0x00000001, &axi_qos
->qosqon
);
1130 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSP1W_BASE
;
1131 writel(0x00000001, &axi_qos
->qosconf
);
1132 writel(0x000020C8, &axi_qos
->qosctset0
);
1133 writel(0x00000020, &axi_qos
->qosreqctr
);
1134 if (IS_R8A7791_ES2()) {
1135 writel(0x00000001, &axi_qos
->qosthres0
);
1136 writel(0x00000001, &axi_qos
->qosthres1
);
1138 writel(0x00002064, &axi_qos
->qosthres0
);
1139 writel(0x00002004, &axi_qos
->qosthres1
);
1141 writel(0x00000001, &axi_qos
->qosthres2
);
1142 writel(0x00000001, &axi_qos
->qosqon
);
1144 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_FDP1R_BASE
;
1145 writel(0x00000001, &axi_qos
->qosconf
);
1146 writel(0x000020C8, &axi_qos
->qosctset0
);
1147 writel(0x00000020, &axi_qos
->qosreqctr
);
1148 writel(0x00002064, &axi_qos
->qosthres0
);
1149 writel(0x00002004, &axi_qos
->qosthres1
);
1150 writel(0x00000001, &axi_qos
->qosthres2
);
1151 writel(0x00000001, &axi_qos
->qosqon
);
1153 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_FDP1W_BASE
;
1154 writel(0x00000001, &axi_qos
->qosconf
);
1155 writel(0x000020C8, &axi_qos
->qosctset0
);
1156 writel(0x00000020, &axi_qos
->qosreqctr
);
1157 if (IS_R8A7791_ES2()) {
1158 writel(0x00000001, &axi_qos
->qosthres0
);
1159 writel(0x00000001, &axi_qos
->qosthres1
);
1161 writel(0x00002064, &axi_qos
->qosthres0
);
1162 writel(0x00002004, &axi_qos
->qosthres1
);
1164 writel(0x00000001, &axi_qos
->qosthres2
);
1165 writel(0x00000001, &axi_qos
->qosqon
);
1167 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_IMRR_BASE
;
1168 writel(0x00000001, &axi_qos
->qosconf
);
1169 writel(0x000020C8, &axi_qos
->qosctset0
);
1170 writel(0x00000020, &axi_qos
->qosreqctr
);
1171 writel(0x00002064, &axi_qos
->qosthres0
);
1172 writel(0x00002004, &axi_qos
->qosthres1
);
1173 writel(0x00000001, &axi_qos
->qosthres2
);
1174 writel(0x00000001, &axi_qos
->qosqon
);
1176 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_IMRW_BASE
;
1177 writel(0x00000001, &axi_qos
->qosconf
);
1178 writel(0x000020C8, &axi_qos
->qosctset0
);
1179 writel(0x00000020, &axi_qos
->qosreqctr
);
1180 writel(0x00002064, &axi_qos
->qosthres0
);
1181 writel(0x00002004, &axi_qos
->qosthres1
);
1182 writel(0x00000001, &axi_qos
->qosthres2
);
1183 writel(0x00000001, &axi_qos
->qosqon
);
1185 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPD0R_BASE
;
1186 if (IS_R8A7791_ES2())
1187 writel(0x00000003, &axi_qos
->qosconf
);
1189 writel(0x00000000, &axi_qos
->qosconf
);
1190 writel(0x000020C8, &axi_qos
->qosctset0
);
1191 writel(0x00002064, &axi_qos
->qosthres0
);
1192 writel(0x00002004, &axi_qos
->qosthres1
);
1193 writel(0x00000001, &axi_qos
->qosthres2
);
1194 writel(0x00000001, &axi_qos
->qosqon
);
1196 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPD0W_BASE
;
1197 if (IS_R8A7791_ES2())
1198 writel(0x00000003, &axi_qos
->qosconf
);
1200 writel(0x00000000, &axi_qos
->qosconf
);
1201 writel(0x000020C8, &axi_qos
->qosctset0
);
1202 writel(0x00002064, &axi_qos
->qosthres0
);
1203 writel(0x00002004, &axi_qos
->qosthres1
);
1204 writel(0x00000001, &axi_qos
->qosthres2
);
1205 writel(0x00000001, &axi_qos
->qosqon
);
1207 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPD1R_BASE
;
1208 if (IS_R8A7791_ES2())
1209 writel(0x00000003, &axi_qos
->qosconf
);
1211 writel(0x00000000, &axi_qos
->qosconf
);
1212 writel(0x000020C8, &axi_qos
->qosctset0
);
1213 writel(0x00002064, &axi_qos
->qosthres0
);
1214 writel(0x00002004, &axi_qos
->qosthres1
);
1215 writel(0x00000001, &axi_qos
->qosthres2
);
1216 writel(0x00000001, &axi_qos
->qosqon
);
1218 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VSPD1W_BASE
;
1219 if (IS_R8A7791_ES2())
1220 writel(0x00000003, &axi_qos
->qosconf
);
1222 writel(0x00000000, &axi_qos
->qosconf
);
1223 writel(0x000020C8, &axi_qos
->qosctset0
);
1224 writel(0x00002064, &axi_qos
->qosthres0
);
1225 writel(0x00002004, &axi_qos
->qosthres1
);
1226 writel(0x00000001, &axi_qos
->qosthres2
);
1227 writel(0x00000001, &axi_qos
->qosqon
);
1229 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_DU0R_BASE
;
1230 if (IS_R8A7791_ES2())
1231 writel(0x00000003, &axi_qos
->qosconf
);
1233 writel(0x00000000, &axi_qos
->qosconf
);
1234 writel(0x00002063, &axi_qos
->qosctset0
);
1235 writel(0x00000001, &axi_qos
->qosreqctr
);
1236 writel(0x00002064, &axi_qos
->qosthres0
);
1237 writel(0x00002004, &axi_qos
->qosthres1
);
1238 writel(0x00000001, &axi_qos
->qosthres2
);
1239 writel(0x00000001, &axi_qos
->qosqon
);
1241 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_DU0W_BASE
;
1242 if (IS_R8A7791_ES2())
1243 writel(0x00000000, &axi_qos
->qosconf
);
1245 writel(0x00000000, &axi_qos
->qosconf
);
1246 writel(0x00002063, &axi_qos
->qosctset0
);
1247 writel(0x00000001, &axi_qos
->qosreqctr
);
1248 writel(0x00002064, &axi_qos
->qosthres0
);
1249 writel(0x00002004, &axi_qos
->qosthres1
);
1250 writel(0x00000001, &axi_qos
->qosthres2
);
1251 writel(0x00000001, &axi_qos
->qosqon
);
1253 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VCP0CR_BASE
;
1254 writel(0x00000001, &axi_qos
->qosconf
);
1255 writel(0x00002073, &axi_qos
->qosctset0
);
1256 writel(0x00000020, &axi_qos
->qosreqctr
);
1257 writel(0x00002064, &axi_qos
->qosthres0
);
1258 writel(0x00002004, &axi_qos
->qosthres1
);
1259 writel(0x00000001, &axi_qos
->qosthres2
);
1260 writel(0x00000001, &axi_qos
->qosqon
);
1262 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VCP0CW_BASE
;
1263 writel(0x00000001, &axi_qos
->qosconf
);
1264 writel(0x00002073, &axi_qos
->qosctset0
);
1265 writel(0x00000020, &axi_qos
->qosreqctr
);
1266 if (IS_R8A7791_ES2()) {
1267 writel(0x00000001, &axi_qos
->qosthres0
);
1268 writel(0x00000001, &axi_qos
->qosthres1
);
1270 writel(0x00002064, &axi_qos
->qosthres0
);
1271 writel(0x00002004, &axi_qos
->qosthres1
);
1273 writel(0x00000001, &axi_qos
->qosthres2
);
1274 writel(0x00000001, &axi_qos
->qosqon
);
1276 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VCP0VR_BASE
;
1277 writel(0x00000001, &axi_qos
->qosconf
);
1278 writel(0x00002073, &axi_qos
->qosctset0
);
1279 writel(0x00000020, &axi_qos
->qosreqctr
);
1280 writel(0x00002064, &axi_qos
->qosthres0
);
1281 writel(0x00002004, &axi_qos
->qosthres1
);
1282 writel(0x00000001, &axi_qos
->qosthres2
);
1283 writel(0x00000001, &axi_qos
->qosqon
);
1285 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VCP0VW_BASE
;
1286 writel(0x00000001, &axi_qos
->qosconf
);
1287 writel(0x00002073, &axi_qos
->qosctset0
);
1288 writel(0x00000020, &axi_qos
->qosreqctr
);
1289 if (IS_R8A7791_ES2()) {
1290 writel(0x00000001, &axi_qos
->qosthres0
);
1291 writel(0x00000001, &axi_qos
->qosthres1
);
1293 writel(0x00002064, &axi_qos
->qosthres0
);
1294 writel(0x00002004, &axi_qos
->qosthres1
);
1296 writel(0x00000001, &axi_qos
->qosthres2
);
1297 writel(0x00000001, &axi_qos
->qosqon
);
1299 axi_qos
= (struct rcar_axi_qos
*)MEDIA_AXI_VPC0R_BASE
;
1300 writel(0x00000001, &axi_qos
->qosconf
);
1301 writel(0x00002073, &axi_qos
->qosctset0
);
1302 writel(0x00000020, &axi_qos
->qosreqctr
);
1303 writel(0x00002064, &axi_qos
->qosthres0
);
1304 writel(0x00002004, &axi_qos
->qosthres1
);
1305 writel(0x00000001, &axi_qos
->qosthres2
);
1306 writel(0x00000001, &axi_qos
->qosqon
);
1308 #else /* CONFIG_RMOBILE_EXTRAM_BOOT */
1312 #endif /* CONFIG_RMOBILE_EXTRAM_BOOT */