board/renesas/sh7785lcr/rtl8169.h

   1 /*
   2  * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #define PCIREG_8(_adr)  (*(volatile unsigned char *)(_adr))
   8 #define PCIREG_32(_adr) (*(volatile unsigned long *)(_adr))
   9 #define PCI_PAR         PCIREG_32(0xfe0401c0)
  10 #define PCI_PDR         PCIREG_32(0xfe040220)
  11 #define PCI_CR          PCIREG_32(0xfe040100)
  12 #define PCI_CONF1       PCIREG_32(0xfe040004)
  13
  14 #define HIGH            1
  15 #define LOW             0
  16
  17 #define PCI_PROG                0x80
  18 #define PCI_EEP_ADDRESS         (unsigned short)0x0007
  19 #define PCI_MAC_ADDRESS_SIZE    3
  20
  21 #define TIME1   100
  22 #define TIME2   20000
  23
  24 #define BIT_DUMMY       0
  25 #define MAC_EEP_READ    1
  26 #define MAC_EEP_WRITE   2
  27 #define MAC_EEP_ERACE   3
  28 #define MAC_EEP_EWEN    4
  29 #define MAC_EEP_EWDS    5
  30
  31 /* RTL8169 */
  32 const unsigned short EEPROM_W_Data_8169_A[] = {
  33         0x8129, 0x10ec, 0x8169, 0x1154, 0x032b,
  34         0x4020, 0xa101
  35 };
  36 const unsigned short EEPROM_W_Data_8169_B[] = {
  37         0x4d15, 0xf7c2, 0x8000, 0x0000, 0x0000, 0x1300,
  38         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  39         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000,
  40         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  41         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  42         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  43         0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
  44 };