1 // SPDX-License-Identifier: GPL-2.0+
3 * board/renesas/ulcb/ulcb.c
4 * This file is ULCB board support.
6 * Copyright (C) 2017 Renesas Electronics Corporation
13 #include <dm/platform_data/serial_sh.h>
14 #include <asm/processor.h>
15 #include <asm/mach-types.h>
17 #include <linux/errno.h>
18 #include <asm/arch/sys_proto.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/rmobile.h>
22 #include <asm/arch/rcar-mstp.h>
23 #include <asm/arch/sh_sdhi.h>
27 DECLARE_GLOBAL_DATA_PTR
;
29 #define CPGWPCR 0xE6150904
30 #define CPGWPR 0xE615090C
32 #define CLK2MHZ(clk) (clk / 1000 / 1000)
35 struct rcar_rwdt
*rwdt
= (struct rcar_rwdt
*)RWDT_BASE
;
36 struct rcar_swdt
*swdt
= (struct rcar_swdt
*)SWDT_BASE
;
39 writel(0xA5A5A500, &rwdt
->rwtcsra
);
40 writel(0xA5A5A500, &swdt
->swtcsra
);
42 writel(0xA5A50000, CPGWPCR
);
43 writel(0xFFFFFFFF, CPGWPR
);
46 #define GSX_MSTP112 BIT(12) /* 3DG */
47 #define TMU0_MSTP125 BIT(25) /* secure */
48 #define TMU1_MSTP124 BIT(24) /* non-secure */
49 #define SCIF2_MSTP310 BIT(10) /* SCIF2 */
50 #define DVFS_MSTP926 BIT(26)
51 #define HSUSB_MSTP704 BIT(4) /* HSUSB */
53 int board_early_init_f(void)
55 /* TMU0,1 */ /* which use ? */
56 mstp_clrbits_le32(MSTPSR1
, SMSTPCR1
, TMU0_MSTP125
| TMU1_MSTP124
);
58 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
60 mstp_clrbits_le32(MSTPSR9
, SMSTPCR9
, DVFS_MSTP926
);
66 /* R/- 32 Power status register 2(3DG) */
67 #define SYSC_PWRSR2 0xE6180100
68 /* -/W 32 Power resume control register 2 (3DG) */
69 #define SYSC_PWRONCR2 0xE618010C
71 /* HSUSB block registers */
72 #define HSUSB_REG_LPSTS 0xE6590102
73 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
74 #define HSUSB_REG_UGCTRL2 0xE6590184
75 #define HSUSB_REG_UGCTRL2_USB0SEL 0x30
76 #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
80 /* adress of boot parameters */
81 gd
->bd
->bi_boot_params
= CONFIG_SYS_TEXT_BASE
+ 0x50000;
84 setbits_le32(PFC_PUEN6
, PUEN_USB1_OVC
| PUEN_USB1_PWEN
);
86 /* Configure the HSUSB block */
87 mstp_clrbits_le32(MSTPSR7
, SMSTPCR7
, HSUSB_MSTP704
);
89 clrsetbits_le32(HSUSB_REG_UGCTRL2
, HSUSB_REG_UGCTRL2_USB0SEL
,
90 HSUSB_REG_UGCTRL2_USB0SEL_EHCI
);
91 /* low power status */
92 setbits_le16(HSUSB_REG_LPSTS
, HSUSB_REG_LPSTS_SUSPM_NORMAL
);
99 if (fdtdec_setup_mem_size_base() != 0)
105 int dram_init_banksize(void)
107 fdtdec_setup_memory_banksize();