3 * Ilko Iliev <iliev@ronetix.at>
4 * Asen Dimov <dimov@ronetix.at>
5 * Ronetix GmbH <www.ronetix.at>
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian.pop@leadtechdesign.com>
9 * Lead Tech Design <www.leadtechdesign.com>
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/sizes.h>
32 #include <asm/arch/at91sam9g45.h>
33 #include <asm/arch/at91sam9_smc.h>
34 #include <asm/arch/at91_common.h>
35 #include <asm/arch/at91_pmc.h>
36 #include <asm/arch/at91_rstc.h>
37 #include <asm/arch/at91_matrix.h>
38 #include <asm/arch/at91_pio.h>
39 #include <asm/arch/clk.h>
40 #include <asm/arch/io.h>
41 #include <asm/arch/hardware.h>
42 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
47 DECLARE_GLOBAL_DATA_PTR
;
50 * Miscelaneous platform dependent initialisations
53 #ifdef CONFIG_CMD_NAND
54 static void pm9g45_nand_hw_init(void)
57 at91_smc_t
*smc
= (at91_smc_t
*) AT91_SMC_BASE
;
58 at91_matrix_t
*matrix
= (at91_matrix_t
*) AT91_MATRIX_BASE
;
59 at91_pmc_t
*pmc
= (at91_pmc_t
*) AT91_PMC_BASE
;
62 csa
= readl(&matrix
->ccr
[6]) | AT91_MATRIX_CSA_EBI_CS3A
;
63 writel(csa
, &matrix
->ccr
[6]);
65 /* Configure SMC CS3 for NAND/SmartMedia */
66 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
67 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
70 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
71 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
74 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
77 writel(AT91_SMC_MODE_RM_NRD
| AT91_SMC_MODE_WM_NWE
|
78 AT91_SMC_MODE_EXNW_DISABLE
|
80 AT91_SMC_MODE_TDF_CYCLE(3),
83 writel(1 << AT91SAM9G45_ID_PIOC
, &pmc
->pcer
);
85 #ifdef CONFIG_SYS_NAND_READY_PIN
86 /* Configure RDY/BSY */
87 at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN
, 1);
90 /* Enable NandFlash */
91 at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN
, 1);
96 static void pm9g45_macb_hw_init(void)
98 at91_pmc_t
*pmc
= (at91_pmc_t
*) AT91_PMC_BASE
;
101 * PD2 enables the 50MHz oscillator for Ethernet PHY
105 at91_set_pio_output(AT91_PIO_PORTD
, 2, 1);
106 at91_set_pio_value(AT91_PIO_PORTD
, 2, 1); /* 1- enable, 0 - disable */
109 writel(1 << AT91SAM9G45_ID_EMAC
, &pmc
->pcer
);
112 * Disable pull-up on:
113 * RXDV (PA15) => PHY normal mode (not Test mode)
114 * ERX0 (PA12) => PHY ADDR0
115 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
117 * PHY has internal pull-down
119 at91_set_pio_pullup(AT91_PIO_PORTA
, 15, 0);
120 at91_set_pio_pullup(AT91_PIO_PORTA
, 12, 0);
121 at91_set_pio_pullup(AT91_PIO_PORTA
, 13, 0);
123 /* Re-enable pull-up */
124 at91_set_pio_pullup(AT91_PIO_PORTA
, 15, 1);
125 at91_set_pio_pullup(AT91_PIO_PORTA
, 12, 1);
126 at91_set_pio_pullup(AT91_PIO_PORTA
, 13, 1);
134 at91_pmc_t
*pmc
= (at91_pmc_t
*) AT91_PMC_BASE
;
139 writel((1 << AT91SAM9G45_ID_PIOA
) |
140 (1 << AT91SAM9G45_ID_PIOB
) |
141 (1 << AT91SAM9G45_ID_PIOC
) |
142 (1 << AT91SAM9G45_ID_PIODE
), &pmc
->pcer
);
144 /* arch number of AT91SAM9M10G45EK-Board */
145 gd
->bd
->bi_arch_number
= MACH_TYPE_PM9G45
;
146 /* adress of boot parameters */
147 gd
->bd
->bi_boot_params
= PHYS_SDRAM
+ 0x100;
149 at91_serial_hw_init();
150 #ifdef CONFIG_CMD_NAND
151 pm9g45_nand_hw_init();
155 pm9g45_macb_hw_init();
162 /* dram_init must store complete ramsize in gd->ram_size */
163 gd
->ram_size
= get_ram_size((volatile void *)PHYS_SDRAM
,
168 void dram_init_banksize(void)
170 gd
->bd
->bi_dram
[0].start
= PHYS_SDRAM
;
171 gd
->bd
->bi_dram
[0].size
= PHYS_SDRAM_SIZE
;
174 #ifdef CONFIG_RESET_PHY_R
179 * Initialize ethernet HW addr prior to starting Linux,
187 int board_eth_init(bd_t
*bis
)
191 rc
= macb_eth_initialize(0, (void *)AT91_EMAC_BASE
, 0x01);