board/samsung/trats2/trats2.c

   1 /*
   2  * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
   3  * Sanghee Kim <sh0130.kim@samsung.com>
   4  * Piotr Wilczek <p.wilczek@samsung.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <lcd.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/gpio.h>
  13 #include <asm/arch/mmc.h>
  14 #include <asm/arch/power.h>
  15 #include <asm/arch/clk.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/arch/mipi_dsim.h>
  18 #include <asm/arch/pinmux.h>
  19 #include <asm/arch/power.h>
  20 #include <power/pmic.h>
  21 #include <power/max77686_pmic.h>
  22 #include <power/battery.h>
  23 #include <power/max77693_pmic.h>
  24 #include <power/max77693_muic.h>
  25 #include <power/max77693_fg.h>
  26 #include <libtizen.h>
  27 #include <errno.h>
  28 #include <usb.h>
  29 #include <usb/s3c_udc.h>
  30 #include <usb_mass_storage.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 static struct exynos4x12_gpio_part1 *gpio1;
  35 static struct exynos4x12_gpio_part2 *gpio2;
  36
  37 static unsigned int board_rev = -1;
  38
  39 static inline u32 get_model_rev(void);
  40
  41 static void check_hw_revision(void)
  42 {
  43         int modelrev = 0;
  44         int i;
  45
  46         gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
  47
  48         /*
  49          * GPM1[1:0]: MODEL_REV[1:0]
  50          * Don't set as pull-none for these N/C pin.
  51          * TRM say that it may cause unexcepted state and leakage current.
  52          * and pull-none is only for output function.
  53          */
  54         for (i = 0; i < 2; i++)
  55                 s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
  56
  57         /* GPM1[5:2]: HW_REV[3:0] */
  58         for (i = 2; i < 6; i++) {
  59                 s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
  60                 s5p_gpio_set_pull(&gpio2->m1, i, GPIO_PULL_NONE);
  61         }
  62
  63         /* GPM1[1:0]: MODEL_REV[1:0] */
  64         for (i = 0; i < 2; i++)
  65                 modelrev |= (s5p_gpio_get_value(&gpio2->m1, i) << i);
  66
  67         /* board_rev[15:8] = model */
  68         board_rev = modelrev << 8;
  69 }
  70
  71 #ifdef CONFIG_DISPLAY_BOARDINFO
  72 int checkboard(void)
  73 {
  74         puts("Board:\tTRATS2\n");
  75         return 0;
  76 }
  77 #endif
  78
  79 static void show_hw_revision(void)
  80 {
  81         printf("HW Revision:\t0x%04x\n", board_rev);
  82 }
  83
  84 u32 get_board_rev(void)
  85 {
  86         return board_rev;
  87 }
  88
  89 static inline u32 get_model_rev(void)
  90 {
  91         return (board_rev >> 8) & 0xff;
  92 }
  93
  94 static void board_external_gpio_init(void)
  95 {
  96         gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
  97
  98         /*
  99          * some pins which in alive block are connected with external pull-up
 100          * but it's default setting is pull-down.
 101          * if that pin set as input then that floated
 102          */
 103
 104         s5p_gpio_set_pull(&gpio2->x0, 2, GPIO_PULL_NONE);       /* PS_ALS_INT */
 105         s5p_gpio_set_pull(&gpio2->x0, 4, GPIO_PULL_NONE);       /* TSP_nINT */
 106         s5p_gpio_set_pull(&gpio2->x0, 7, GPIO_PULL_NONE);       /* AP_PMIC_IRQ*/
 107         s5p_gpio_set_pull(&gpio2->x1, 5, GPIO_PULL_NONE);       /* IF_PMIC_IRQ*/
 108         s5p_gpio_set_pull(&gpio2->x2, 0, GPIO_PULL_NONE);       /* VOL_UP */
 109         s5p_gpio_set_pull(&gpio2->x2, 1, GPIO_PULL_NONE);       /* VOL_DOWN */
 110         s5p_gpio_set_pull(&gpio2->x2, 3, GPIO_PULL_NONE);       /* FUEL_ALERT */
 111         s5p_gpio_set_pull(&gpio2->x2, 4, GPIO_PULL_NONE);       /* ADC_INT */
 112         s5p_gpio_set_pull(&gpio2->x2, 7, GPIO_PULL_NONE);       /* nPOWER */
 113         s5p_gpio_set_pull(&gpio2->x3, 0, GPIO_PULL_NONE);       /* WPC_INT */
 114         s5p_gpio_set_pull(&gpio2->x3, 5, GPIO_PULL_NONE);       /* OK_KEY */
 115         s5p_gpio_set_pull(&gpio2->x3, 7, GPIO_PULL_NONE);       /* HDMI_HPD */
 116 }
 117
 118 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 119 static void board_init_i2c(void)
 120 {
 121         int err;
 122
 123         gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
 124         gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
 125
 126         /* I2C_7 */
 127         err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
 128         if (err) {
 129                 debug("I2C%d not configured\n", (I2C_7));
 130                 return;
 131         }
 132
 133         /* I2C_8 */
 134         s5p_gpio_direction_output(&gpio1->f1, 4, 1);
 135         s5p_gpio_direction_output(&gpio1->f1, 5, 1);
 136
 137         /* I2C_9 */
 138         s5p_gpio_direction_output(&gpio2->m2, 1, 1);
 139         s5p_gpio_direction_output(&gpio2->m2, 0, 1);
 140 }
 141 #endif
 142
 143 #ifdef CONFIG_SYS_I2C_SOFT
 144 int get_soft_i2c_scl_pin(void)
 145 {
 146         if (I2C_ADAP_HWNR)
 147                 return exynos4x12_gpio_part2_get_nr(m2, 1); /* I2C9 */
 148         else
 149                 return exynos4x12_gpio_part1_get_nr(f1, 4); /* I2C8 */
 150 }
 151
 152 int get_soft_i2c_sda_pin(void)
 153 {
 154         if (I2C_ADAP_HWNR)
 155                 return exynos4x12_gpio_part2_get_nr(m2, 0); /* I2C9 */
 156         else
 157                 return exynos4x12_gpio_part1_get_nr(f1, 5); /* I2C8 */
 158 }
 159 #endif
 160
 161 int board_early_init_f(void)
 162 {
 163         check_hw_revision();
 164         board_external_gpio_init();
 165
 166         gd->flags |= GD_FLG_DISABLE_CONSOLE;
 167
 168         return 0;
 169 }
 170
 171 static int pmic_init_max77686(void);
 172
 173 int board_init(void)
 174 {
 175         struct exynos4_power *pwr =
 176                 (struct exynos4_power *)samsung_get_base_power();
 177
 178         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 179
 180         /* workaround: clear INFORM4..5 */
 181         writel(0, (unsigned int)&pwr->inform4);
 182         writel(0, (unsigned int)&pwr->inform5);
 183
 184         return 0;
 185 }
 186
 187 int power_init_board(void)
 188 {
 189         int chrg;
 190         struct power_battery *pb;
 191         struct pmic *p_chrg, *p_muic, *p_fg, *p_bat;
 192
 193 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 194         board_init_i2c();
 195 #endif
 196         pmic_init(I2C_7);               /* I2C adapter 7 - bus name s3c24x0_7 */
 197         pmic_init_max77686();
 198         pmic_init_max77693(I2C_10);     /* I2C adapter 10 - bus name soft1 */
 199         power_muic_init(I2C_10);        /* I2C adapter 10 - bus name soft1 */
 200         power_fg_init(I2C_9);           /* I2C adapter 9 - bus name soft0 */
 201         power_bat_init(0);
 202
 203         p_chrg = pmic_get("MAX77693_PMIC");
 204         if (!p_chrg) {
 205                 puts("MAX77693_PMIC: Not found\n");
 206                 return -ENODEV;
 207         }
 208
 209         p_muic = pmic_get("MAX77693_MUIC");
 210         if (!p_muic) {
 211                 puts("MAX77693_MUIC: Not found\n");
 212                 return -ENODEV;
 213         }
 214
 215         p_fg = pmic_get("MAX77693_FG");
 216         if (!p_fg) {
 217                 puts("MAX17042_FG: Not found\n");
 218                 return -ENODEV;
 219         }
 220
 221         if (p_chrg->chrg->chrg_bat_present(p_chrg) == 0)
 222                 puts("No battery detected\n");
 223
 224         p_bat = pmic_get("BAT_TRATS2");
 225         if (!p_bat) {
 226                 puts("BAT_TRATS2: Not found\n");
 227                 return -ENODEV;
 228         }
 229
 230         p_fg->parent =  p_bat;
 231         p_chrg->parent = p_bat;
 232         p_muic->parent = p_bat;
 233
 234         p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
 235
 236         pb = p_bat->pbat;
 237         chrg = p_muic->chrg->chrg_type(p_muic);
 238         debug("CHARGER TYPE: %d\n", chrg);
 239
 240         if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
 241                 puts("No battery detected\n");
 242                 return -1;
 243         }
 244
 245         p_fg->fg->fg_battery_check(p_fg, p_bat);
 246
 247         if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
 248                 puts("CHARGE Battery !\n");
 249
 250         return 0;
 251 }
 252
 253 int dram_init(void)
 254 {
 255         u32 size_mb;
 256
 257         size_mb = (get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
 258                 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
 259                 get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
 260                 get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)) >> 20;
 261
 262         gd->ram_size = size_mb << 20;
 263
 264         return 0;
 265 }
 266
 267 void dram_init_banksize(void)
 268 {
 269         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 270         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 271         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 272         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 273         gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
 274         gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
 275         gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
 276         gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 277 }
 278
 279 int board_mmc_init(bd_t *bis)
 280 {
 281         int err0, err2 = 0;
 282
 283         gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
 284
 285         /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 286         s5p_gpio_direction_output(&gpio2->k0, 2, 1);
 287         s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
 288
 289         /*
 290          * eMMC GPIO:
 291          * SDR 8-bit@48MHz at MMC0
 292          * GPK0[0]      SD_0_CLK(2)
 293          * GPK0[1]      SD_0_CMD(2)
 294          * GPK0[2]      SD_0_CDn        -> Not used
 295          * GPK0[3:6]    SD_0_DATA[0:3](2)
 296          * GPK1[3:6]    SD_0_DATA[0:3](3)
 297          *
 298          * DDR 4-bit@26MHz at MMC4
 299          * GPK0[0]      SD_4_CLK(3)
 300          * GPK0[1]      SD_4_CMD(3)
 301          * GPK0[2]      SD_4_CDn        -> Not used
 302          * GPK0[3:6]    SD_4_DATA[0:3](3)
 303          * GPK1[3:6]    SD_4_DATA[4:7](4)
 304          */
 305
 306         err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
 307
 308         /*
 309          * MMC device init
 310          * mmc0  : eMMC (8-bit buswidth)
 311          * mmc2  : SD card (4-bit buswidth)
 312          */
 313         if (err0)
 314                 debug("SDMMC0 not configured\n");
 315         else
 316                 err0 = s5p_mmc_init(0, 8);
 317
 318         /* T-flash detect */
 319         s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
 320         s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
 321
 322         /*
 323          * Check the T-flash  detect pin
 324          * GPX3[4] T-flash detect pin
 325          */
 326         if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
 327                 err2 = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
 328                 if (err2)
 329                         debug("SDMMC2 not configured\n");
 330                 else
 331                         err2 = s5p_mmc_init(2, 4);
 332         }
 333
 334         return err0 & err2;
 335 }
 336
 337 #ifdef CONFIG_USB_GADGET
 338 static int s5pc210_phy_control(int on)
 339 {
 340         int ret = 0;
 341         unsigned int val;
 342         struct pmic *p, *p_pmic, *p_muic;
 343
 344         p_pmic = pmic_get("MAX77686_PMIC");
 345         if (!p_pmic)
 346                 return -ENODEV;
 347
 348         if (pmic_probe(p_pmic))
 349                 return -1;
 350
 351         p_muic = pmic_get("MAX77693_MUIC");
 352         if (!p_muic)
 353                 return -ENODEV;
 354
 355         if (pmic_probe(p_muic))
 356                 return -1;
 357
 358         if (on) {
 359                 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
 360                 if (ret)
 361                         return -1;
 362
 363                 p = pmic_get("MAX77693_PMIC");
 364                 if (!p)
 365                         return -ENODEV;
 366
 367                 if (pmic_probe(p))
 368                         return -1;
 369
 370                 /* SAFEOUT */
 371                 ret = pmic_reg_read(p, MAX77693_SAFEOUT, &val);
 372                 if (ret)
 373                         return -1;
 374
 375                 val |= MAX77693_ENSAFEOUT1;
 376                 ret = pmic_reg_write(p, MAX77693_SAFEOUT, val);
 377                 if (ret)
 378                         return -1;
 379
 380                 /* PATH: USB */
 381                 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
 382                         MAX77693_MUIC_CTRL1_DN1DP2);
 383
 384         } else {
 385                 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
 386                 if (ret)
 387                         return -1;
 388
 389                 /* PATH: UART */
 390                 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
 391                         MAX77693_MUIC_CTRL1_UT1UR2);
 392         }
 393
 394         if (ret)
 395                 return -1;
 396
 397         return 0;
 398 }
 399
 400 struct s3c_plat_otg_data s5pc210_otg_data = {
 401         .phy_control    = s5pc210_phy_control,
 402         .regs_phy       = EXYNOS4X12_USBPHY_BASE,
 403         .regs_otg       = EXYNOS4X12_USBOTG_BASE,
 404         .usb_phy_ctrl   = EXYNOS4X12_USBPHY_CONTROL,
 405         .usb_flags      = PHY0_SLEEP,
 406 };
 407
 408 int board_usb_init(int index, enum usb_init_type init)
 409 {
 410         debug("USB_udc_probe\n");
 411         return s3c_udc_probe(&s5pc210_otg_data);
 412 }
 413
 414 #ifdef CONFIG_USB_CABLE_CHECK
 415 int usb_cable_connected(void)
 416 {
 417         struct pmic *muic = pmic_get("MAX77693_MUIC");
 418         if (!muic)
 419                 return 0;
 420
 421         return !!muic->chrg->chrg_type(muic);
 422 }
 423 #endif
 424 #endif
 425
 426 static int pmic_init_max77686(void)
 427 {
 428         struct pmic *p = pmic_get("MAX77686_PMIC");
 429
 430         if (pmic_probe(p))
 431                 return -1;
 432
 433         /* BUCK/LDO Output Voltage */
 434         max77686_set_ldo_voltage(p, 21, 2800000);       /* LDO21 VTF_2.8V */
 435         max77686_set_ldo_voltage(p, 23, 3300000);       /* LDO23 TSP_AVDD_3.3V*/
 436         max77686_set_ldo_voltage(p, 24, 1800000);       /* LDO24 TSP_VDD_1.8V */
 437
 438         /* BUCK/LDO Output Mode */
 439         max77686_set_buck_mode(p, 1, OPMODE_STANDBY);   /* BUCK1 VMIF_1.1V_AP */
 440         max77686_set_buck_mode(p, 2, OPMODE_ON);        /* BUCK2 VARM_1.0V_AP */
 441         max77686_set_buck_mode(p, 3, OPMODE_ON);        /* BUCK3 VINT_1.0V_AP */
 442         max77686_set_buck_mode(p, 4, OPMODE_ON);        /* BUCK4 VG3D_1.0V_AP */
 443         max77686_set_buck_mode(p, 5, OPMODE_ON);        /* BUCK5 VMEM_1.2V_AP */
 444         max77686_set_buck_mode(p, 6, OPMODE_ON);        /* BUCK6 VCC_SUB_1.35V*/
 445         max77686_set_buck_mode(p, 7, OPMODE_ON);        /* BUCK7 VCC_SUB_2.0V */
 446         max77686_set_buck_mode(p, 8, OPMODE_OFF);       /* VMEM_VDDF_2.85V */
 447         max77686_set_buck_mode(p, 9, OPMODE_OFF);       /* CAM_ISP_CORE_1.2V*/
 448
 449         max77686_set_ldo_mode(p, 1, OPMODE_LPM);        /* LDO1 VALIVE_1.0V_AP*/
 450         max77686_set_ldo_mode(p, 2, OPMODE_STANDBY);    /* LDO2 VM1M2_1.2V_AP */
 451         max77686_set_ldo_mode(p, 3, OPMODE_LPM);        /* LDO3 VCC_1.8V_AP */
 452         max77686_set_ldo_mode(p, 4, OPMODE_LPM);        /* LDO4 VCC_2.8V_AP */
 453         max77686_set_ldo_mode(p, 5, OPMODE_OFF);        /* LDO5_VCC_1.8V_IO */
 454         max77686_set_ldo_mode(p, 6, OPMODE_STANDBY);    /* LDO6 VMPLL_1.0V_AP */
 455         max77686_set_ldo_mode(p, 7, OPMODE_STANDBY);    /* LDO7 VPLL_1.0V_AP */
 456         max77686_set_ldo_mode(p, 8, OPMODE_LPM);        /* LDO8 VMIPI_1.0V_AP */
 457         max77686_set_ldo_mode(p, 9, OPMODE_OFF);        /* CAM_ISP_MIPI_1.2*/
 458         max77686_set_ldo_mode(p, 10, OPMODE_LPM);       /* LDO10 VMIPI_1.8V_AP*/
 459         max77686_set_ldo_mode(p, 11, OPMODE_STANDBY);   /* LDO11 VABB1_1.8V_AP*/
 460         max77686_set_ldo_mode(p, 12, OPMODE_LPM);       /* LDO12 VUOTG_3.0V_AP*/
 461         max77686_set_ldo_mode(p, 13, OPMODE_OFF);       /* LDO13 VC2C_1.8V_AP */
 462         max77686_set_ldo_mode(p, 14, OPMODE_STANDBY);   /* VABB02_1.8V_AP */
 463         max77686_set_ldo_mode(p, 15, OPMODE_STANDBY);   /* LDO15 VHSIC_1.0V_AP*/
 464         max77686_set_ldo_mode(p, 16, OPMODE_STANDBY);   /* LDO16 VHSIC_1.8V_AP*/
 465         max77686_set_ldo_mode(p, 17, OPMODE_OFF);       /* CAM_SENSOR_CORE_1.2*/
 466         max77686_set_ldo_mode(p, 18, OPMODE_OFF);       /* CAM_ISP_SEN_IO_1.8V*/
 467         max77686_set_ldo_mode(p, 19, OPMODE_OFF);       /* LDO19 VT_CAM_1.8V */
 468         max77686_set_ldo_mode(p, 20, OPMODE_ON);        /* LDO20 VDDQ_PRE_1.8V*/
 469         max77686_set_ldo_mode(p, 21, OPMODE_OFF);       /* LDO21 VTF_2.8V */
 470         max77686_set_ldo_mode(p, 22, OPMODE_OFF);       /* LDO22 VMEM_VDD_2.8V*/
 471         max77686_set_ldo_mode(p, 23, OPMODE_OFF);       /* LDO23 TSP_AVDD_3.3V*/
 472         max77686_set_ldo_mode(p, 24, OPMODE_OFF);       /* LDO24 TSP_VDD_1.8V */
 473         max77686_set_ldo_mode(p, 25, OPMODE_OFF);       /* LDO25 VCC_3.3V_LCD */
 474         max77686_set_ldo_mode(p, 26, OPMODE_OFF);       /*LDO26 VCC_3.0V_MOTOR*/
 475
 476         return 0;
 477 }
 478
 479 /*
 480  * LCD
 481  */
 482
 483 #ifdef CONFIG_LCD
 484 static struct mipi_dsim_config dsim_config = {
 485         .e_interface            = DSIM_VIDEO,
 486         .e_virtual_ch           = DSIM_VIRTUAL_CH_0,
 487         .e_pixel_format         = DSIM_24BPP_888,
 488         .e_burst_mode           = DSIM_BURST_SYNC_EVENT,
 489         .e_no_data_lane         = DSIM_DATA_LANE_4,
 490         .e_byte_clk             = DSIM_PLL_OUT_DIV8,
 491         .hfp                    = 1,
 492
 493         .p                      = 3,
 494         .m                      = 120,
 495         .s                      = 1,
 496
 497         /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
 498         .pll_stable_time        = 500,
 499
 500         /* escape clk : 10MHz */
 501         .esc_clk                = 20 * 1000000,
 502
 503         /* stop state holding counter after bta change count 0 ~ 0xfff */
 504         .stop_holding_cnt       = 0x7ff,
 505         /* bta timeout 0 ~ 0xff */
 506         .bta_timeout            = 0xff,
 507         /* lp rx timeout 0 ~ 0xffff */
 508         .rx_timeout             = 0xffff,
 509 };
 510
 511 static struct exynos_platform_mipi_dsim dsim_platform_data = {
 512         .lcd_panel_info = NULL,
 513         .dsim_config = &dsim_config,
 514 };
 515
 516 static struct mipi_dsim_lcd_device mipi_lcd_device = {
 517         .name   = "s6e8ax0",
 518         .id     = -1,
 519         .bus_id = 0,
 520         .platform_data  = (void *)&dsim_platform_data,
 521 };
 522
 523 static int mipi_power(void)
 524 {
 525         struct pmic *p = pmic_get("MAX77686_PMIC");
 526
 527         /* LDO8 VMIPI_1.0V_AP */
 528         max77686_set_ldo_mode(p, 8, OPMODE_ON);
 529         /* LDO10 VMIPI_1.8V_AP */
 530         max77686_set_ldo_mode(p, 10, OPMODE_ON);
 531
 532         return 0;
 533 }
 534
 535 void exynos_lcd_power_on(void)
 536 {
 537         struct pmic *p = pmic_get("MAX77686_PMIC");
 538
 539         gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
 540
 541         /* LCD_2.2V_EN: GPC0[1] */
 542         s5p_gpio_set_pull(&gpio1->c0, 1, GPIO_PULL_UP);
 543         s5p_gpio_direction_output(&gpio1->c0, 1, 1);
 544
 545         /* LDO25 VCC_3.1V_LCD */
 546         pmic_probe(p);
 547         max77686_set_ldo_voltage(p, 25, 3100000);
 548         max77686_set_ldo_mode(p, 25, OPMODE_LPM);
 549 }
 550
 551 void exynos_reset_lcd(void)
 552 {
 553         gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
 554
 555         /* reset lcd */
 556         s5p_gpio_direction_output(&gpio1->f2, 1, 0);
 557         udelay(10);
 558         s5p_gpio_set_value(&gpio1->f2, 1, 1);
 559 }
 560
 561 vidinfo_t panel_info = {
 562         .vl_freq        = 60,
 563         .vl_col         = 720,
 564         .vl_row         = 1280,
 565         .vl_width       = 720,
 566         .vl_height      = 1280,
 567         .vl_clkp        = CONFIG_SYS_HIGH,
 568         .vl_hsp         = CONFIG_SYS_LOW,
 569         .vl_vsp         = CONFIG_SYS_LOW,
 570         .vl_dp          = CONFIG_SYS_LOW,
 571         .vl_bpix        = 5,    /* Bits per pixel, 2^5 = 32 */
 572
 573         /* s6e8ax0 Panel infomation */
 574         .vl_hspw        = 5,
 575         .vl_hbpd        = 10,
 576         .vl_hfpd        = 10,
 577
 578         .vl_vspw        = 2,
 579         .vl_vbpd        = 1,
 580         .vl_vfpd        = 13,
 581         .vl_cmd_allow_len = 0xf,
 582         .mipi_enabled = 1,
 583
 584         .dual_lcd_enabled = 0,
 585
 586         .init_delay     = 0,
 587         .power_on_delay = 25,
 588         .reset_delay    = 0,
 589         .interface_mode = FIMD_RGB_INTERFACE,
 590 };
 591
 592 void init_panel_info(vidinfo_t *vid)
 593 {
 594         vid->logo_on    = 1;
 595         vid->resolution = HD_RESOLUTION;
 596         vid->rgb_mode   = MODE_RGB_P;
 597
 598         vid->power_on_delay = 30;
 599
 600         mipi_lcd_device.reverse_panel = 1;
 601
 602 #ifdef CONFIG_TIZEN
 603         get_tizen_logo_info(vid);
 604 #endif
 605
 606         strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
 607         dsim_platform_data.mipi_power = mipi_power;
 608         dsim_platform_data.phy_enable = set_mipi_phy_ctrl;
 609         dsim_platform_data.lcd_panel_info = (void *)vid;
 610         exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
 611
 612         s6e8ax0_init();
 613
 614         exynos_set_dsim_platform_data(&dsim_platform_data);
 615 }
 616 #endif /* LCD */
 617
 618 #ifdef CONFIG_MISC_INIT_R
 619 int misc_init_r(void)
 620 {
 621         setenv("model", "GT-I8800");
 622         setenv("board", "TRATS2");
 623
 624         show_hw_revision();
 625
 626         return 0;
 627 }
 628 #endif