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S5P: Exynos: Add GPIO pin numbering and rename definitions
[people/ms/u-boot.git] / board / samsung / trats2 / trats2.c
1 /*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <common.h>
10 #include <lcd.h>
11 #include <asm/arch/pinmux.h>
12 #include <asm/arch/power.h>
13 #include <asm/arch/mipi_dsim.h>
14 #include <power/pmic.h>
15 #include <power/max77686_pmic.h>
16 #include <power/battery.h>
17 #include <power/max77693_pmic.h>
18 #include <power/max77693_muic.h>
19 #include <power/max77693_fg.h>
20 #include <libtizen.h>
21 #include <errno.h>
22 #include <usb.h>
23 #include <usb/s3c_udc.h>
24 #include <usb_mass_storage.h>
25
26 DECLARE_GLOBAL_DATA_PTR;
27
28 static unsigned int board_rev = -1;
29
30 static inline u32 get_model_rev(void);
31
32 static void check_hw_revision(void)
33 {
34 int modelrev = 0;
35 int i;
36
37 /*
38 * GPM1[1:0]: MODEL_REV[1:0]
39 * Don't set as pull-none for these N/C pin.
40 * TRM say that it may cause unexcepted state and leakage current.
41 * and pull-none is only for output function.
42 */
43 for (i = EXYNOS4X12_GPIO_M10; i < EXYNOS4X12_GPIO_M12; i++)
44 gpio_cfg_pin(i, S5P_GPIO_INPUT);
45
46 /* GPM1[5:2]: HW_REV[3:0] */
47 for (i = EXYNOS4X12_GPIO_M12; i < EXYNOS4X12_GPIO_M16; i++) {
48 gpio_cfg_pin(i, S5P_GPIO_INPUT);
49 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
50 }
51
52 /* GPM1[1:0]: MODEL_REV[1:0] */
53 for (i = 0; i < 2; i++)
54 modelrev |= (gpio_get_value(EXYNOS4X12_GPIO_M10 + i) << i);
55
56 /* board_rev[15:8] = model */
57 board_rev = modelrev << 8;
58 }
59
60 u32 get_board_rev(void)
61 {
62 return board_rev;
63 }
64
65 static inline u32 get_model_rev(void)
66 {
67 return (board_rev >> 8) & 0xff;
68 }
69
70 static void board_external_gpio_init(void)
71 {
72 /*
73 * some pins which in alive block are connected with external pull-up
74 * but it's default setting is pull-down.
75 * if that pin set as input then that floated
76 */
77
78 gpio_set_pull(EXYNOS4X12_GPIO_X02, S5P_GPIO_PULL_NONE); /* PS_ALS_INT */
79 gpio_set_pull(EXYNOS4X12_GPIO_X04, S5P_GPIO_PULL_NONE); /* TSP_nINT */
80 gpio_set_pull(EXYNOS4X12_GPIO_X07, S5P_GPIO_PULL_NONE); /* AP_PMIC_IRQ*/
81 gpio_set_pull(EXYNOS4X12_GPIO_X15, S5P_GPIO_PULL_NONE); /* IF_PMIC_IRQ*/
82 gpio_set_pull(EXYNOS4X12_GPIO_X20, S5P_GPIO_PULL_NONE); /* VOL_UP */
83 gpio_set_pull(EXYNOS4X12_GPIO_X21, S5P_GPIO_PULL_NONE); /* VOL_DOWN */
84 gpio_set_pull(EXYNOS4X12_GPIO_X23, S5P_GPIO_PULL_NONE); /* FUEL_ALERT */
85 gpio_set_pull(EXYNOS4X12_GPIO_X24, S5P_GPIO_PULL_NONE); /* ADC_INT */
86 gpio_set_pull(EXYNOS4X12_GPIO_X27, S5P_GPIO_PULL_NONE); /* nPOWER */
87 gpio_set_pull(EXYNOS4X12_GPIO_X30, S5P_GPIO_PULL_NONE); /* WPC_INT */
88 gpio_set_pull(EXYNOS4X12_GPIO_X35, S5P_GPIO_PULL_NONE); /* OK_KEY */
89 gpio_set_pull(EXYNOS4X12_GPIO_X37, S5P_GPIO_PULL_NONE); /* HDMI_HPD */
90 }
91
92 #ifdef CONFIG_SYS_I2C_INIT_BOARD
93 static void board_init_i2c(void)
94 {
95 int err;
96
97 /* I2C_7 */
98 err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
99 if (err) {
100 debug("I2C%d not configured\n", (I2C_7));
101 return;
102 }
103
104 /* I2C_8 */
105 gpio_direction_output(EXYNOS4X12_GPIO_F14, 1);
106 gpio_direction_output(EXYNOS4X12_GPIO_F15, 1);
107
108 /* I2C_9 */
109 gpio_direction_output(EXYNOS4X12_GPIO_M21, 1);
110 gpio_direction_output(EXYNOS4X12_GPIO_M20, 1);
111 }
112 #endif
113
114 #ifdef CONFIG_SYS_I2C_SOFT
115 int get_soft_i2c_scl_pin(void)
116 {
117 if (I2C_ADAP_HWNR)
118 return EXYNOS4X12_GPIO_M21; /* I2C9 */
119 else
120 return EXYNOS4X12_GPIO_F14; /* I2C8 */
121 }
122
123 int get_soft_i2c_sda_pin(void)
124 {
125 if (I2C_ADAP_HWNR)
126 return EXYNOS4X12_GPIO_M20; /* I2C9 */
127 else
128 return EXYNOS4X12_GPIO_F15; /* I2C8 */
129 }
130 #endif
131
132 int exynos_early_init_f(void)
133 {
134 board_external_gpio_init();
135
136 return 0;
137 }
138
139 static int pmic_init_max77686(void);
140
141 int exynos_init(void)
142 {
143 struct exynos4_power *pwr =
144 (struct exynos4_power *)samsung_get_base_power();
145
146 check_hw_revision();
147 printf("HW Revision:\t0x%04x\n", board_rev);
148
149 /*
150 * First bootloader on the TRATS2 platform uses
151 * INFORM4 and INFORM5 registers for recovery
152 *
153 * To indicate correct boot chain - those two
154 * registers must be cleared out
155 */
156 writel(0, &pwr->inform4);
157 writel(0, &pwr->inform5);
158
159 return 0;
160 }
161
162 int exynos_power_init(void)
163 {
164 int chrg;
165 struct power_battery *pb;
166 struct pmic *p_chrg, *p_muic, *p_fg, *p_bat;
167
168 #ifdef CONFIG_SYS_I2C_INIT_BOARD
169 board_init_i2c();
170 #endif
171 pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */
172 pmic_init_max77686();
173 pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */
174 power_muic_init(I2C_10); /* I2C adapter 10 - bus name soft1 */
175 power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */
176 power_bat_init(0);
177
178 p_chrg = pmic_get("MAX77693_PMIC");
179 if (!p_chrg) {
180 puts("MAX77693_PMIC: Not found\n");
181 return -ENODEV;
182 }
183
184 p_muic = pmic_get("MAX77693_MUIC");
185 if (!p_muic) {
186 puts("MAX77693_MUIC: Not found\n");
187 return -ENODEV;
188 }
189
190 p_fg = pmic_get("MAX77693_FG");
191 if (!p_fg) {
192 puts("MAX17042_FG: Not found\n");
193 return -ENODEV;
194 }
195
196 if (p_chrg->chrg->chrg_bat_present(p_chrg) == 0)
197 puts("No battery detected\n");
198
199 p_bat = pmic_get("BAT_TRATS2");
200 if (!p_bat) {
201 puts("BAT_TRATS2: Not found\n");
202 return -ENODEV;
203 }
204
205 p_fg->parent = p_bat;
206 p_chrg->parent = p_bat;
207 p_muic->parent = p_bat;
208
209 p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
210
211 pb = p_bat->pbat;
212 chrg = p_muic->chrg->chrg_type(p_muic);
213 debug("CHARGER TYPE: %d\n", chrg);
214
215 if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
216 puts("No battery detected\n");
217 return -1;
218 }
219
220 p_fg->fg->fg_battery_check(p_fg, p_bat);
221
222 if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
223 puts("CHARGE Battery !\n");
224
225 return 0;
226 }
227
228 #ifdef CONFIG_USB_GADGET
229 static int s5pc210_phy_control(int on)
230 {
231 int ret = 0;
232 unsigned int val;
233 struct pmic *p, *p_pmic, *p_muic;
234
235 p_pmic = pmic_get("MAX77686_PMIC");
236 if (!p_pmic)
237 return -ENODEV;
238
239 if (pmic_probe(p_pmic))
240 return -1;
241
242 p_muic = pmic_get("MAX77693_MUIC");
243 if (!p_muic)
244 return -ENODEV;
245
246 if (pmic_probe(p_muic))
247 return -1;
248
249 if (on) {
250 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
251 if (ret)
252 return -1;
253
254 p = pmic_get("MAX77693_PMIC");
255 if (!p)
256 return -ENODEV;
257
258 if (pmic_probe(p))
259 return -1;
260
261 /* SAFEOUT */
262 ret = pmic_reg_read(p, MAX77693_SAFEOUT, &val);
263 if (ret)
264 return -1;
265
266 val |= MAX77693_ENSAFEOUT1;
267 ret = pmic_reg_write(p, MAX77693_SAFEOUT, val);
268 if (ret)
269 return -1;
270
271 /* PATH: USB */
272 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
273 MAX77693_MUIC_CTRL1_DN1DP2);
274
275 } else {
276 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
277 if (ret)
278 return -1;
279
280 /* PATH: UART */
281 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
282 MAX77693_MUIC_CTRL1_UT1UR2);
283 }
284
285 if (ret)
286 return -1;
287
288 return 0;
289 }
290
291 struct s3c_plat_otg_data s5pc210_otg_data = {
292 .phy_control = s5pc210_phy_control,
293 .regs_phy = EXYNOS4X12_USBPHY_BASE,
294 .regs_otg = EXYNOS4X12_USBOTG_BASE,
295 .usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL,
296 .usb_flags = PHY0_SLEEP,
297 };
298
299 int board_usb_init(int index, enum usb_init_type init)
300 {
301 debug("USB_udc_probe\n");
302 return s3c_udc_probe(&s5pc210_otg_data);
303 }
304
305 #ifdef CONFIG_USB_CABLE_CHECK
306 int usb_cable_connected(void)
307 {
308 struct pmic *muic = pmic_get("MAX77693_MUIC");
309 if (!muic)
310 return 0;
311
312 return !!muic->chrg->chrg_type(muic);
313 }
314 #endif
315 #endif
316
317 static int pmic_init_max77686(void)
318 {
319 struct pmic *p = pmic_get("MAX77686_PMIC");
320
321 if (pmic_probe(p))
322 return -1;
323
324 /* BUCK/LDO Output Voltage */
325 max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 VTF_2.8V */
326 max77686_set_ldo_voltage(p, 23, 3300000); /* LDO23 TSP_AVDD_3.3V*/
327 max77686_set_ldo_voltage(p, 24, 1800000); /* LDO24 TSP_VDD_1.8V */
328
329 /* BUCK/LDO Output Mode */
330 max77686_set_buck_mode(p, 1, OPMODE_STANDBY); /* BUCK1 VMIF_1.1V_AP */
331 max77686_set_buck_mode(p, 2, OPMODE_ON); /* BUCK2 VARM_1.0V_AP */
332 max77686_set_buck_mode(p, 3, OPMODE_ON); /* BUCK3 VINT_1.0V_AP */
333 max77686_set_buck_mode(p, 4, OPMODE_ON); /* BUCK4 VG3D_1.0V_AP */
334 max77686_set_buck_mode(p, 5, OPMODE_ON); /* BUCK5 VMEM_1.2V_AP */
335 max77686_set_buck_mode(p, 6, OPMODE_ON); /* BUCK6 VCC_SUB_1.35V*/
336 max77686_set_buck_mode(p, 7, OPMODE_ON); /* BUCK7 VCC_SUB_2.0V */
337 max77686_set_buck_mode(p, 8, OPMODE_OFF); /* VMEM_VDDF_2.85V */
338 max77686_set_buck_mode(p, 9, OPMODE_OFF); /* CAM_ISP_CORE_1.2V*/
339
340 max77686_set_ldo_mode(p, 1, OPMODE_LPM); /* LDO1 VALIVE_1.0V_AP*/
341 max77686_set_ldo_mode(p, 2, OPMODE_STANDBY); /* LDO2 VM1M2_1.2V_AP */
342 max77686_set_ldo_mode(p, 3, OPMODE_LPM); /* LDO3 VCC_1.8V_AP */
343 max77686_set_ldo_mode(p, 4, OPMODE_LPM); /* LDO4 VCC_2.8V_AP */
344 max77686_set_ldo_mode(p, 5, OPMODE_OFF); /* LDO5_VCC_1.8V_IO */
345 max77686_set_ldo_mode(p, 6, OPMODE_STANDBY); /* LDO6 VMPLL_1.0V_AP */
346 max77686_set_ldo_mode(p, 7, OPMODE_STANDBY); /* LDO7 VPLL_1.0V_AP */
347 max77686_set_ldo_mode(p, 8, OPMODE_LPM); /* LDO8 VMIPI_1.0V_AP */
348 max77686_set_ldo_mode(p, 9, OPMODE_OFF); /* CAM_ISP_MIPI_1.2*/
349 max77686_set_ldo_mode(p, 10, OPMODE_LPM); /* LDO10 VMIPI_1.8V_AP*/
350 max77686_set_ldo_mode(p, 11, OPMODE_STANDBY); /* LDO11 VABB1_1.8V_AP*/
351 max77686_set_ldo_mode(p, 12, OPMODE_LPM); /* LDO12 VUOTG_3.0V_AP*/
352 max77686_set_ldo_mode(p, 13, OPMODE_OFF); /* LDO13 VC2C_1.8V_AP */
353 max77686_set_ldo_mode(p, 14, OPMODE_STANDBY); /* VABB02_1.8V_AP */
354 max77686_set_ldo_mode(p, 15, OPMODE_STANDBY); /* LDO15 VHSIC_1.0V_AP*/
355 max77686_set_ldo_mode(p, 16, OPMODE_STANDBY); /* LDO16 VHSIC_1.8V_AP*/
356 max77686_set_ldo_mode(p, 17, OPMODE_OFF); /* CAM_SENSOR_CORE_1.2*/
357 max77686_set_ldo_mode(p, 18, OPMODE_OFF); /* CAM_ISP_SEN_IO_1.8V*/
358 max77686_set_ldo_mode(p, 19, OPMODE_OFF); /* LDO19 VT_CAM_1.8V */
359 max77686_set_ldo_mode(p, 20, OPMODE_ON); /* LDO20 VDDQ_PRE_1.8V*/
360 max77686_set_ldo_mode(p, 21, OPMODE_OFF); /* LDO21 VTF_2.8V */
361 max77686_set_ldo_mode(p, 22, OPMODE_OFF); /* LDO22 VMEM_VDD_2.8V*/
362 max77686_set_ldo_mode(p, 23, OPMODE_OFF); /* LDO23 TSP_AVDD_3.3V*/
363 max77686_set_ldo_mode(p, 24, OPMODE_OFF); /* LDO24 TSP_VDD_1.8V */
364 max77686_set_ldo_mode(p, 25, OPMODE_OFF); /* LDO25 VCC_3.3V_LCD */
365 max77686_set_ldo_mode(p, 26, OPMODE_OFF); /*LDO26 VCC_3.0V_MOTOR*/
366
367 return 0;
368 }
369
370 /*
371 * LCD
372 */
373
374 #ifdef CONFIG_LCD
375 int mipi_power(void)
376 {
377 struct pmic *p = pmic_get("MAX77686_PMIC");
378
379 /* LDO8 VMIPI_1.0V_AP */
380 max77686_set_ldo_mode(p, 8, OPMODE_ON);
381 /* LDO10 VMIPI_1.8V_AP */
382 max77686_set_ldo_mode(p, 10, OPMODE_ON);
383
384 return 0;
385 }
386
387 void exynos_lcd_power_on(void)
388 {
389 struct pmic *p = pmic_get("MAX77686_PMIC");
390
391 /* LCD_2.2V_EN: GPC0[1] */
392 gpio_set_pull(EXYNOS4X12_GPIO_C01, S5P_GPIO_PULL_UP);
393 gpio_direction_output(EXYNOS4X12_GPIO_C01, 1);
394
395 /* LDO25 VCC_3.1V_LCD */
396 pmic_probe(p);
397 max77686_set_ldo_voltage(p, 25, 3100000);
398 max77686_set_ldo_mode(p, 25, OPMODE_LPM);
399 }
400
401 void exynos_reset_lcd(void)
402 {
403 /* reset lcd */
404 gpio_direction_output(EXYNOS4X12_GPIO_F21, 0);
405 udelay(10);
406 gpio_set_value(EXYNOS4X12_GPIO_F21, 1);
407 }
408
409 void exynos_lcd_misc_init(vidinfo_t *vid)
410 {
411 #ifdef CONFIG_TIZEN
412 get_tizen_logo_info(vid);
413 #endif
414 #ifdef CONFIG_S6E8AX0
415 s6e8ax0_init();
416 #endif
417 }
418 #endif /* LCD */