2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/adc.h>
15 #include <asm/arch/pinmux.h>
16 #include <asm/arch/watchdog.h>
18 #include <power/pmic.h>
20 #include <usb/s3c_udc.h>
21 #include <asm/arch/cpu.h>
22 #include <power/max8998_pmic.h>
24 #include <samsung/misc.h>
25 #include <usb_mass_storage.h>
27 DECLARE_GLOBAL_DATA_PTR
;
29 unsigned int board_rev
;
31 u32
get_board_rev(void)
36 static int get_hwrev(void)
38 return board_rev
& 0xFF;
41 static void init_pmic_lcd(void);
43 int exynos_power_init(void)
48 * For PMIC the I2C bus is named as I2C5, but it is connected
49 * to logical I2C adapter 0
51 ret
= pmic_init(I2C_0
);
60 static unsigned short get_adc_value(int channel
)
62 struct s5p_adc
*adc
= (struct s5p_adc
*)samsung_get_base_adc();
63 unsigned short ret
= 0;
65 unsigned int loop
= 0;
67 writel(channel
& 0xF, &adc
->adcmux
);
68 writel((1 << 14) | (49 << 6), &adc
->adccon
);
69 writel(1000 & 0xffff, &adc
->adcdly
);
70 writel(readl(&adc
->adccon
) | (1 << 16), &adc
->adccon
); /* 12 bit */
72 writel(readl(&adc
->adccon
) | (1 << 0), &adc
->adccon
); /* Enable */
77 reg
= readl(&adc
->adccon
);
78 } while (!(reg
& (1 << 15)) && (loop
++ < 1000));
80 ret
= readl(&adc
->adcdat0
) & 0xFFF;
85 static int adc_power_control(int on
)
88 struct pmic
*p
= pmic_get("MAX8998_PMIC");
95 ret
= pmic_set_output(p
,
102 static unsigned int get_hw_revision(void)
104 int hwrev
, mode0
, mode1
;
106 adc_power_control(1);
108 mode0
= get_adc_value(1); /* HWREV_MODE0 */
109 mode1
= get_adc_value(2); /* HWREV_MODE1 */
112 * XXX Always set the default hwrev as the latest board
113 * ADC = (voltage) / 3.3 * 4096
117 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
118 if (IS_RANGE(mode0
, 80, 200) && IS_RANGE(mode1
, 80, 200))
119 hwrev
= 0x0; /* 0.01V 0.01V */
120 if (IS_RANGE(mode0
, 750, 1000) && IS_RANGE(mode1
, 80, 200))
121 hwrev
= 0x1; /* 610mV 0.01V */
122 if (IS_RANGE(mode0
, 1300, 1700) && IS_RANGE(mode1
, 80, 200))
123 hwrev
= 0x2; /* 1.16V 0.01V */
124 if (IS_RANGE(mode0
, 2000, 2400) && IS_RANGE(mode1
, 80, 200))
125 hwrev
= 0x3; /* 1.79V 0.01V */
128 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0
, mode1
, hwrev
);
130 adc_power_control(0);
135 static void check_hw_revision(void)
139 hwrev
= get_hw_revision();
144 #ifdef CONFIG_USB_GADGET
145 static int s5pc210_phy_control(int on
)
148 struct pmic
*p
= pmic_get("MAX8998_PMIC");
156 ret
|= pmic_set_output(p
,
157 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3
,
158 MAX8998_SAFEOUT1
, LDO_ON
);
159 ret
|= pmic_set_output(p
, MAX8998_REG_ONOFF1
,
160 MAX8998_LDO3
, LDO_ON
);
161 ret
|= pmic_set_output(p
, MAX8998_REG_ONOFF2
,
162 MAX8998_LDO8
, LDO_ON
);
165 ret
|= pmic_set_output(p
, MAX8998_REG_ONOFF2
,
166 MAX8998_LDO8
, LDO_OFF
);
167 ret
|= pmic_set_output(p
, MAX8998_REG_ONOFF1
,
168 MAX8998_LDO3
, LDO_OFF
);
169 ret
|= pmic_set_output(p
,
170 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3
,
171 MAX8998_SAFEOUT1
, LDO_OFF
);
175 puts("MAX8998 LDO setting error!\n");
182 struct s3c_plat_otg_data s5pc210_otg_data
= {
183 .phy_control
= s5pc210_phy_control
,
184 .regs_phy
= EXYNOS4_USBPHY_BASE
,
185 .regs_otg
= EXYNOS4_USBOTG_BASE
,
186 .usb_phy_ctrl
= EXYNOS4_USBPHY_CONTROL
,
187 .usb_flags
= PHY0_SLEEP
,
191 int board_usb_init(int index
, enum usb_init_type init
)
193 debug("USB_udc_probe\n");
194 return s3c_udc_probe(&s5pc210_otg_data
);
197 int exynos_early_init_f(void)
204 static void init_pmic_lcd(void)
209 struct pmic
*p
= pmic_get("MAX8998_PMIC");
218 val
= 0x02; /* (1800 - 1600) / 100; */
219 ret
|= pmic_reg_write(p
, MAX8998_REG_LDO7
, val
);
222 val
= 0xe; /* (3000 - 1600) / 100; */
223 ret
|= pmic_reg_write(p
, MAX8998_REG_LDO17
, val
);
225 /* Disable unneeded regulators */
228 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
229 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
232 ret
|= pmic_reg_write(p
, MAX8998_REG_ONOFF1
, val
);
235 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
236 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
239 ret
|= pmic_reg_write(p
, MAX8998_REG_ONOFF2
, val
);
242 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
243 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
246 ret
|= pmic_reg_write(p
, MAX8998_REG_ONOFF3
, val
);
249 puts("LCD pmic initialisation error!\n");
252 void exynos_cfg_lcd_gpio(void)
254 unsigned int i
, f3_end
= 4;
256 for (i
= 0; i
< 8; i
++) {
257 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
258 gpio_cfg_pin(EXYNOS4_GPIO_F00
+ i
, S5P_GPIO_FUNC(2));
259 gpio_cfg_pin(EXYNOS4_GPIO_F10
+ i
, S5P_GPIO_FUNC(2));
260 gpio_cfg_pin(EXYNOS4_GPIO_F20
+ i
, S5P_GPIO_FUNC(2));
261 /* pull-up/down disable */
262 gpio_set_pull(EXYNOS4_GPIO_F00
+ i
, S5P_GPIO_PULL_NONE
);
263 gpio_set_pull(EXYNOS4_GPIO_F10
+ i
, S5P_GPIO_PULL_NONE
);
264 gpio_set_pull(EXYNOS4_GPIO_F20
+ i
, S5P_GPIO_PULL_NONE
);
266 /* drive strength to max (24bit) */
267 gpio_set_drv(EXYNOS4_GPIO_F00
+ i
, S5P_GPIO_DRV_4X
);
268 gpio_set_rate(EXYNOS4_GPIO_F00
+ i
, S5P_GPIO_DRV_SLOW
);
269 gpio_set_drv(EXYNOS4_GPIO_F10
+ i
, S5P_GPIO_DRV_4X
);
270 gpio_set_rate(EXYNOS4_GPIO_F10
+ i
, S5P_GPIO_DRV_SLOW
);
271 gpio_set_drv(EXYNOS4_GPIO_F20
+ i
, S5P_GPIO_DRV_4X
);
272 gpio_set_rate(EXYNOS4_GPIO_F00
+ i
, S5P_GPIO_DRV_SLOW
);
275 for (i
= EXYNOS4_GPIO_F30
; i
< (EXYNOS4_GPIO_F30
+ f3_end
); i
++) {
276 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
277 gpio_cfg_pin(i
, S5P_GPIO_FUNC(2));
278 /* pull-up/down disable */
279 gpio_set_pull(i
, S5P_GPIO_PULL_NONE
);
280 /* drive strength to max (24bit) */
281 gpio_set_drv(i
, S5P_GPIO_DRV_4X
);
282 gpio_set_rate(i
, S5P_GPIO_DRV_SLOW
);
285 /* gpio pad configuration for LCD reset. */
286 gpio_request(EXYNOS4_GPIO_Y45
, "lcd_reset");
287 gpio_cfg_pin(EXYNOS4_GPIO_Y45
, S5P_GPIO_OUTPUT
);
295 void exynos_reset_lcd(void)
297 gpio_set_value(EXYNOS4_GPIO_Y45
, 1);
299 gpio_set_value(EXYNOS4_GPIO_Y45
, 0);
301 gpio_set_value(EXYNOS4_GPIO_Y45
, 1);
305 void exynos_lcd_power_on(void)
307 struct pmic
*p
= pmic_get("MAX8998_PMIC");
315 pmic_set_output(p
, MAX8998_REG_ONOFF3
, MAX8998_LDO17
, LDO_ON
);
316 pmic_set_output(p
, MAX8998_REG_ONOFF2
, MAX8998_LDO7
, LDO_ON
);
319 void exynos_cfg_ldo(void)
324 void exynos_enable_ldo(unsigned int onoff
)
326 ld9040_enable_ldo(onoff
);
329 int exynos_init(void)
333 gd
->bd
->bi_arch_number
= MACH_TYPE_UNIVERSAL_C210
;
335 switch (get_hwrev()) {
338 * Set the low to enable LDO_EN
339 * But when you use the test board for eMMC booting
340 * you should set it HIGH since it removes the inverter
342 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
343 gpio_request(EXYNOS4_GPIO_E36
, "ldo_en");
344 gpio_direction_output(EXYNOS4_GPIO_E36
, 0);
348 * Default reset state is High and there's no inverter
349 * But set it as HIGH to ensure
351 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
352 gpio_request(EXYNOS4_GPIO_E13
, "massmemory_en");
353 gpio_direction_output(EXYNOS4_GPIO_E13
, 1);
357 /* Request soft I2C gpios */
358 sprintf(buf
, "soft_i2c_scl");
359 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL
, buf
);
361 sprintf(buf
, "soft_i2c_sda");
362 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA
, buf
);
365 printf("HW Revision:\t0x%x\n", board_rev
);
370 void exynos_lcd_misc_init(vidinfo_t
*vid
)
373 get_tizen_logo_info(vid
);
377 vid
->pclk_name
= 1; /* MPLL */
380 setenv("lcdinfo", "lcd=ld9040");