1 // SPDX-License-Identifier: GPL-2.0+
3 * Board functions for TI AM335X based pxm2 board
4 * (C) Copyright 2013 Siemens Schweiz AG
5 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 * u-boot:/board/ti/am335x/board.c
10 * Board functions for TI AM335X based boards
12 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/hardware.h>
23 #include <asm/arch/omap.h>
24 #include <asm/arch/ddr_defs.h>
25 #include <asm/arch/clock.h>
26 #include <asm/arch/gpio.h>
27 #include <asm/arch/mmc_host_def.h>
28 #include <asm/arch/sys_proto.h>
29 #include "../../../drivers/video/da8xx-fb.h"
38 #include "../common/factoryset.h"
41 #include <bmp_layout.h>
43 #ifdef CONFIG_SPL_BUILD
44 static void board_init_ddr(void)
46 struct emif_regs pxm2_ddr3_emif_reg_data
= {
47 .sdram_config
= 0x41805332,
48 .sdram_tim1
= 0x666b3c9,
49 .sdram_tim2
= 0x243631ca,
51 .emif_ddr_phy_ctlr_1
= 0x100005,
56 struct ddr_data pxm2_ddr3_data
= {
57 .datardsratio0
= 0x81204812,
59 .datafwsratio0
= 0x8020080,
60 .datawrsratio0
= 0x4010040,
63 struct cmd_control pxm2_ddr3_cmd_ctrl_data
= {
72 const struct ctrl_ioregs ioregs
= {
73 .cm0ioctl
= DDR_IOCTRL_VAL
,
74 .cm1ioctl
= DDR_IOCTRL_VAL
,
75 .cm2ioctl
= DDR_IOCTRL_VAL
,
76 .dt0ioctl
= DDR_IOCTRL_VAL
,
77 .dt1ioctl
= DDR_IOCTRL_VAL
,
80 config_ddr(DDR_PLL_FREQ
, &ioregs
, &pxm2_ddr3_data
,
81 &pxm2_ddr3_cmd_ctrl_data
, &pxm2_ddr3_emif_reg_data
, 0);
85 * voltage switching for MPU frequency switching.
86 * @module = mpu - 0, core - 1
87 * @vddx_op_vol_sel = vdd voltage to set
93 int voltage_update(unsigned int module
, unsigned char vddx_op_vol_sel
)
96 unsigned int reg_offset
;
99 reg_offset
= PMIC_VDD1_OP_REG
;
101 reg_offset
= PMIC_VDD2_OP_REG
;
104 if (i2c_read(PMIC_CTRL_I2C_ADDR
, reg_offset
, 1, buf
, 1))
107 buf
[0] &= ~PMIC_OP_REG_CMD_MASK
;
109 if (i2c_write(PMIC_CTRL_I2C_ADDR
, reg_offset
, 1, buf
, 1))
112 /* Configure VDDx OP Voltage */
113 if (i2c_read(PMIC_CTRL_I2C_ADDR
, reg_offset
, 1, buf
, 1))
116 buf
[0] &= ~PMIC_OP_REG_SEL_MASK
;
117 buf
[0] |= vddx_op_vol_sel
;
119 if (i2c_write(PMIC_CTRL_I2C_ADDR
, reg_offset
, 1, buf
, 1))
122 if (i2c_read(PMIC_CTRL_I2C_ADDR
, reg_offset
, 1, buf
, 1))
125 if ((buf
[0] & PMIC_OP_REG_SEL_MASK
) != vddx_op_vol_sel
)
131 #define OSC (V_OSCK/1000000)
133 const struct dpll_params dpll_mpu_pxm2
= {
134 720, OSC
-1, 1, -1, -1, -1, -1};
136 void spl_siemens_board_init(void)
140 * pxm2 PMIC code. All boards currently want an MPU voltage
141 * of 1.2625V and CORE voltage of 1.1375V to operate at
144 if (i2c_probe(PMIC_CTRL_I2C_ADDR
))
147 /* VDD1/2 voltage selection register access by control i/f */
148 if (i2c_read(PMIC_CTRL_I2C_ADDR
, PMIC_DEVCTRL_REG
, 1, buf
, 1))
151 buf
[0] |= PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C
;
153 if (i2c_write(PMIC_CTRL_I2C_ADDR
, PMIC_DEVCTRL_REG
, 1, buf
, 1))
156 /* Frequency switching for OPP 120 */
157 if (voltage_update(MPU
, PMIC_OP_REG_SEL_1_2_6
) ||
158 voltage_update(CORE
, PMIC_OP_REG_SEL_1_1_3
)) {
159 printf("voltage update failed\n");
162 #endif /* if def CONFIG_SPL_BUILD */
164 int read_eeprom(void)
166 /* nothing ToDo here for this board */
171 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
172 (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
173 static void cpsw_control(int enabled
)
175 /* VTP can be added here */
180 static struct cpsw_slave_data cpsw_slaves
[] = {
182 .slave_reg_ofs
= 0x208,
183 .sliver_reg_ofs
= 0xd80,
185 .phy_if
= PHY_INTERFACE_MODE_RMII
,
188 .slave_reg_ofs
= 0x308,
189 .sliver_reg_ofs
= 0xdc0,
191 .phy_if
= PHY_INTERFACE_MODE_RMII
,
195 static struct cpsw_platform_data cpsw_data
= {
196 .mdio_base
= CPSW_MDIO_BASE
,
197 .cpsw_base
= CPSW_BASE
,
200 .cpdma_reg_ofs
= 0x800,
202 .slave_data
= cpsw_slaves
,
203 .ale_reg_ofs
= 0xd00,
205 .host_port_reg_ofs
= 0x108,
206 .hw_stats_reg_ofs
= 0x900,
207 .bd_ram_ofs
= 0x2000,
208 .mac_control
= (1 << 5),
209 .control
= cpsw_control
,
211 .version
= CPSW_CTRL_VERSION_2
,
213 #endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */
215 #if defined(CONFIG_DRIVER_TI_CPSW) || \
216 (defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
217 int board_eth_init(bd_t
*bis
)
220 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
221 (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
222 struct ctrl_dev
*cdev
= (struct ctrl_dev
*)CTRL_DEVICE_BASE
;
223 #ifdef CONFIG_FACTORYSET
225 if (!is_valid_ethaddr(factory_dat
.mac
))
226 printf("Error: no valid mac address\n");
228 eth_env_set_enetaddr("ethaddr", factory_dat
.mac
);
229 #endif /* #ifdef CONFIG_FACTORYSET */
231 /* Set rgmii mode and enable rmii clock to be sourced from chip */
232 writel(RGMII_MODE_ENABLE
| RGMII_INT_DELAY
, &cdev
->miisel
);
234 rv
= cpsw_register(&cpsw_data
);
236 printf("Error %d registering CPSW switch\n", rv
);
242 #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
244 #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
245 static struct da8xx_panel lcd_panels
[] = {
246 /* AUO G156XW01 V1 */
248 .name
= "AUO_G156XW01_V1",
260 /* AUO B101EVN06 V0 */
262 .name
= "AUO_B101EVN06_V0",
275 * Settings from factoryset
279 .name
= "factoryset",
293 static const struct display_panel disp_panel
= {
300 static const struct lcd_ctrl_config lcd_cfg
= {
310 .invert_line_clock
= 1,
311 .invert_frm_clock
= 1,
317 static int set_gpio(int gpio
, int state
)
319 gpio_request(gpio
, "temp");
320 gpio_direction_output(gpio
, state
);
321 gpio_set_value(gpio
, state
);
326 static int enable_backlight(void)
328 set_gpio(BOARD_LCD_POWER
, 1);
329 set_gpio(BOARD_BACK_LIGHT
, 1);
330 set_gpio(BOARD_TOUCH_POWER
, 1);
334 static int enable_pwm(void)
336 struct pwmss_regs
*pwmss
= (struct pwmss_regs
*)PWMSS0_BASE
;
337 struct pwmss_ecap_regs
*ecap
;
338 int ticks
= PWM_TICKS
;
341 ecap
= (struct pwmss_ecap_regs
*)AM33XX_ECAP0_BASE
;
343 setbits_le32(&pwmss
->clkconfig
, ECAP_CLK_EN
);
344 /* TimeStam Counter register */
345 writel(0xdb9, &ecap
->tsctr
);
347 writel(ticks
- 1, &ecap
->cap3
);
348 writel(ticks
- 1, &ecap
->cap1
);
349 setbits_le16(&ecap
->ecctl2
,
350 (ECTRL2_MDSL_ECAP
| ECTRL2_SYNCOSEL_MASK
| 0xd0));
352 writel(duty
, &ecap
->cap2
);
353 writel(duty
, &ecap
->cap4
);
355 setbits_le16(&ecap
->ecctl2
, ECTRL2_CTRSTP_FREERUN
);
359 static struct dpll_regs dpll_lcd_regs
= {
360 .cm_clkmode_dpll
= CM_WKUP
+ 0x98,
361 .cm_idlest_dpll
= CM_WKUP
+ 0x48,
362 .cm_clksel_dpll
= CM_WKUP
+ 0x54,
365 /* no console on this board */
366 int board_cfb_skip(void)
371 #define PLL_GET_M(v) ((v >> 8) & 0x7ff)
372 #define PLL_GET_N(v) (v & 0x7f)
374 static int get_clk(struct dpll_regs
*dpll_regs
)
380 val
= readl(dpll_regs
->cm_clksel_dpll
);
383 f
= (m
* V_OSCK
) / n
;
390 return get_clk(&dpll_lcd_regs
);
393 static int conf_disp_pll(int m
, int n
)
395 struct cm_perpll
*cmper
= (struct cm_perpll
*)CM_PER
;
396 struct cm_dpll
*cmdpll
= (struct cm_dpll
*)CM_DPLL
;
397 struct dpll_params dpll_lcd
= {m
, n
, -1, -1, -1, -1, -1};
399 u32
*const clk_domains
[] = {
403 u32
*const clk_modules_explicit_en
[] = {
405 &cmper
->lcdcclkstctrl
,
406 &cmper
->epwmss0clkctrl
,
409 do_enable_clocks(clk_domains
, clk_modules_explicit_en
, 1);
410 writel(0x0, &cmdpll
->clklcdcpixelclk
);
412 do_setup_dpll(&dpll_lcd_regs
, &dpll_lcd
);
417 static int board_video_init(void)
419 conf_disp_pll(24, 1);
420 if (factory_dat
.pxm50
)
421 da8xx_video_init(&lcd_panels
[0], &lcd_cfg
, lcd_cfg
.bpp
);
423 da8xx_video_init(&lcd_panels
[1], &lcd_cfg
, lcd_cfg
.bpp
);
432 #ifdef CONFIG_BOARD_LATE_INIT
433 int board_late_init(void)
437 omap_nand_switch_ecc(1, 8);
439 #ifdef CONFIG_FACTORYSET
440 if (factory_dat
.asn
[0] != 0) {
441 char tmp
[2 * MAX_STRING_LENGTH
+ 2];
443 if (strncmp((const char *)factory_dat
.asn
, "PXM50", 5) == 0)
444 factory_dat
.pxm50
= 1;
446 factory_dat
.pxm50
= 0;
447 sprintf(tmp
, "%s_%s", factory_dat
.asn
,
448 factory_dat
.comp_version
);
449 ret
= env_set("boardid", tmp
);
451 printf("error setting board id\n");
453 factory_dat
.pxm50
= 1;
454 ret
= env_set("boardid", "PXM50_1.0");
456 printf("error setting board id\n");
458 debug("PXM50: %d\n", factory_dat
.pxm50
);
465 #include "../common/board.c"