]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/socrates/nand.c
3 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
5 * SPDX-License-Identifier: GPL-2.0+
10 #if defined(CONFIG_SYS_NAND_BASE)
12 #include <asm/errno.h>
16 static void sc_nand_write_byte(struct mtd_info
*mtd
, u_char byte
);
17 static void sc_nand_write_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
);
18 static u_char
sc_nand_read_byte(struct mtd_info
*mtd
);
19 static u16
sc_nand_read_word(struct mtd_info
*mtd
);
20 static void sc_nand_read_buf(struct mtd_info
*mtd
, u_char
*buf
, int len
);
21 static int sc_nand_device_ready(struct mtd_info
*mtdinfo
);
23 #define FPGA_NAND_CMD_MASK (0x7 << 28)
24 #define FPGA_NAND_CMD_COMMAND (0x0 << 28)
25 #define FPGA_NAND_CMD_ADDR (0x1 << 28)
26 #define FPGA_NAND_CMD_READ (0x2 << 28)
27 #define FPGA_NAND_CMD_WRITE (0x3 << 28)
28 #define FPGA_NAND_BUSY (0x1 << 15)
29 #define FPGA_NAND_ENABLE (0x1 << 31)
30 #define FPGA_NAND_DATA_SHIFT 16
33 * sc_nand_write_byte - write one byte to the chip
34 * @mtd: MTD device structure
35 * @byte: pointer to data byte to write
37 static void sc_nand_write_byte(struct mtd_info
*mtd
, u_char byte
)
39 sc_nand_write_buf(mtd
, (const uchar
*)&byte
, sizeof(byte
));
43 * sc_nand_write_buf - write buffer to chip
44 * @mtd: MTD device structure
46 * @len: number of bytes to write
48 static void sc_nand_write_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
51 struct nand_chip
*this = mtd
->priv
;
53 for (i
= 0; i
< len
; i
++) {
54 out_be32(this->IO_ADDR_W
,
55 state
| (buf
[i
] << FPGA_NAND_DATA_SHIFT
));
61 * sc_nand_read_byte - read one byte from the chip
62 * @mtd: MTD device structure
64 static u_char
sc_nand_read_byte(struct mtd_info
*mtd
)
67 sc_nand_read_buf(mtd
, (uchar
*)&byte
, sizeof(byte
));
72 * sc_nand_read_word - read one word from the chip
73 * @mtd: MTD device structure
75 static u16
sc_nand_read_word(struct mtd_info
*mtd
)
78 sc_nand_read_buf(mtd
, (uchar
*)&word
, sizeof(word
));
83 * sc_nand_read_buf - read chip data into buffer
84 * @mtd: MTD device structure
85 * @buf: buffer to store date
86 * @len: number of bytes to read
88 static void sc_nand_read_buf(struct mtd_info
*mtd
, u_char
*buf
, int len
)
91 struct nand_chip
*this = mtd
->priv
;
94 val
= (state
& FPGA_NAND_ENABLE
) | FPGA_NAND_CMD_READ
;
96 out_be32(this->IO_ADDR_W
, val
);
97 for (i
= 0; i
< len
; i
++) {
98 buf
[i
] = (in_be32(this->IO_ADDR_R
) >> FPGA_NAND_DATA_SHIFT
) & 0xff;
103 * sc_nand_device_ready - Check the NAND device is ready for next command.
104 * @mtd: MTD device structure
106 static int sc_nand_device_ready(struct mtd_info
*mtdinfo
)
108 struct nand_chip
*this = mtdinfo
->priv
;
110 if (in_be32(this->IO_ADDR_W
) & FPGA_NAND_BUSY
)
116 * sc_nand_hwcontrol - NAND control functions wrapper.
117 * @mtd: MTD device structure
120 static void sc_nand_hwcontrol(struct mtd_info
*mtdinfo
, int cmd
, unsigned int ctrl
)
122 if (ctrl
& NAND_CTRL_CHANGE
) {
123 state
&= ~(FPGA_NAND_CMD_MASK
| FPGA_NAND_ENABLE
);
125 switch (ctrl
& (NAND_ALE
| NAND_CLE
)) {
127 state
|= FPGA_NAND_CMD_WRITE
;
131 state
|= FPGA_NAND_CMD_ADDR
;
135 state
|= FPGA_NAND_CMD_COMMAND
;
139 printf("%s: unknown ctrl %#x\n", __FUNCTION__
, ctrl
);
143 state
|= FPGA_NAND_ENABLE
;
146 if (cmd
!= NAND_CMD_NONE
)
147 sc_nand_write_byte(mtdinfo
, cmd
);
150 int board_nand_init(struct nand_chip
*nand
)
152 nand
->cmd_ctrl
= sc_nand_hwcontrol
;
153 nand
->ecc
.mode
= NAND_ECC_SOFT
;
154 nand
->dev_ready
= sc_nand_device_ready
;
155 nand
->read_byte
= sc_nand_read_byte
;
156 nand
->read_word
= sc_nand_read_word
;
157 nand
->write_buf
= sc_nand_write_buf
;
158 nand
->read_buf
= sc_nand_read_buf
;