board/socrates/socrates.c

   1 /*
   2  * (C) Copyright 2008
   3  * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
   4  *
   5  * Copyright 2004 Freescale Semiconductor.
   6  * (C) Copyright 2002,2003, Motorola Inc.
   7  * Xianghua Xiao, (X.Xiao@motorola.com)
   8  *
   9  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  10  *
  11  * See file CREDITS for list of people who contributed to this
  12  * project.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License as
  16  * published by the Free Software Foundation; either version 2 of
  17  * the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27  * MA 02111-1307 USA
  28  */
  29
  30 #include <common.h>
  31 #include <pci.h>
  32 #include <asm/processor.h>
  33 #include <asm/immap_85xx.h>
  34 #include <ioports.h>
  35 #include <flash.h>
  36 #include <libfdt.h>
  37 #include <fdt_support.h>
  38 #include <asm/io.h>
  39
  40 #if defined(CFG_FPGA_BASE)
  41 #include "upm_table.h"
  42 #endif
  43 DECLARE_GLOBAL_DATA_PTR;
  44
  45 extern flash_info_t flash_info[];       /* FLASH chips info */
  46
  47 void local_bus_init (void);
  48 ulong flash_get_size (ulong base, int banknum);
  49
  50 int checkboard (void)
  51 {
  52         volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
  53         char *src;
  54         int f;
  55         char *s = getenv("serial#");
  56
  57         puts("Board: Socrates");
  58         if (s != NULL) {
  59                 puts(", serial# ");
  60                 puts(s);
  61         }
  62         putc('\n');
  63
  64 #ifdef CONFIG_PCI
  65         /* Check the PCI_clk sel bit */
  66         if (in_be32(&gur->porpllsr) & (1<<15)) {
  67                 src = "SYSCLK";
  68                 f = CONFIG_SYS_CLK_FREQ;
  69         } else {
  70                 src = "PCI_CLK";
  71                 f = CONFIG_PCI_CLK_FREQ;
  72         }
  73         printf ("PCI1:  32 bit, %d MHz (%s)\n", f/1000000, src);
  74 #else
  75         printf ("PCI1:  disabled\n");
  76 #endif
  77
  78         /*
  79          * Initialize local bus.
  80          */
  81         local_bus_init ();
  82 #if defined(CFG_FPGA_BASE)
  83         /* Init UPMA for FPGA access */
  84         upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int));
  85 #endif
  86         return 0;
  87 }
  88
  89 int misc_init_r (void)
  90 {
  91         volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
  92
  93         /*
  94          * Adjust flash start and offset to detected values
  95          */
  96         gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
  97         gd->bd->bi_flashoffset = 0;
  98
  99         /*
 100          * Check if boot FLASH isn't max size
 101          */
 102         if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
 103                 memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
 104                 memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);
 105
 106                 /*
 107                  * Re-check to get correct base address
 108                  */
 109                 flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
 110         }
 111
 112         /*
 113          * Check if only one FLASH bank is available
 114          */
 115         if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
 116                 memctl->or1 = 0;
 117                 memctl->br1 = 0;
 118
 119                 /*
 120                  * Re-do flash protection upon new addresses
 121                  */
 122                 flash_protect (FLAG_PROTECT_CLEAR,
 123                                gd->bd->bi_flashstart, 0xffffffff,
 124                                &flash_info[CFG_MAX_FLASH_BANKS - 1]);
 125
 126                 /* Monitor protection ON by default */
 127                 flash_protect (FLAG_PROTECT_SET,
 128                                CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
 129                                &flash_info[CFG_MAX_FLASH_BANKS - 1]);
 130
 131                 /* Environment protection ON by default */
 132                 flash_protect (FLAG_PROTECT_SET,
 133                                CFG_ENV_ADDR,
 134                                CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 135                                &flash_info[CFG_MAX_FLASH_BANKS - 1]);
 136
 137                 /* Redundant environment protection ON by default */
 138                 flash_protect (FLAG_PROTECT_SET,
 139                                CFG_ENV_ADDR_REDUND,
 140                                CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 141                                &flash_info[CFG_MAX_FLASH_BANKS - 1]);
 142         }
 143
 144         return 0;
 145 }
 146
 147 /*
 148  * Initialize Local Bus
 149  */
 150 void local_bus_init (void)
 151 {
 152
 153         volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 154         volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 155
 156         lbc->ltesr = 0xffffffff;        /* Clear LBC error interrupts */
 157         lbc->lteir = 0xffffffff;        /* Enable LBC error interrupts */
 158         ecm->eedr = 0xffffffff;         /* Clear ecm errors */
 159         ecm->eeer = 0xffffffff;         /* Enable ecm errors */
 160
 161 }
 162
 163 #if defined(CONFIG_PCI)
 164 /*
 165  * Initialize PCI Devices, report devices found.
 166  */
 167
 168 #ifndef CONFIG_PCI_PNP
 169 static struct pci_config_table pci_mpc85xxads_config_table[] = {
 170         {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
 171          PCI_IDSEL_NUMBER, PCI_ANY_ID,
 172          pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
 173                                      PCI_ENET0_MEMADDR,
 174                                      PCI_COMMAND_MEMORY |
 175                                      PCI_COMMAND_MASTER}},
 176         {}
 177 };
 178 #endif
 179
 180
 181 static struct pci_controller hose = {
 182 #ifndef CONFIG_PCI_PNP
 183         config_table:pci_mpc85xxads_config_table,
 184 #endif
 185 };
 186
 187 #endif /* CONFIG_PCI */
 188
 189
 190 void pci_init_board (void)
 191 {
 192 #ifdef CONFIG_PCI
 193         pci_mpc85xx_init (&hose);
 194 #endif /* CONFIG_PCI */
 195 }
 196
 197 #ifdef CONFIG_BOARD_EARLY_INIT_R
 198 int board_early_init_r (void)
 199 {
 200 #ifdef CONFIG_PS2MULT
 201         ps2mult_early_init();
 202 #endif /* CONFIG_PS2MULT */
 203         return (0);
 204 }
 205 #endif /* CONFIG_BOARD_EARLY_INIT_R */
 206
 207 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 208 void
 209 ft_board_setup(void *blob, bd_t *bd)
 210 {
 211         u32 val[4];
 212         int rc;
 213
 214         ft_cpu_setup(blob, bd);
 215
 216         /* Fixup NOR mapping */
 217         val[0] = 0;                             /* chip select number */
 218         val[1] = 0;                             /* always 0 */
 219         val[2] = gd->bd->bi_flashstart;
 220         val[3] = gd->bd->bi_flashsize;
 221
 222         rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
 223                                   val, sizeof(val), 1);
 224         if (rc)
 225                 printf("Unable to update property NOR mapping, err=%s\n",
 226                        fdt_strerror(rc));
 227 }
 228 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */