board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 # Note only one of these may be selected at a time! But hidden choices are
   4 # not supported by Kconfig
   5 config SUNXI_GEN_SUN4I
   6         bool
   7         ---help---
   8         Select this for sunxi SoCs which have resets and clocks set up
   9         as the original A10 (mach-sun4i).
  10
  11 config SUNXI_GEN_SUN6I
  12         bool
  13         ---help---
  14         Select this for sunxi SoCs which have sun6i like periphery, like
  15         separate ahb reset control registers, custom pmic bus, new style
  16         watchdog, etc.
  17
  18
  19 choice
  20         prompt "Sunxi SoC Variant"
  21         optional
  22
  23 config MACH_SUN4I
  24         bool "sun4i (Allwinner A10)"
  25         select CPU_V7
  26         select SUNXI_GEN_SUN4I
  27         select SUPPORT_SPL
  28
  29 config MACH_SUN5I
  30         bool "sun5i (Allwinner A13)"
  31         select CPU_V7
  32         select SUNXI_GEN_SUN4I
  33         select SUPPORT_SPL
  34
  35 config MACH_SUN6I
  36         bool "sun6i (Allwinner A31)"
  37         select CPU_V7
  38         select CPU_V7_HAS_NONSEC
  39         select CPU_V7_HAS_VIRT
  40         select SUNXI_GEN_SUN6I
  41         select SUPPORT_SPL
  42         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  43
  44 config MACH_SUN7I
  45         bool "sun7i (Allwinner A20)"
  46         select CPU_V7
  47         select CPU_V7_HAS_NONSEC
  48         select CPU_V7_HAS_VIRT
  49         select SUNXI_GEN_SUN4I
  50         select SUPPORT_SPL
  51         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  52
  53 config MACH_SUN8I_A23
  54         bool "sun8i (Allwinner A23)"
  55         select CPU_V7
  56         select CPU_V7_HAS_NONSEC
  57         select CPU_V7_HAS_VIRT
  58         select SUNXI_GEN_SUN6I
  59         select SUPPORT_SPL
  60         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  61
  62 config MACH_SUN8I_A33
  63         bool "sun8i (Allwinner A33)"
  64         select CPU_V7
  65         select CPU_V7_HAS_NONSEC
  66         select CPU_V7_HAS_VIRT
  67         select SUNXI_GEN_SUN6I
  68         select SUPPORT_SPL
  69         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  70
  71 config MACH_SUN9I
  72         bool "sun9i (Allwinner A80)"
  73         select CPU_V7
  74         select SUNXI_GEN_SUN6I
  75
  76 endchoice
  77
  78 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
  79 config MACH_SUN8I
  80         bool
  81         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
  82
  83
  84 config DRAM_CLK
  85         int "sunxi dram clock speed"
  86         default 312 if MACH_SUN6I || MACH_SUN8I
  87         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  88         ---help---
  89         Set the dram clock speed, valid range 240 - 480, must be a multiple
  90         of 24.
  91
  92 if MACH_SUN5I || MACH_SUN7I
  93 config DRAM_MBUS_CLK
  94         int "sunxi mbus clock speed"
  95         default 300
  96         ---help---
  97         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
  98
  99 endif
 100
 101 config DRAM_ZQ
 102         int "sunxi dram zq value"
 103         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 104         default 127 if MACH_SUN7I
 105         ---help---
 106         Set the dram zq value.
 107
 108 config DRAM_ODT_EN
 109         bool "sunxi dram odt enable"
 110         default n if !MACH_SUN8I_A23
 111         default y if MACH_SUN8I_A23
 112         ---help---
 113         Select this to enable dram odt (on die termination).
 114
 115 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 116 config DRAM_EMR1
 117         int "sunxi dram emr1 value"
 118         default 0 if MACH_SUN4I
 119         default 4 if MACH_SUN5I || MACH_SUN7I
 120         ---help---
 121         Set the dram controller emr1 value.
 122
 123 config DRAM_TPR3
 124         hex "sunxi dram tpr3 value"
 125         default 0
 126         ---help---
 127         Set the dram controller tpr3 parameter. This parameter configures
 128         the delay on the command lane and also phase shifts, which are
 129         applied for sampling incoming read data. The default value 0
 130         means that no phase/delay adjustments are necessary. Properly
 131         configuring this parameter increases reliability at high DRAM
 132         clock speeds.
 133
 134 config DRAM_DQS_GATING_DELAY
 135         hex "sunxi dram dqs_gating_delay value"
 136         default 0
 137         ---help---
 138         Set the dram controller dqs_gating_delay parmeter. Each byte
 139         encodes the DQS gating delay for each byte lane. The delay
 140         granularity is 1/4 cycle. For example, the value 0x05060606
 141         means that the delay is 5 quarter-cycles for one lane (1.25
 142         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 143         The default value 0 means autodetection. The results of hardware
 144         autodetection are not very reliable and depend on the chip
 145         temperature (sometimes producing different results on cold start
 146         and warm reboot). But the accuracy of hardware autodetection
 147         is usually good enough, unless running at really high DRAM
 148         clocks speeds (up to 600MHz). If unsure, keep as 0.
 149
 150 choice
 151         prompt "sunxi dram timings"
 152         default DRAM_TIMINGS_VENDOR_MAGIC
 153         ---help---
 154         Select the timings of the DDR3 chips.
 155
 156 config DRAM_TIMINGS_VENDOR_MAGIC
 157         bool "Magic vendor timings from Android"
 158         ---help---
 159         The same DRAM timings as in the Allwinner boot0 bootloader.
 160
 161 config DRAM_TIMINGS_DDR3_1066F_1333H
 162         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 163         ---help---
 164         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 165         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 166         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 167         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 168         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 169         that down binning to DDR3-1066F is supported (because DDR3-1066F
 170         uses a bit faster timings than DDR3-1333H).
 171
 172 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 173         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 174         ---help---
 175         Use the timings of the slowest possible JEDEC speed bin for the
 176         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 177         DDR3-800E, DDR3-1066G or DDR3-1333J.
 178
 179 endchoice
 180
 181 endif
 182
 183 if MACH_SUN8I_A23
 184 config DRAM_ODT_CORRECTION
 185         int "sunxi dram odt correction value"
 186         default 0
 187         ---help---
 188         Set the dram odt correction value (range -255 - 255). In allwinner
 189         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 190         in the [dram] section. When bit 31 of the odt_en variable is set
 191         then the correction is negative. Usually the value for this is 0.
 192 endif
 193
 194 config SYS_CLK_FREQ
 195         default 912000000 if MACH_SUN7I
 196         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 197
 198 config SYS_CONFIG_NAME
 199         default "sun4i" if MACH_SUN4I
 200         default "sun5i" if MACH_SUN5I
 201         default "sun6i" if MACH_SUN6I
 202         default "sun7i" if MACH_SUN7I
 203         default "sun8i" if MACH_SUN8I
 204         default "sun9i" if MACH_SUN9I
 205
 206 config SYS_BOARD
 207         default "sunxi"
 208
 209 config SYS_SOC
 210         default "sunxi"
 211
 212 config UART0_PORT_F
 213         bool "UART0 on MicroSD breakout board"
 214         default n
 215         ---help---
 216         Repurpose the SD card slot for getting access to the UART0 serial
 217         console. Primarily useful only for low level u-boot debugging on
 218         tablets, where normal UART0 is difficult to access and requires
 219         device disassembly and/or soldering. As the SD card can't be used
 220         at the same time, the system can be only booted in the FEL mode.
 221         Only enable this if you really know what you are doing.
 222
 223 config OLD_SUNXI_KERNEL_COMPAT
 224         boolean "Enable workarounds for booting old kernels"
 225         default n
 226         ---help---
 227         Set this to enable various workarounds for old kernels, this results in
 228         sub-optimal settings for newer kernels, only enable if needed.
 229
 230 config MMC0_CD_PIN
 231         string "Card detect pin for mmc0"
 232         default ""
 233         ---help---
 234         Set the card detect pin for mmc0, leave empty to not use cd. This
 235         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 236         PH1 for pin 1 of port H.
 237
 238 config MMC1_CD_PIN
 239         string "Card detect pin for mmc1"
 240         default ""
 241         ---help---
 242         See MMC0_CD_PIN help text.
 243
 244 config MMC2_CD_PIN
 245         string "Card detect pin for mmc2"
 246         default ""
 247         ---help---
 248         See MMC0_CD_PIN help text.
 249
 250 config MMC3_CD_PIN
 251         string "Card detect pin for mmc3"
 252         default ""
 253         ---help---
 254         See MMC0_CD_PIN help text.
 255
 256 config MMC1_PINS
 257         string "Pins for mmc1"
 258         default ""
 259         ---help---
 260         Set the pins used for mmc1, when applicable. This takes a string in the
 261         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 262
 263 config MMC2_PINS
 264         string "Pins for mmc2"
 265         default ""
 266         ---help---
 267         See MMC1_PINS help text.
 268
 269 config MMC3_PINS
 270         string "Pins for mmc3"
 271         default ""
 272         ---help---
 273         See MMC1_PINS help text.
 274
 275 config MMC_SUNXI_SLOT_EXTRA
 276         int "mmc extra slot number"
 277         default -1
 278         ---help---
 279         sunxi builds always enable mmc0, some boards also have a second sdcard
 280         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 281         support for this.
 282
 283 config USB0_VBUS_PIN
 284         string "Vbus enable pin for usb0 (otg)"
 285         default ""
 286         ---help---
 287         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 288         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 289
 290 config USB0_VBUS_DET
 291         string "Vbus detect pin for usb0 (otg)"
 292         default ""
 293         ---help---
 294         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 295         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 296
 297 config USB0_ID_DET
 298         string "ID detect pin for usb0 (otg)"
 299         default ""
 300         ---help---
 301         Set the ID detect pin for usb0 (otg). This takes a string in the
 302         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 303
 304 config USB1_VBUS_PIN
 305         string "Vbus enable pin for usb1 (ehci0)"
 306         default "PH6" if MACH_SUN4I || MACH_SUN7I
 307         default "PH27" if MACH_SUN6I
 308         ---help---
 309         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 310         a string in the format understood by sunxi_name_to_gpio, e.g.
 311         PH1 for pin 1 of port H.
 312
 313 config USB2_VBUS_PIN
 314         string "Vbus enable pin for usb2 (ehci1)"
 315         default "PH3" if MACH_SUN4I || MACH_SUN7I
 316         default "PH24" if MACH_SUN6I
 317         ---help---
 318         See USB1_VBUS_PIN help text.
 319
 320 config I2C0_ENABLE
 321         bool "Enable I2C/TWI controller 0"
 322         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 323         default n if MACH_SUN6I || MACH_SUN8I
 324         ---help---
 325         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 326         its clock and setting up the bus. This is especially useful on devices
 327         with slaves connected to the bus or with pins exposed through e.g. an
 328         expansion port/header.
 329
 330 config I2C1_ENABLE
 331         bool "Enable I2C/TWI controller 1"
 332         default n
 333         ---help---
 334         See I2C0_ENABLE help text.
 335
 336 config I2C2_ENABLE
 337         bool "Enable I2C/TWI controller 2"
 338         default n
 339         ---help---
 340         See I2C0_ENABLE help text.
 341
 342 if MACH_SUN6I || MACH_SUN7I
 343 config I2C3_ENABLE
 344         bool "Enable I2C/TWI controller 3"
 345         default n
 346         ---help---
 347         See I2C0_ENABLE help text.
 348 endif
 349
 350 if MACH_SUN7I
 351 config I2C4_ENABLE
 352         bool "Enable I2C/TWI controller 4"
 353         default n
 354         ---help---
 355         See I2C0_ENABLE help text.
 356 endif
 357
 358 config AXP_GPIO
 359         boolean "Enable support for gpio-s on axp PMICs"
 360         default n
 361         ---help---
 362         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 363
 364 config VIDEO
 365         boolean "Enable graphical uboot console on HDMI, LCD or VGA"
 366         default y
 367         ---help---
 368         Say Y here to add support for using a cfb console on the HDMI, LCD
 369         or VGA output found on most sunxi devices. See doc/README.video for
 370         info on how to select the video output and mode.
 371
 372 config VIDEO_HDMI
 373         boolean "HDMI output support"
 374         depends on VIDEO && !MACH_SUN8I
 375         default y
 376         ---help---
 377         Say Y here to add support for outputting video over HDMI.
 378
 379 config VIDEO_VGA
 380         boolean "VGA output support"
 381         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 382         default n
 383         ---help---
 384         Say Y here to add support for outputting video over VGA.
 385
 386 config VIDEO_VGA_VIA_LCD
 387         boolean "VGA via LCD controller support"
 388         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 389         default n
 390         ---help---
 391         Say Y here to add support for external DACs connected to the parallel
 392         LCD interface driving a VGA connector, such as found on the
 393         Olimex A13 boards.
 394
 395 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 396         boolean "Force sync active high for VGA via LCD controller support"
 397         depends on VIDEO_VGA_VIA_LCD
 398         default n
 399         ---help---
 400         Say Y here if you've a board which uses opendrain drivers for the vga
 401         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 402         positive edges for a stable video output, so on boards with opendrain
 403         drivers the sync signals must always be active high.
 404
 405 config VIDEO_VGA_EXTERNAL_DAC_EN
 406         string "LCD panel power enable pin"
 407         depends on VIDEO_VGA_VIA_LCD
 408         default ""
 409         ---help---
 410         Set the enable pin for the external VGA DAC. This takes a string in the
 411         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 412
 413 config VIDEO_COMPOSITE
 414         boolean "Composite video output support"
 415         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 416         default n
 417         ---help---
 418         Say Y here to add support for outputting composite video.
 419
 420 config VIDEO_LCD_MODE
 421         string "LCD panel timing details"
 422         depends on VIDEO
 423         default ""
 424         ---help---
 425         LCD panel timing details string, leave empty if there is no LCD panel.
 426         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 427         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 428
 429 config VIDEO_LCD_DCLK_PHASE
 430         int "LCD panel display clock phase"
 431         depends on VIDEO
 432         default 1
 433         ---help---
 434         Select LCD panel display clock phase shift, range 0-3.
 435
 436 config VIDEO_LCD_POWER
 437         string "LCD panel power enable pin"
 438         depends on VIDEO
 439         default ""
 440         ---help---
 441         Set the power enable pin for the LCD panel. This takes a string in the
 442         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 443
 444 config VIDEO_LCD_RESET
 445         string "LCD panel reset pin"
 446         depends on VIDEO
 447         default ""
 448         ---help---
 449         Set the reset pin for the LCD panel. This takes a string in the format
 450         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 451
 452 config VIDEO_LCD_BL_EN
 453         string "LCD panel backlight enable pin"
 454         depends on VIDEO
 455         default ""
 456         ---help---
 457         Set the backlight enable pin for the LCD panel. This takes a string in the
 458         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 459         port H.
 460
 461 config VIDEO_LCD_BL_PWM
 462         string "LCD panel backlight pwm pin"
 463         depends on VIDEO
 464         default ""
 465         ---help---
 466         Set the backlight pwm pin for the LCD panel. This takes a string in the
 467         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 468
 469 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 470         bool "LCD panel backlight pwm is inverted"
 471         depends on VIDEO
 472         default y
 473         ---help---
 474         Set this if the backlight pwm output is active low.
 475
 476 config VIDEO_LCD_PANEL_I2C
 477         bool "LCD panel needs to be configured via i2c"
 478         depends on VIDEO
 479         default n
 480         ---help---
 481         Say y here if the LCD panel needs to be configured via i2c. This
 482         will add a bitbang i2c controller using gpios to talk to the LCD.
 483
 484 config VIDEO_LCD_PANEL_I2C_SDA
 485         string "LCD panel i2c interface SDA pin"
 486         depends on VIDEO_LCD_PANEL_I2C
 487         default "PG12"
 488         ---help---
 489         Set the SDA pin for the LCD i2c interface. This takes a string in the
 490         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 491
 492 config VIDEO_LCD_PANEL_I2C_SCL
 493         string "LCD panel i2c interface SCL pin"
 494         depends on VIDEO_LCD_PANEL_I2C
 495         default "PG10"
 496         ---help---
 497         Set the SCL pin for the LCD i2c interface. This takes a string in the
 498         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 499
 500
 501 # Note only one of these may be selected at a time! But hidden choices are
 502 # not supported by Kconfig
 503 config VIDEO_LCD_IF_PARALLEL
 504         bool
 505
 506 config VIDEO_LCD_IF_LVDS
 507         bool
 508
 509
 510 choice
 511         prompt "LCD panel support"
 512         depends on VIDEO
 513         ---help---
 514         Select which type of LCD panel to support.
 515
 516 config VIDEO_LCD_PANEL_PARALLEL
 517         bool "Generic parallel interface LCD panel"
 518         select VIDEO_LCD_IF_PARALLEL
 519
 520 config VIDEO_LCD_PANEL_LVDS
 521         bool "Generic lvds interface LCD panel"
 522         select VIDEO_LCD_IF_LVDS
 523
 524 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 525         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 526         select VIDEO_LCD_SSD2828
 527         select VIDEO_LCD_IF_PARALLEL
 528         ---help---
 529          7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 530
 531 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 532         bool "Hitachi tx18d42vm LCD panel"
 533         select VIDEO_LCD_HITACHI_TX18D42VM
 534         select VIDEO_LCD_IF_LVDS
 535         ---help---
 536         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 537
 538 config VIDEO_LCD_TL059WV5C0
 539         bool "tl059wv5c0 LCD panel"
 540         select VIDEO_LCD_PANEL_I2C
 541         select VIDEO_LCD_IF_PARALLEL
 542         ---help---
 543         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 544         Aigo M60/M608/M606 tablets.
 545
 546 endchoice
 547
 548
 549 config GMAC_TX_DELAY
 550         int "GMAC Transmit Clock Delay Chain"
 551         default 0
 552         ---help---
 553         Set the GMAC Transmit Clock Delay Chain value.
 554
 555 endif