board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 # Note only one of these may be selected at a time! But hidden choices are
   4 # not supported by Kconfig
   5 config SUNXI_GEN_SUN4I
   6         bool
   7         ---help---
   8         Select this for sunxi SoCs which have resets and clocks set up
   9         as the original A10 (mach-sun4i).
  10
  11 config SUNXI_GEN_SUN6I
  12         bool
  13         ---help---
  14         Select this for sunxi SoCs which have sun6i like periphery, like
  15         separate ahb reset control registers, custom pmic bus, new style
  16         watchdog, etc.
  17
  18
  19 choice
  20         prompt "Sunxi SoC Variant"
  21         optional
  22
  23 config MACH_SUN4I
  24         bool "sun4i (Allwinner A10)"
  25         select CPU_V7
  26         select SUNXI_GEN_SUN4I
  27         select SUPPORT_SPL
  28
  29 config MACH_SUN5I
  30         bool "sun5i (Allwinner A13)"
  31         select CPU_V7
  32         select SUNXI_GEN_SUN4I
  33         select SUPPORT_SPL
  34
  35 config MACH_SUN6I
  36         bool "sun6i (Allwinner A31)"
  37         select CPU_V7
  38         select CPU_V7_HAS_NONSEC
  39         select CPU_V7_HAS_VIRT
  40         select SUNXI_GEN_SUN6I
  41         select SUPPORT_SPL
  42         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  43
  44 config MACH_SUN7I
  45         bool "sun7i (Allwinner A20)"
  46         select CPU_V7
  47         select CPU_V7_HAS_NONSEC
  48         select CPU_V7_HAS_VIRT
  49         select SUNXI_GEN_SUN4I
  50         select SUPPORT_SPL
  51         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  52
  53 config MACH_SUN8I_A23
  54         bool "sun8i (Allwinner A23)"
  55         select CPU_V7
  56         select CPU_V7_HAS_NONSEC
  57         select CPU_V7_HAS_VIRT
  58         select SUNXI_GEN_SUN6I
  59         select SUPPORT_SPL
  60         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  61
  62 config MACH_SUN8I_A33
  63         bool "sun8i (Allwinner A33)"
  64         select CPU_V7
  65         select CPU_V7_HAS_NONSEC
  66         select CPU_V7_HAS_VIRT
  67         select SUNXI_GEN_SUN6I
  68         select SUPPORT_SPL
  69         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  70
  71 config MACH_SUN8I_H3
  72         bool "sun8i (Allwinner H3)"
  73         select CPU_V7
  74         select CPU_V7_HAS_NONSEC
  75         select CPU_V7_HAS_VIRT
  76         select SUNXI_GEN_SUN6I
  77         select SUPPORT_SPL
  78         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  79
  80 config MACH_SUN50I
  81         bool "sun50i (Allwinner A64)"
  82         select ARM64
  83         select SUNXI_GEN_SUN6I
  84
  85 config MACH_SUN8I_A83T
  86         bool "sun8i (Allwinner A83T)"
  87         select CPU_V7
  88         select SUNXI_GEN_SUN6I
  89         select SUPPORT_SPL
  90
  91 config MACH_SUN9I
  92         bool "sun9i (Allwinner A80)"
  93         select CPU_V7
  94         select SUNXI_GEN_SUN6I
  95
  96 endchoice
  97
  98 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
  99 config MACH_SUN8I
 100         bool
 101         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T
 102
 103 config DRAM_TYPE
 104         int "sunxi dram type"
 105         depends on MACH_SUN8I_A83T
 106         default 3
 107         ---help---
 108         Set the dram type, 3: DDR3, 7: LPDDR3
 109
 110 config DRAM_CLK
 111         int "sunxi dram clock speed"
 112         default 312 if MACH_SUN6I || MACH_SUN8I
 113         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 114         ---help---
 115         Set the dram clock speed, valid range 240 - 480, must be a multiple
 116         of 24.
 117
 118 if MACH_SUN5I || MACH_SUN7I
 119 config DRAM_MBUS_CLK
 120         int "sunxi mbus clock speed"
 121         default 300
 122         ---help---
 123         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
 124
 125 endif
 126
 127 config DRAM_ZQ
 128         int "sunxi dram zq value"
 129         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 130         default 127 if MACH_SUN7I
 131         ---help---
 132         Set the dram zq value.
 133
 134 config DRAM_ODT_EN
 135         bool "sunxi dram odt enable"
 136         default n if !MACH_SUN8I_A23
 137         default y if MACH_SUN8I_A23
 138         ---help---
 139         Select this to enable dram odt (on die termination).
 140
 141 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 142 config DRAM_EMR1
 143         int "sunxi dram emr1 value"
 144         default 0 if MACH_SUN4I
 145         default 4 if MACH_SUN5I || MACH_SUN7I
 146         ---help---
 147         Set the dram controller emr1 value.
 148
 149 config DRAM_TPR3
 150         hex "sunxi dram tpr3 value"
 151         default 0
 152         ---help---
 153         Set the dram controller tpr3 parameter. This parameter configures
 154         the delay on the command lane and also phase shifts, which are
 155         applied for sampling incoming read data. The default value 0
 156         means that no phase/delay adjustments are necessary. Properly
 157         configuring this parameter increases reliability at high DRAM
 158         clock speeds.
 159
 160 config DRAM_DQS_GATING_DELAY
 161         hex "sunxi dram dqs_gating_delay value"
 162         default 0
 163         ---help---
 164         Set the dram controller dqs_gating_delay parmeter. Each byte
 165         encodes the DQS gating delay for each byte lane. The delay
 166         granularity is 1/4 cycle. For example, the value 0x05060606
 167         means that the delay is 5 quarter-cycles for one lane (1.25
 168         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 169         The default value 0 means autodetection. The results of hardware
 170         autodetection are not very reliable and depend on the chip
 171         temperature (sometimes producing different results on cold start
 172         and warm reboot). But the accuracy of hardware autodetection
 173         is usually good enough, unless running at really high DRAM
 174         clocks speeds (up to 600MHz). If unsure, keep as 0.
 175
 176 choice
 177         prompt "sunxi dram timings"
 178         default DRAM_TIMINGS_VENDOR_MAGIC
 179         ---help---
 180         Select the timings of the DDR3 chips.
 181
 182 config DRAM_TIMINGS_VENDOR_MAGIC
 183         bool "Magic vendor timings from Android"
 184         ---help---
 185         The same DRAM timings as in the Allwinner boot0 bootloader.
 186
 187 config DRAM_TIMINGS_DDR3_1066F_1333H
 188         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 189         ---help---
 190         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 191         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 192         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 193         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 194         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 195         that down binning to DDR3-1066F is supported (because DDR3-1066F
 196         uses a bit faster timings than DDR3-1333H).
 197
 198 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 199         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 200         ---help---
 201         Use the timings of the slowest possible JEDEC speed bin for the
 202         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 203         DDR3-800E, DDR3-1066G or DDR3-1333J.
 204
 205 endchoice
 206
 207 endif
 208
 209 if MACH_SUN8I_A23
 210 config DRAM_ODT_CORRECTION
 211         int "sunxi dram odt correction value"
 212         default 0
 213         ---help---
 214         Set the dram odt correction value (range -255 - 255). In allwinner
 215         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 216         in the [dram] section. When bit 31 of the odt_en variable is set
 217         then the correction is negative. Usually the value for this is 0.
 218 endif
 219
 220 config SYS_CLK_FREQ
 221         default 816000000 if MACH_SUN50I
 222         default 912000000 if MACH_SUN7I
 223         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 224
 225 config SYS_CONFIG_NAME
 226         default "sun4i" if MACH_SUN4I
 227         default "sun5i" if MACH_SUN5I
 228         default "sun6i" if MACH_SUN6I
 229         default "sun7i" if MACH_SUN7I
 230         default "sun8i" if MACH_SUN8I
 231         default "sun9i" if MACH_SUN9I
 232         default "sun50i" if MACH_SUN50I
 233
 234 config SYS_BOARD
 235         default "sunxi"
 236
 237 config SYS_SOC
 238         default "sunxi"
 239
 240 config UART0_PORT_F
 241         bool "UART0 on MicroSD breakout board"
 242         default n
 243         ---help---
 244         Repurpose the SD card slot for getting access to the UART0 serial
 245         console. Primarily useful only for low level u-boot debugging on
 246         tablets, where normal UART0 is difficult to access and requires
 247         device disassembly and/or soldering. As the SD card can't be used
 248         at the same time, the system can be only booted in the FEL mode.
 249         Only enable this if you really know what you are doing.
 250
 251 config OLD_SUNXI_KERNEL_COMPAT
 252         boolean "Enable workarounds for booting old kernels"
 253         default n
 254         ---help---
 255         Set this to enable various workarounds for old kernels, this results in
 256         sub-optimal settings for newer kernels, only enable if needed.
 257
 258 config MMC
 259         depends on !UART0_PORT_F
 260         default y if ARCH_SUNXI
 261
 262 config MMC0_CD_PIN
 263         string "Card detect pin for mmc0"
 264         default ""
 265         ---help---
 266         Set the card detect pin for mmc0, leave empty to not use cd. This
 267         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 268         PH1 for pin 1 of port H.
 269
 270 config MMC1_CD_PIN
 271         string "Card detect pin for mmc1"
 272         default ""
 273         ---help---
 274         See MMC0_CD_PIN help text.
 275
 276 config MMC2_CD_PIN
 277         string "Card detect pin for mmc2"
 278         default ""
 279         ---help---
 280         See MMC0_CD_PIN help text.
 281
 282 config MMC3_CD_PIN
 283         string "Card detect pin for mmc3"
 284         default ""
 285         ---help---
 286         See MMC0_CD_PIN help text.
 287
 288 config MMC1_PINS
 289         string "Pins for mmc1"
 290         default ""
 291         ---help---
 292         Set the pins used for mmc1, when applicable. This takes a string in the
 293         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 294
 295 config MMC2_PINS
 296         string "Pins for mmc2"
 297         default ""
 298         ---help---
 299         See MMC1_PINS help text.
 300
 301 config MMC3_PINS
 302         string "Pins for mmc3"
 303         default ""
 304         ---help---
 305         See MMC1_PINS help text.
 306
 307 config MMC_SUNXI_SLOT_EXTRA
 308         int "mmc extra slot number"
 309         default -1
 310         ---help---
 311         sunxi builds always enable mmc0, some boards also have a second sdcard
 312         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 313         support for this.
 314
 315 config USB0_VBUS_PIN
 316         string "Vbus enable pin for usb0 (otg)"
 317         default ""
 318         ---help---
 319         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 320         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 321
 322 config USB0_VBUS_DET
 323         string "Vbus detect pin for usb0 (otg)"
 324         default ""
 325         ---help---
 326         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 327         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 328
 329 config USB0_ID_DET
 330         string "ID detect pin for usb0 (otg)"
 331         default ""
 332         ---help---
 333         Set the ID detect pin for usb0 (otg). This takes a string in the
 334         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 335
 336 config USB1_VBUS_PIN
 337         string "Vbus enable pin for usb1 (ehci0)"
 338         default "PH6" if MACH_SUN4I || MACH_SUN7I
 339         default "PH27" if MACH_SUN6I
 340         ---help---
 341         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 342         a string in the format understood by sunxi_name_to_gpio, e.g.
 343         PH1 for pin 1 of port H.
 344
 345 config USB2_VBUS_PIN
 346         string "Vbus enable pin for usb2 (ehci1)"
 347         default "PH3" if MACH_SUN4I || MACH_SUN7I
 348         default "PH24" if MACH_SUN6I
 349         ---help---
 350         See USB1_VBUS_PIN help text.
 351
 352 config USB3_VBUS_PIN
 353         string "Vbus enable pin for usb3 (ehci2)"
 354         default ""
 355         ---help---
 356         See USB1_VBUS_PIN help text.
 357
 358 config I2C0_ENABLE
 359         bool "Enable I2C/TWI controller 0"
 360         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 361         default n if MACH_SUN6I || MACH_SUN8I
 362         ---help---
 363         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 364         its clock and setting up the bus. This is especially useful on devices
 365         with slaves connected to the bus or with pins exposed through e.g. an
 366         expansion port/header.
 367
 368 config I2C1_ENABLE
 369         bool "Enable I2C/TWI controller 1"
 370         default n
 371         ---help---
 372         See I2C0_ENABLE help text.
 373
 374 config I2C2_ENABLE
 375         bool "Enable I2C/TWI controller 2"
 376         default n
 377         ---help---
 378         See I2C0_ENABLE help text.
 379
 380 if MACH_SUN6I || MACH_SUN7I
 381 config I2C3_ENABLE
 382         bool "Enable I2C/TWI controller 3"
 383         default n
 384         ---help---
 385         See I2C0_ENABLE help text.
 386 endif
 387
 388 if SUNXI_GEN_SUN6I
 389 config R_I2C_ENABLE
 390         bool "Enable the PRCM I2C/TWI controller"
 391         # This is used for the pmic on H3
 392         default y if SY8106A_POWER
 393         ---help---
 394         Set this to y to enable the I2C controller which is part of the PRCM.
 395 endif
 396
 397 if MACH_SUN7I
 398 config I2C4_ENABLE
 399         bool "Enable I2C/TWI controller 4"
 400         default n
 401         ---help---
 402         See I2C0_ENABLE help text.
 403 endif
 404
 405 config AXP_GPIO
 406         boolean "Enable support for gpio-s on axp PMICs"
 407         default n
 408         ---help---
 409         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 410
 411 config VIDEO
 412         boolean "Enable graphical uboot console on HDMI, LCD or VGA"
 413         depends on !MACH_SUN8I_A83T
 414         default y
 415         ---help---
 416         Say Y here to add support for using a cfb console on the HDMI, LCD
 417         or VGA output found on most sunxi devices. See doc/README.video for
 418         info on how to select the video output and mode.
 419
 420 config VIDEO_HDMI
 421         boolean "HDMI output support"
 422         depends on VIDEO && !MACH_SUN8I
 423         default y
 424         ---help---
 425         Say Y here to add support for outputting video over HDMI.
 426
 427 config VIDEO_VGA
 428         boolean "VGA output support"
 429         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 430         default n
 431         ---help---
 432         Say Y here to add support for outputting video over VGA.
 433
 434 config VIDEO_VGA_VIA_LCD
 435         boolean "VGA via LCD controller support"
 436         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 437         default n
 438         ---help---
 439         Say Y here to add support for external DACs connected to the parallel
 440         LCD interface driving a VGA connector, such as found on the
 441         Olimex A13 boards.
 442
 443 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 444         boolean "Force sync active high for VGA via LCD controller support"
 445         depends on VIDEO_VGA_VIA_LCD
 446         default n
 447         ---help---
 448         Say Y here if you've a board which uses opendrain drivers for the vga
 449         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 450         positive edges for a stable video output, so on boards with opendrain
 451         drivers the sync signals must always be active high.
 452
 453 config VIDEO_VGA_EXTERNAL_DAC_EN
 454         string "LCD panel power enable pin"
 455         depends on VIDEO_VGA_VIA_LCD
 456         default ""
 457         ---help---
 458         Set the enable pin for the external VGA DAC. This takes a string in the
 459         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 460
 461 config VIDEO_COMPOSITE
 462         boolean "Composite video output support"
 463         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 464         default n
 465         ---help---
 466         Say Y here to add support for outputting composite video.
 467
 468 config VIDEO_LCD_MODE
 469         string "LCD panel timing details"
 470         depends on VIDEO
 471         default ""
 472         ---help---
 473         LCD panel timing details string, leave empty if there is no LCD panel.
 474         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 475         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 476         Also see: http://linux-sunxi.org/LCD
 477
 478 config VIDEO_LCD_DCLK_PHASE
 479         int "LCD panel display clock phase"
 480         depends on VIDEO
 481         default 1
 482         ---help---
 483         Select LCD panel display clock phase shift, range 0-3.
 484
 485 config VIDEO_LCD_POWER
 486         string "LCD panel power enable pin"
 487         depends on VIDEO
 488         default ""
 489         ---help---
 490         Set the power enable pin for the LCD panel. This takes a string in the
 491         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 492
 493 config VIDEO_LCD_RESET
 494         string "LCD panel reset pin"
 495         depends on VIDEO
 496         default ""
 497         ---help---
 498         Set the reset pin for the LCD panel. This takes a string in the format
 499         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 500
 501 config VIDEO_LCD_BL_EN
 502         string "LCD panel backlight enable pin"
 503         depends on VIDEO
 504         default ""
 505         ---help---
 506         Set the backlight enable pin for the LCD panel. This takes a string in the
 507         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 508         port H.
 509
 510 config VIDEO_LCD_BL_PWM
 511         string "LCD panel backlight pwm pin"
 512         depends on VIDEO
 513         default ""
 514         ---help---
 515         Set the backlight pwm pin for the LCD panel. This takes a string in the
 516         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 517
 518 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 519         bool "LCD panel backlight pwm is inverted"
 520         depends on VIDEO
 521         default y
 522         ---help---
 523         Set this if the backlight pwm output is active low.
 524
 525 config VIDEO_LCD_PANEL_I2C
 526         bool "LCD panel needs to be configured via i2c"
 527         depends on VIDEO
 528         default n
 529         ---help---
 530         Say y here if the LCD panel needs to be configured via i2c. This
 531         will add a bitbang i2c controller using gpios to talk to the LCD.
 532
 533 config VIDEO_LCD_PANEL_I2C_SDA
 534         string "LCD panel i2c interface SDA pin"
 535         depends on VIDEO_LCD_PANEL_I2C
 536         default "PG12"
 537         ---help---
 538         Set the SDA pin for the LCD i2c interface. This takes a string in the
 539         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 540
 541 config VIDEO_LCD_PANEL_I2C_SCL
 542         string "LCD panel i2c interface SCL pin"
 543         depends on VIDEO_LCD_PANEL_I2C
 544         default "PG10"
 545         ---help---
 546         Set the SCL pin for the LCD i2c interface. This takes a string in the
 547         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 548
 549
 550 # Note only one of these may be selected at a time! But hidden choices are
 551 # not supported by Kconfig
 552 config VIDEO_LCD_IF_PARALLEL
 553         bool
 554
 555 config VIDEO_LCD_IF_LVDS
 556         bool
 557
 558
 559 choice
 560         prompt "LCD panel support"
 561         depends on VIDEO
 562         ---help---
 563         Select which type of LCD panel to support.
 564
 565 config VIDEO_LCD_PANEL_PARALLEL
 566         bool "Generic parallel interface LCD panel"
 567         select VIDEO_LCD_IF_PARALLEL
 568
 569 config VIDEO_LCD_PANEL_LVDS
 570         bool "Generic lvds interface LCD panel"
 571         select VIDEO_LCD_IF_LVDS
 572
 573 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 574         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 575         select VIDEO_LCD_SSD2828
 576         select VIDEO_LCD_IF_PARALLEL
 577         ---help---
 578         7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 579
 580 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
 581         bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
 582         select VIDEO_LCD_ANX9804
 583         select VIDEO_LCD_IF_PARALLEL
 584         select VIDEO_LCD_PANEL_I2C
 585         ---help---
 586         Select this for eDP LCD panels with 4 lanes running at 1.62G,
 587         connected via an ANX9804 bridge chip.
 588
 589 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 590         bool "Hitachi tx18d42vm LCD panel"
 591         select VIDEO_LCD_HITACHI_TX18D42VM
 592         select VIDEO_LCD_IF_LVDS
 593         ---help---
 594         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 595
 596 config VIDEO_LCD_TL059WV5C0
 597         bool "tl059wv5c0 LCD panel"
 598         select VIDEO_LCD_PANEL_I2C
 599         select VIDEO_LCD_IF_PARALLEL
 600         ---help---
 601         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 602         Aigo M60/M608/M606 tablets.
 603
 604 endchoice
 605
 606
 607 config GMAC_TX_DELAY
 608         int "GMAC Transmit Clock Delay Chain"
 609         default 0
 610         ---help---
 611         Set the GMAC Transmit Clock Delay Chain value.
 612
 613 config SPL_STACK_R_ADDR
 614         default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
 615         default 0x2fe00000 if MACH_SUN9I
 616
 617 endif