board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 config SPL_GPIO_SUPPORT
   4         default y
   5
   6 config SPL_LIBCOMMON_SUPPORT
   7         default y
   8
   9 config SPL_LIBDISK_SUPPORT
  10         default y
  11
  12 config SPL_LIBGENERIC_SUPPORT
  13         default y
  14
  15 config SPL_MMC_SUPPORT
  16         default y
  17
  18 # Note only one of these may be selected at a time! But hidden choices are
  19 # not supported by Kconfig
  20 config SUNXI_GEN_SUN4I
  21         bool
  22         ---help---
  23         Select this for sunxi SoCs which have resets and clocks set up
  24         as the original A10 (mach-sun4i).
  25
  26 config SUNXI_GEN_SUN6I
  27         bool
  28         ---help---
  29         Select this for sunxi SoCs which have sun6i like periphery, like
  30         separate ahb reset control registers, custom pmic bus, new style
  31         watchdog, etc.
  32
  33
  34 choice
  35         prompt "Sunxi SoC Variant"
  36         optional
  37
  38 config MACH_SUN4I
  39         bool "sun4i (Allwinner A10)"
  40         select CPU_V7
  41         select SUNXI_GEN_SUN4I
  42         select SUPPORT_SPL
  43
  44 config MACH_SUN5I
  45         bool "sun5i (Allwinner A13)"
  46         select CPU_V7
  47         select SUNXI_GEN_SUN4I
  48         select SUPPORT_SPL
  49
  50 config MACH_SUN6I
  51         bool "sun6i (Allwinner A31)"
  52         select CPU_V7
  53         select CPU_V7_HAS_NONSEC
  54         select CPU_V7_HAS_VIRT
  55         select ARCH_SUPPORT_PSCI
  56         select SUNXI_GEN_SUN6I
  57         select SUPPORT_SPL
  58         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  59
  60 config MACH_SUN7I
  61         bool "sun7i (Allwinner A20)"
  62         select CPU_V7
  63         select CPU_V7_HAS_NONSEC
  64         select CPU_V7_HAS_VIRT
  65         select ARCH_SUPPORT_PSCI
  66         select SUNXI_GEN_SUN4I
  67         select SUPPORT_SPL
  68         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  69
  70 config MACH_SUN8I_A23
  71         bool "sun8i (Allwinner A23)"
  72         select CPU_V7
  73         select CPU_V7_HAS_NONSEC
  74         select CPU_V7_HAS_VIRT
  75         select ARCH_SUPPORT_PSCI
  76         select SUNXI_GEN_SUN6I
  77         select SUPPORT_SPL
  78         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  79
  80 config MACH_SUN8I_A33
  81         bool "sun8i (Allwinner A33)"
  82         select CPU_V7
  83         select CPU_V7_HAS_NONSEC
  84         select CPU_V7_HAS_VIRT
  85         select ARCH_SUPPORT_PSCI
  86         select SUNXI_GEN_SUN6I
  87         select SUPPORT_SPL
  88         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  89
  90 config MACH_SUN8I_A83T
  91         bool "sun8i (Allwinner A83T)"
  92         select CPU_V7
  93         select SUNXI_GEN_SUN6I
  94         select SUPPORT_SPL
  95
  96 config MACH_SUN8I_H3
  97         bool "sun8i (Allwinner H3)"
  98         select CPU_V7
  99         select CPU_V7_HAS_NONSEC
 100         select CPU_V7_HAS_VIRT
 101         select ARCH_SUPPORT_PSCI
 102         select SUNXI_GEN_SUN6I
 103         select SUPPORT_SPL
 104         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 105
 106 config MACH_SUN9I
 107         bool "sun9i (Allwinner A80)"
 108         select CPU_V7
 109         select SUNXI_GEN_SUN6I
 110
 111 config MACH_SUN50I
 112         bool "sun50i (Allwinner A64)"
 113         select ARM64
 114         select SUNXI_GEN_SUN6I
 115
 116 endchoice
 117
 118 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
 119 config MACH_SUN8I
 120         bool
 121         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T
 122
 123 config DRAM_TYPE
 124         int "sunxi dram type"
 125         depends on MACH_SUN8I_A83T
 126         default 3
 127         ---help---
 128         Set the dram type, 3: DDR3, 7: LPDDR3
 129
 130 config DRAM_CLK
 131         int "sunxi dram clock speed"
 132         default 312 if MACH_SUN6I || MACH_SUN8I
 133         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 134         ---help---
 135         Set the dram clock speed, valid range 240 - 480, must be a multiple
 136         of 24.
 137
 138 if MACH_SUN5I || MACH_SUN7I
 139 config DRAM_MBUS_CLK
 140         int "sunxi mbus clock speed"
 141         default 300
 142         ---help---
 143         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
 144
 145 endif
 146
 147 config DRAM_ZQ
 148         int "sunxi dram zq value"
 149         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 150         default 127 if MACH_SUN7I
 151         ---help---
 152         Set the dram zq value.
 153
 154 config DRAM_ODT_EN
 155         bool "sunxi dram odt enable"
 156         default n if !MACH_SUN8I_A23
 157         default y if MACH_SUN8I_A23
 158         ---help---
 159         Select this to enable dram odt (on die termination).
 160
 161 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 162 config DRAM_EMR1
 163         int "sunxi dram emr1 value"
 164         default 0 if MACH_SUN4I
 165         default 4 if MACH_SUN5I || MACH_SUN7I
 166         ---help---
 167         Set the dram controller emr1 value.
 168
 169 config DRAM_TPR3
 170         hex "sunxi dram tpr3 value"
 171         default 0
 172         ---help---
 173         Set the dram controller tpr3 parameter. This parameter configures
 174         the delay on the command lane and also phase shifts, which are
 175         applied for sampling incoming read data. The default value 0
 176         means that no phase/delay adjustments are necessary. Properly
 177         configuring this parameter increases reliability at high DRAM
 178         clock speeds.
 179
 180 config DRAM_DQS_GATING_DELAY
 181         hex "sunxi dram dqs_gating_delay value"
 182         default 0
 183         ---help---
 184         Set the dram controller dqs_gating_delay parmeter. Each byte
 185         encodes the DQS gating delay for each byte lane. The delay
 186         granularity is 1/4 cycle. For example, the value 0x05060606
 187         means that the delay is 5 quarter-cycles for one lane (1.25
 188         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 189         The default value 0 means autodetection. The results of hardware
 190         autodetection are not very reliable and depend on the chip
 191         temperature (sometimes producing different results on cold start
 192         and warm reboot). But the accuracy of hardware autodetection
 193         is usually good enough, unless running at really high DRAM
 194         clocks speeds (up to 600MHz). If unsure, keep as 0.
 195
 196 choice
 197         prompt "sunxi dram timings"
 198         default DRAM_TIMINGS_VENDOR_MAGIC
 199         ---help---
 200         Select the timings of the DDR3 chips.
 201
 202 config DRAM_TIMINGS_VENDOR_MAGIC
 203         bool "Magic vendor timings from Android"
 204         ---help---
 205         The same DRAM timings as in the Allwinner boot0 bootloader.
 206
 207 config DRAM_TIMINGS_DDR3_1066F_1333H
 208         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 209         ---help---
 210         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 211         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 212         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 213         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 214         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 215         that down binning to DDR3-1066F is supported (because DDR3-1066F
 216         uses a bit faster timings than DDR3-1333H).
 217
 218 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 219         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 220         ---help---
 221         Use the timings of the slowest possible JEDEC speed bin for the
 222         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 223         DDR3-800E, DDR3-1066G or DDR3-1333J.
 224
 225 endchoice
 226
 227 endif
 228
 229 if MACH_SUN8I_A23
 230 config DRAM_ODT_CORRECTION
 231         int "sunxi dram odt correction value"
 232         default 0
 233         ---help---
 234         Set the dram odt correction value (range -255 - 255). In allwinner
 235         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 236         in the [dram] section. When bit 31 of the odt_en variable is set
 237         then the correction is negative. Usually the value for this is 0.
 238 endif
 239
 240 config SYS_CLK_FREQ
 241         default 816000000 if MACH_SUN50I
 242         default 912000000 if MACH_SUN7I
 243         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 244
 245 config SYS_CONFIG_NAME
 246         default "sun4i" if MACH_SUN4I
 247         default "sun5i" if MACH_SUN5I
 248         default "sun6i" if MACH_SUN6I
 249         default "sun7i" if MACH_SUN7I
 250         default "sun8i" if MACH_SUN8I
 251         default "sun9i" if MACH_SUN9I
 252         default "sun50i" if MACH_SUN50I
 253
 254 config SYS_BOARD
 255         default "sunxi"
 256
 257 config SYS_SOC
 258         default "sunxi"
 259
 260 config UART0_PORT_F
 261         bool "UART0 on MicroSD breakout board"
 262         default n
 263         ---help---
 264         Repurpose the SD card slot for getting access to the UART0 serial
 265         console. Primarily useful only for low level u-boot debugging on
 266         tablets, where normal UART0 is difficult to access and requires
 267         device disassembly and/or soldering. As the SD card can't be used
 268         at the same time, the system can be only booted in the FEL mode.
 269         Only enable this if you really know what you are doing.
 270
 271 config OLD_SUNXI_KERNEL_COMPAT
 272         bool "Enable workarounds for booting old kernels"
 273         default n
 274         ---help---
 275         Set this to enable various workarounds for old kernels, this results in
 276         sub-optimal settings for newer kernels, only enable if needed.
 277
 278 config MMC
 279         depends on !UART0_PORT_F
 280         default y if ARCH_SUNXI
 281
 282 config MMC0_CD_PIN
 283         string "Card detect pin for mmc0"
 284         default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I
 285         default ""
 286         ---help---
 287         Set the card detect pin for mmc0, leave empty to not use cd. This
 288         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 289         PH1 for pin 1 of port H.
 290
 291 config MMC1_CD_PIN
 292         string "Card detect pin for mmc1"
 293         default ""
 294         ---help---
 295         See MMC0_CD_PIN help text.
 296
 297 config MMC2_CD_PIN
 298         string "Card detect pin for mmc2"
 299         default ""
 300         ---help---
 301         See MMC0_CD_PIN help text.
 302
 303 config MMC3_CD_PIN
 304         string "Card detect pin for mmc3"
 305         default ""
 306         ---help---
 307         See MMC0_CD_PIN help text.
 308
 309 config MMC1_PINS
 310         string "Pins for mmc1"
 311         default ""
 312         ---help---
 313         Set the pins used for mmc1, when applicable. This takes a string in the
 314         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 315
 316 config MMC2_PINS
 317         string "Pins for mmc2"
 318         default ""
 319         ---help---
 320         See MMC1_PINS help text.
 321
 322 config MMC3_PINS
 323         string "Pins for mmc3"
 324         default ""
 325         ---help---
 326         See MMC1_PINS help text.
 327
 328 config MMC_SUNXI_SLOT_EXTRA
 329         int "mmc extra slot number"
 330         default -1
 331         ---help---
 332         sunxi builds always enable mmc0, some boards also have a second sdcard
 333         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 334         support for this.
 335
 336 config INITIAL_USB_SCAN_DELAY
 337         int "delay initial usb scan by x ms to allow builtin devices to init"
 338         default 0
 339         ---help---
 340         Some boards have on board usb devices which need longer than the
 341         USB spec's 1 second to connect from board powerup. Set this config
 342         option to a non 0 value to add an extra delay before the first usb
 343         bus scan.
 344
 345 config USB0_VBUS_PIN
 346         string "Vbus enable pin for usb0 (otg)"
 347         default ""
 348         ---help---
 349         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 350         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 351
 352 config USB0_VBUS_DET
 353         string "Vbus detect pin for usb0 (otg)"
 354         default ""
 355         ---help---
 356         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 357         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 358
 359 config USB0_ID_DET
 360         string "ID detect pin for usb0 (otg)"
 361         default ""
 362         ---help---
 363         Set the ID detect pin for usb0 (otg). This takes a string in the
 364         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 365
 366 config USB1_VBUS_PIN
 367         string "Vbus enable pin for usb1 (ehci0)"
 368         default "PH6" if MACH_SUN4I || MACH_SUN7I
 369         default "PH27" if MACH_SUN6I
 370         ---help---
 371         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 372         a string in the format understood by sunxi_name_to_gpio, e.g.
 373         PH1 for pin 1 of port H.
 374
 375 config USB2_VBUS_PIN
 376         string "Vbus enable pin for usb2 (ehci1)"
 377         default "PH3" if MACH_SUN4I || MACH_SUN7I
 378         default "PH24" if MACH_SUN6I
 379         ---help---
 380         See USB1_VBUS_PIN help text.
 381
 382 config USB3_VBUS_PIN
 383         string "Vbus enable pin for usb3 (ehci2)"
 384         default ""
 385         ---help---
 386         See USB1_VBUS_PIN help text.
 387
 388 config I2C0_ENABLE
 389         bool "Enable I2C/TWI controller 0"
 390         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 391         default n if MACH_SUN6I || MACH_SUN8I
 392         select CMD_I2C
 393         ---help---
 394         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 395         its clock and setting up the bus. This is especially useful on devices
 396         with slaves connected to the bus or with pins exposed through e.g. an
 397         expansion port/header.
 398
 399 config I2C1_ENABLE
 400         bool "Enable I2C/TWI controller 1"
 401         default n
 402         select CMD_I2C
 403         ---help---
 404         See I2C0_ENABLE help text.
 405
 406 config I2C2_ENABLE
 407         bool "Enable I2C/TWI controller 2"
 408         default n
 409         select CMD_I2C
 410         ---help---
 411         See I2C0_ENABLE help text.
 412
 413 if MACH_SUN6I || MACH_SUN7I
 414 config I2C3_ENABLE
 415         bool "Enable I2C/TWI controller 3"
 416         default n
 417         select CMD_I2C
 418         ---help---
 419         See I2C0_ENABLE help text.
 420 endif
 421
 422 if SUNXI_GEN_SUN6I
 423 config R_I2C_ENABLE
 424         bool "Enable the PRCM I2C/TWI controller"
 425         # This is used for the pmic on H3
 426         default y if SY8106A_POWER
 427         select CMD_I2C
 428         ---help---
 429         Set this to y to enable the I2C controller which is part of the PRCM.
 430 endif
 431
 432 if MACH_SUN7I
 433 config I2C4_ENABLE
 434         bool "Enable I2C/TWI controller 4"
 435         default n
 436         select CMD_I2C
 437         ---help---
 438         See I2C0_ENABLE help text.
 439 endif
 440
 441 config AXP_GPIO
 442         bool "Enable support for gpio-s on axp PMICs"
 443         default n
 444         ---help---
 445         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 446
 447 config VIDEO
 448         bool "Enable graphical uboot console on HDMI, LCD or VGA"
 449         depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I
 450         default y
 451         ---help---
 452         Say Y here to add support for using a cfb console on the HDMI, LCD
 453         or VGA output found on most sunxi devices. See doc/README.video for
 454         info on how to select the video output and mode.
 455
 456 config VIDEO_HDMI
 457         bool "HDMI output support"
 458         depends on VIDEO && !MACH_SUN8I
 459         default y
 460         ---help---
 461         Say Y here to add support for outputting video over HDMI.
 462
 463 config VIDEO_VGA
 464         bool "VGA output support"
 465         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 466         default n
 467         ---help---
 468         Say Y here to add support for outputting video over VGA.
 469
 470 config VIDEO_VGA_VIA_LCD
 471         bool "VGA via LCD controller support"
 472         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 473         default n
 474         ---help---
 475         Say Y here to add support for external DACs connected to the parallel
 476         LCD interface driving a VGA connector, such as found on the
 477         Olimex A13 boards.
 478
 479 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 480         bool "Force sync active high for VGA via LCD controller support"
 481         depends on VIDEO_VGA_VIA_LCD
 482         default n
 483         ---help---
 484         Say Y here if you've a board which uses opendrain drivers for the vga
 485         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 486         positive edges for a stable video output, so on boards with opendrain
 487         drivers the sync signals must always be active high.
 488
 489 config VIDEO_VGA_EXTERNAL_DAC_EN
 490         string "LCD panel power enable pin"
 491         depends on VIDEO_VGA_VIA_LCD
 492         default ""
 493         ---help---
 494         Set the enable pin for the external VGA DAC. This takes a string in the
 495         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 496
 497 config VIDEO_COMPOSITE
 498         bool "Composite video output support"
 499         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 500         default n
 501         ---help---
 502         Say Y here to add support for outputting composite video.
 503
 504 config VIDEO_LCD_MODE
 505         string "LCD panel timing details"
 506         depends on VIDEO
 507         default ""
 508         ---help---
 509         LCD panel timing details string, leave empty if there is no LCD panel.
 510         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 511         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 512         Also see: http://linux-sunxi.org/LCD
 513
 514 config VIDEO_LCD_DCLK_PHASE
 515         int "LCD panel display clock phase"
 516         depends on VIDEO
 517         default 1
 518         ---help---
 519         Select LCD panel display clock phase shift, range 0-3.
 520
 521 config VIDEO_LCD_POWER
 522         string "LCD panel power enable pin"
 523         depends on VIDEO
 524         default ""
 525         ---help---
 526         Set the power enable pin for the LCD panel. This takes a string in the
 527         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 528
 529 config VIDEO_LCD_RESET
 530         string "LCD panel reset pin"
 531         depends on VIDEO
 532         default ""
 533         ---help---
 534         Set the reset pin for the LCD panel. This takes a string in the format
 535         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 536
 537 config VIDEO_LCD_BL_EN
 538         string "LCD panel backlight enable pin"
 539         depends on VIDEO
 540         default ""
 541         ---help---
 542         Set the backlight enable pin for the LCD panel. This takes a string in the
 543         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 544         port H.
 545
 546 config VIDEO_LCD_BL_PWM
 547         string "LCD panel backlight pwm pin"
 548         depends on VIDEO
 549         default ""
 550         ---help---
 551         Set the backlight pwm pin for the LCD panel. This takes a string in the
 552         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 553
 554 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 555         bool "LCD panel backlight pwm is inverted"
 556         depends on VIDEO
 557         default y
 558         ---help---
 559         Set this if the backlight pwm output is active low.
 560
 561 config VIDEO_LCD_PANEL_I2C
 562         bool "LCD panel needs to be configured via i2c"
 563         depends on VIDEO
 564         default n
 565         select CMD_I2C
 566         ---help---
 567         Say y here if the LCD panel needs to be configured via i2c. This
 568         will add a bitbang i2c controller using gpios to talk to the LCD.
 569
 570 config VIDEO_LCD_PANEL_I2C_SDA
 571         string "LCD panel i2c interface SDA pin"
 572         depends on VIDEO_LCD_PANEL_I2C
 573         default "PG12"
 574         ---help---
 575         Set the SDA pin for the LCD i2c interface. This takes a string in the
 576         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 577
 578 config VIDEO_LCD_PANEL_I2C_SCL
 579         string "LCD panel i2c interface SCL pin"
 580         depends on VIDEO_LCD_PANEL_I2C
 581         default "PG10"
 582         ---help---
 583         Set the SCL pin for the LCD i2c interface. This takes a string in the
 584         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 585
 586
 587 # Note only one of these may be selected at a time! But hidden choices are
 588 # not supported by Kconfig
 589 config VIDEO_LCD_IF_PARALLEL
 590         bool
 591
 592 config VIDEO_LCD_IF_LVDS
 593         bool
 594
 595
 596 choice
 597         prompt "LCD panel support"
 598         depends on VIDEO
 599         ---help---
 600         Select which type of LCD panel to support.
 601
 602 config VIDEO_LCD_PANEL_PARALLEL
 603         bool "Generic parallel interface LCD panel"
 604         select VIDEO_LCD_IF_PARALLEL
 605
 606 config VIDEO_LCD_PANEL_LVDS
 607         bool "Generic lvds interface LCD panel"
 608         select VIDEO_LCD_IF_LVDS
 609
 610 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 611         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 612         select VIDEO_LCD_SSD2828
 613         select VIDEO_LCD_IF_PARALLEL
 614         ---help---
 615         7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 616
 617 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
 618         bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
 619         select VIDEO_LCD_ANX9804
 620         select VIDEO_LCD_IF_PARALLEL
 621         select VIDEO_LCD_PANEL_I2C
 622         ---help---
 623         Select this for eDP LCD panels with 4 lanes running at 1.62G,
 624         connected via an ANX9804 bridge chip.
 625
 626 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 627         bool "Hitachi tx18d42vm LCD panel"
 628         select VIDEO_LCD_HITACHI_TX18D42VM
 629         select VIDEO_LCD_IF_LVDS
 630         ---help---
 631         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 632
 633 config VIDEO_LCD_TL059WV5C0
 634         bool "tl059wv5c0 LCD panel"
 635         select VIDEO_LCD_PANEL_I2C
 636         select VIDEO_LCD_IF_PARALLEL
 637         ---help---
 638         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 639         Aigo M60/M608/M606 tablets.
 640
 641 endchoice
 642
 643
 644 config GMAC_TX_DELAY
 645         int "GMAC Transmit Clock Delay Chain"
 646         default 0
 647         ---help---
 648         Set the GMAC Transmit Clock Delay Chain value.
 649
 650 config SPL_STACK_R_ADDR
 651         default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
 652         default 0x2fe00000 if MACH_SUN9I
 653
 654 endif