board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 config IDENT_STRING
   4         default " Allwinner Technology"
   5
   6 config PRE_CONSOLE_BUFFER
   7         default y
   8
   9 config SPL_GPIO_SUPPORT
  10         default y
  11
  12 config SPL_LIBCOMMON_SUPPORT
  13         default y
  14
  15 config SPL_LIBDISK_SUPPORT
  16         default y
  17
  18 config SPL_LIBGENERIC_SUPPORT
  19         default y
  20
  21 config SPL_MMC_SUPPORT
  22         default y
  23
  24 config SPL_POWER_SUPPORT
  25         default y
  26
  27 config SPL_SERIAL_SUPPORT
  28         default y
  29
  30 # Note only one of these may be selected at a time! But hidden choices are
  31 # not supported by Kconfig
  32 config SUNXI_GEN_SUN4I
  33         bool
  34         ---help---
  35         Select this for sunxi SoCs which have resets and clocks set up
  36         as the original A10 (mach-sun4i).
  37
  38 config SUNXI_GEN_SUN6I
  39         bool
  40         ---help---
  41         Select this for sunxi SoCs which have sun6i like periphery, like
  42         separate ahb reset control registers, custom pmic bus, new style
  43         watchdog, etc.
  44
  45
  46 choice
  47         prompt "Sunxi SoC Variant"
  48         optional
  49
  50 config MACH_SUN4I
  51         bool "sun4i (Allwinner A10)"
  52         select CPU_V7
  53         select SUNXI_GEN_SUN4I
  54         select SUPPORT_SPL
  55
  56 config MACH_SUN5I
  57         bool "sun5i (Allwinner A13)"
  58         select CPU_V7
  59         select SUNXI_GEN_SUN4I
  60         select SUPPORT_SPL
  61
  62 config MACH_SUN6I
  63         bool "sun6i (Allwinner A31)"
  64         select CPU_V7
  65         select CPU_V7_HAS_NONSEC
  66         select CPU_V7_HAS_VIRT
  67         select ARCH_SUPPORT_PSCI
  68         select SUNXI_GEN_SUN6I
  69         select SUPPORT_SPL
  70         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  71
  72 config MACH_SUN7I
  73         bool "sun7i (Allwinner A20)"
  74         select CPU_V7
  75         select CPU_V7_HAS_NONSEC
  76         select CPU_V7_HAS_VIRT
  77         select ARCH_SUPPORT_PSCI
  78         select SUNXI_GEN_SUN4I
  79         select SUPPORT_SPL
  80         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  81
  82 config MACH_SUN8I_A23
  83         bool "sun8i (Allwinner A23)"
  84         select CPU_V7
  85         select CPU_V7_HAS_NONSEC
  86         select CPU_V7_HAS_VIRT
  87         select ARCH_SUPPORT_PSCI
  88         select SUNXI_GEN_SUN6I
  89         select SUPPORT_SPL
  90         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  91
  92 config MACH_SUN8I_A33
  93         bool "sun8i (Allwinner A33)"
  94         select CPU_V7
  95         select CPU_V7_HAS_NONSEC
  96         select CPU_V7_HAS_VIRT
  97         select ARCH_SUPPORT_PSCI
  98         select SUNXI_GEN_SUN6I
  99         select SUPPORT_SPL
 100         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 101
 102 config MACH_SUN8I_A83T
 103         bool "sun8i (Allwinner A83T)"
 104         select CPU_V7
 105         select SUNXI_GEN_SUN6I
 106         select SUPPORT_SPL
 107
 108 config MACH_SUN8I_H3
 109         bool "sun8i (Allwinner H3)"
 110         select CPU_V7
 111         select CPU_V7_HAS_NONSEC
 112         select CPU_V7_HAS_VIRT
 113         select ARCH_SUPPORT_PSCI
 114         select SUNXI_GEN_SUN6I
 115         select SUPPORT_SPL
 116         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 117
 118 config MACH_SUN9I
 119         bool "sun9i (Allwinner A80)"
 120         select CPU_V7
 121         select SUNXI_GEN_SUN6I
 122
 123 config MACH_SUN50I
 124         bool "sun50i (Allwinner A64)"
 125         select ARM64
 126         select SUNXI_GEN_SUN6I
 127
 128 endchoice
 129
 130 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
 131 config MACH_SUN8I
 132         bool
 133         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T
 134
 135 config DRAM_TYPE
 136         int "sunxi dram type"
 137         depends on MACH_SUN8I_A83T
 138         default 3
 139         ---help---
 140         Set the dram type, 3: DDR3, 7: LPDDR3
 141
 142 config DRAM_CLK
 143         int "sunxi dram clock speed"
 144         default 312 if MACH_SUN6I || MACH_SUN8I
 145         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 146         ---help---
 147         Set the dram clock speed, valid range 240 - 480, must be a multiple
 148         of 24.
 149
 150 if MACH_SUN5I || MACH_SUN7I
 151 config DRAM_MBUS_CLK
 152         int "sunxi mbus clock speed"
 153         default 300
 154         ---help---
 155         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
 156
 157 endif
 158
 159 config DRAM_ZQ
 160         int "sunxi dram zq value"
 161         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 162         default 127 if MACH_SUN7I
 163         ---help---
 164         Set the dram zq value.
 165
 166 config DRAM_ODT_EN
 167         bool "sunxi dram odt enable"
 168         default n if !MACH_SUN8I_A23
 169         default y if MACH_SUN8I_A23
 170         ---help---
 171         Select this to enable dram odt (on die termination).
 172
 173 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 174 config DRAM_EMR1
 175         int "sunxi dram emr1 value"
 176         default 0 if MACH_SUN4I
 177         default 4 if MACH_SUN5I || MACH_SUN7I
 178         ---help---
 179         Set the dram controller emr1 value.
 180
 181 config DRAM_TPR3
 182         hex "sunxi dram tpr3 value"
 183         default 0
 184         ---help---
 185         Set the dram controller tpr3 parameter. This parameter configures
 186         the delay on the command lane and also phase shifts, which are
 187         applied for sampling incoming read data. The default value 0
 188         means that no phase/delay adjustments are necessary. Properly
 189         configuring this parameter increases reliability at high DRAM
 190         clock speeds.
 191
 192 config DRAM_DQS_GATING_DELAY
 193         hex "sunxi dram dqs_gating_delay value"
 194         default 0
 195         ---help---
 196         Set the dram controller dqs_gating_delay parmeter. Each byte
 197         encodes the DQS gating delay for each byte lane. The delay
 198         granularity is 1/4 cycle. For example, the value 0x05060606
 199         means that the delay is 5 quarter-cycles for one lane (1.25
 200         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 201         The default value 0 means autodetection. The results of hardware
 202         autodetection are not very reliable and depend on the chip
 203         temperature (sometimes producing different results on cold start
 204         and warm reboot). But the accuracy of hardware autodetection
 205         is usually good enough, unless running at really high DRAM
 206         clocks speeds (up to 600MHz). If unsure, keep as 0.
 207
 208 choice
 209         prompt "sunxi dram timings"
 210         default DRAM_TIMINGS_VENDOR_MAGIC
 211         ---help---
 212         Select the timings of the DDR3 chips.
 213
 214 config DRAM_TIMINGS_VENDOR_MAGIC
 215         bool "Magic vendor timings from Android"
 216         ---help---
 217         The same DRAM timings as in the Allwinner boot0 bootloader.
 218
 219 config DRAM_TIMINGS_DDR3_1066F_1333H
 220         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 221         ---help---
 222         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 223         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 224         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 225         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 226         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 227         that down binning to DDR3-1066F is supported (because DDR3-1066F
 228         uses a bit faster timings than DDR3-1333H).
 229
 230 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 231         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 232         ---help---
 233         Use the timings of the slowest possible JEDEC speed bin for the
 234         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 235         DDR3-800E, DDR3-1066G or DDR3-1333J.
 236
 237 endchoice
 238
 239 endif
 240
 241 if MACH_SUN8I_A23
 242 config DRAM_ODT_CORRECTION
 243         int "sunxi dram odt correction value"
 244         default 0
 245         ---help---
 246         Set the dram odt correction value (range -255 - 255). In allwinner
 247         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 248         in the [dram] section. When bit 31 of the odt_en variable is set
 249         then the correction is negative. Usually the value for this is 0.
 250 endif
 251
 252 config SYS_CLK_FREQ
 253         default 816000000 if MACH_SUN50I
 254         default 912000000 if MACH_SUN7I
 255         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 256
 257 config SYS_CONFIG_NAME
 258         default "sun4i" if MACH_SUN4I
 259         default "sun5i" if MACH_SUN5I
 260         default "sun6i" if MACH_SUN6I
 261         default "sun7i" if MACH_SUN7I
 262         default "sun8i" if MACH_SUN8I
 263         default "sun9i" if MACH_SUN9I
 264         default "sun50i" if MACH_SUN50I
 265
 266 config SYS_BOARD
 267         default "sunxi"
 268
 269 config SYS_SOC
 270         default "sunxi"
 271
 272 config UART0_PORT_F
 273         bool "UART0 on MicroSD breakout board"
 274         default n
 275         ---help---
 276         Repurpose the SD card slot for getting access to the UART0 serial
 277         console. Primarily useful only for low level u-boot debugging on
 278         tablets, where normal UART0 is difficult to access and requires
 279         device disassembly and/or soldering. As the SD card can't be used
 280         at the same time, the system can be only booted in the FEL mode.
 281         Only enable this if you really know what you are doing.
 282
 283 config OLD_SUNXI_KERNEL_COMPAT
 284         bool "Enable workarounds for booting old kernels"
 285         default n
 286         ---help---
 287         Set this to enable various workarounds for old kernels, this results in
 288         sub-optimal settings for newer kernels, only enable if needed.
 289
 290 config MMC
 291         depends on !UART0_PORT_F
 292         default y if ARCH_SUNXI
 293
 294 config MMC0_CD_PIN
 295         string "Card detect pin for mmc0"
 296         default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I
 297         default ""
 298         ---help---
 299         Set the card detect pin for mmc0, leave empty to not use cd. This
 300         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 301         PH1 for pin 1 of port H.
 302
 303 config MMC1_CD_PIN
 304         string "Card detect pin for mmc1"
 305         default ""
 306         ---help---
 307         See MMC0_CD_PIN help text.
 308
 309 config MMC2_CD_PIN
 310         string "Card detect pin for mmc2"
 311         default ""
 312         ---help---
 313         See MMC0_CD_PIN help text.
 314
 315 config MMC3_CD_PIN
 316         string "Card detect pin for mmc3"
 317         default ""
 318         ---help---
 319         See MMC0_CD_PIN help text.
 320
 321 config MMC1_PINS
 322         string "Pins for mmc1"
 323         default ""
 324         ---help---
 325         Set the pins used for mmc1, when applicable. This takes a string in the
 326         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 327
 328 config MMC2_PINS
 329         string "Pins for mmc2"
 330         default ""
 331         ---help---
 332         See MMC1_PINS help text.
 333
 334 config MMC3_PINS
 335         string "Pins for mmc3"
 336         default ""
 337         ---help---
 338         See MMC1_PINS help text.
 339
 340 config MMC_SUNXI_SLOT_EXTRA
 341         int "mmc extra slot number"
 342         default -1
 343         ---help---
 344         sunxi builds always enable mmc0, some boards also have a second sdcard
 345         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 346         support for this.
 347
 348 config INITIAL_USB_SCAN_DELAY
 349         int "delay initial usb scan by x ms to allow builtin devices to init"
 350         default 0
 351         ---help---
 352         Some boards have on board usb devices which need longer than the
 353         USB spec's 1 second to connect from board powerup. Set this config
 354         option to a non 0 value to add an extra delay before the first usb
 355         bus scan.
 356
 357 config USB0_VBUS_PIN
 358         string "Vbus enable pin for usb0 (otg)"
 359         default ""
 360         ---help---
 361         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 362         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 363
 364 config USB0_VBUS_DET
 365         string "Vbus detect pin for usb0 (otg)"
 366         default ""
 367         ---help---
 368         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 369         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 370
 371 config USB0_ID_DET
 372         string "ID detect pin for usb0 (otg)"
 373         default ""
 374         ---help---
 375         Set the ID detect pin for usb0 (otg). This takes a string in the
 376         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 377
 378 config USB1_VBUS_PIN
 379         string "Vbus enable pin for usb1 (ehci0)"
 380         default "PH6" if MACH_SUN4I || MACH_SUN7I
 381         default "PH27" if MACH_SUN6I
 382         ---help---
 383         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 384         a string in the format understood by sunxi_name_to_gpio, e.g.
 385         PH1 for pin 1 of port H.
 386
 387 config USB2_VBUS_PIN
 388         string "Vbus enable pin for usb2 (ehci1)"
 389         default "PH3" if MACH_SUN4I || MACH_SUN7I
 390         default "PH24" if MACH_SUN6I
 391         ---help---
 392         See USB1_VBUS_PIN help text.
 393
 394 config USB3_VBUS_PIN
 395         string "Vbus enable pin for usb3 (ehci2)"
 396         default ""
 397         ---help---
 398         See USB1_VBUS_PIN help text.
 399
 400 config I2C0_ENABLE
 401         bool "Enable I2C/TWI controller 0"
 402         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 403         default n if MACH_SUN6I || MACH_SUN8I
 404         select CMD_I2C
 405         ---help---
 406         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 407         its clock and setting up the bus. This is especially useful on devices
 408         with slaves connected to the bus or with pins exposed through e.g. an
 409         expansion port/header.
 410
 411 config I2C1_ENABLE
 412         bool "Enable I2C/TWI controller 1"
 413         default n
 414         select CMD_I2C
 415         ---help---
 416         See I2C0_ENABLE help text.
 417
 418 config I2C2_ENABLE
 419         bool "Enable I2C/TWI controller 2"
 420         default n
 421         select CMD_I2C
 422         ---help---
 423         See I2C0_ENABLE help text.
 424
 425 if MACH_SUN6I || MACH_SUN7I
 426 config I2C3_ENABLE
 427         bool "Enable I2C/TWI controller 3"
 428         default n
 429         select CMD_I2C
 430         ---help---
 431         See I2C0_ENABLE help text.
 432 endif
 433
 434 if SUNXI_GEN_SUN6I
 435 config R_I2C_ENABLE
 436         bool "Enable the PRCM I2C/TWI controller"
 437         # This is used for the pmic on H3
 438         default y if SY8106A_POWER
 439         select CMD_I2C
 440         ---help---
 441         Set this to y to enable the I2C controller which is part of the PRCM.
 442 endif
 443
 444 if MACH_SUN7I
 445 config I2C4_ENABLE
 446         bool "Enable I2C/TWI controller 4"
 447         default n
 448         select CMD_I2C
 449         ---help---
 450         See I2C0_ENABLE help text.
 451 endif
 452
 453 config AXP_GPIO
 454         bool "Enable support for gpio-s on axp PMICs"
 455         default n
 456         ---help---
 457         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 458
 459 config VIDEO
 460         bool "Enable graphical uboot console on HDMI, LCD or VGA"
 461         depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I
 462         default y
 463         ---help---
 464         Say Y here to add support for using a cfb console on the HDMI, LCD
 465         or VGA output found on most sunxi devices. See doc/README.video for
 466         info on how to select the video output and mode.
 467
 468 config VIDEO_HDMI
 469         bool "HDMI output support"
 470         depends on VIDEO && !MACH_SUN8I
 471         default y
 472         ---help---
 473         Say Y here to add support for outputting video over HDMI.
 474
 475 config VIDEO_VGA
 476         bool "VGA output support"
 477         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 478         default n
 479         ---help---
 480         Say Y here to add support for outputting video over VGA.
 481
 482 config VIDEO_VGA_VIA_LCD
 483         bool "VGA via LCD controller support"
 484         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 485         default n
 486         ---help---
 487         Say Y here to add support for external DACs connected to the parallel
 488         LCD interface driving a VGA connector, such as found on the
 489         Olimex A13 boards.
 490
 491 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 492         bool "Force sync active high for VGA via LCD controller support"
 493         depends on VIDEO_VGA_VIA_LCD
 494         default n
 495         ---help---
 496         Say Y here if you've a board which uses opendrain drivers for the vga
 497         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 498         positive edges for a stable video output, so on boards with opendrain
 499         drivers the sync signals must always be active high.
 500
 501 config VIDEO_VGA_EXTERNAL_DAC_EN
 502         string "LCD panel power enable pin"
 503         depends on VIDEO_VGA_VIA_LCD
 504         default ""
 505         ---help---
 506         Set the enable pin for the external VGA DAC. This takes a string in the
 507         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 508
 509 config VIDEO_COMPOSITE
 510         bool "Composite video output support"
 511         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 512         default n
 513         ---help---
 514         Say Y here to add support for outputting composite video.
 515
 516 config VIDEO_LCD_MODE
 517         string "LCD panel timing details"
 518         depends on VIDEO
 519         default ""
 520         ---help---
 521         LCD panel timing details string, leave empty if there is no LCD panel.
 522         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 523         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 524         Also see: http://linux-sunxi.org/LCD
 525
 526 config VIDEO_LCD_DCLK_PHASE
 527         int "LCD panel display clock phase"
 528         depends on VIDEO
 529         default 1
 530         ---help---
 531         Select LCD panel display clock phase shift, range 0-3.
 532
 533 config VIDEO_LCD_POWER
 534         string "LCD panel power enable pin"
 535         depends on VIDEO
 536         default ""
 537         ---help---
 538         Set the power enable pin for the LCD panel. This takes a string in the
 539         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 540
 541 config VIDEO_LCD_RESET
 542         string "LCD panel reset pin"
 543         depends on VIDEO
 544         default ""
 545         ---help---
 546         Set the reset pin for the LCD panel. This takes a string in the format
 547         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 548
 549 config VIDEO_LCD_BL_EN
 550         string "LCD panel backlight enable pin"
 551         depends on VIDEO
 552         default ""
 553         ---help---
 554         Set the backlight enable pin for the LCD panel. This takes a string in the
 555         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 556         port H.
 557
 558 config VIDEO_LCD_BL_PWM
 559         string "LCD panel backlight pwm pin"
 560         depends on VIDEO
 561         default ""
 562         ---help---
 563         Set the backlight pwm pin for the LCD panel. This takes a string in the
 564         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 565
 566 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 567         bool "LCD panel backlight pwm is inverted"
 568         depends on VIDEO
 569         default y
 570         ---help---
 571         Set this if the backlight pwm output is active low.
 572
 573 config VIDEO_LCD_PANEL_I2C
 574         bool "LCD panel needs to be configured via i2c"
 575         depends on VIDEO
 576         default n
 577         select CMD_I2C
 578         ---help---
 579         Say y here if the LCD panel needs to be configured via i2c. This
 580         will add a bitbang i2c controller using gpios to talk to the LCD.
 581
 582 config VIDEO_LCD_PANEL_I2C_SDA
 583         string "LCD panel i2c interface SDA pin"
 584         depends on VIDEO_LCD_PANEL_I2C
 585         default "PG12"
 586         ---help---
 587         Set the SDA pin for the LCD i2c interface. This takes a string in the
 588         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 589
 590 config VIDEO_LCD_PANEL_I2C_SCL
 591         string "LCD panel i2c interface SCL pin"
 592         depends on VIDEO_LCD_PANEL_I2C
 593         default "PG10"
 594         ---help---
 595         Set the SCL pin for the LCD i2c interface. This takes a string in the
 596         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 597
 598
 599 # Note only one of these may be selected at a time! But hidden choices are
 600 # not supported by Kconfig
 601 config VIDEO_LCD_IF_PARALLEL
 602         bool
 603
 604 config VIDEO_LCD_IF_LVDS
 605         bool
 606
 607
 608 choice
 609         prompt "LCD panel support"
 610         depends on VIDEO
 611         ---help---
 612         Select which type of LCD panel to support.
 613
 614 config VIDEO_LCD_PANEL_PARALLEL
 615         bool "Generic parallel interface LCD panel"
 616         select VIDEO_LCD_IF_PARALLEL
 617
 618 config VIDEO_LCD_PANEL_LVDS
 619         bool "Generic lvds interface LCD panel"
 620         select VIDEO_LCD_IF_LVDS
 621
 622 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 623         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 624         select VIDEO_LCD_SSD2828
 625         select VIDEO_LCD_IF_PARALLEL
 626         ---help---
 627         7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 628
 629 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
 630         bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
 631         select VIDEO_LCD_ANX9804
 632         select VIDEO_LCD_IF_PARALLEL
 633         select VIDEO_LCD_PANEL_I2C
 634         ---help---
 635         Select this for eDP LCD panels with 4 lanes running at 1.62G,
 636         connected via an ANX9804 bridge chip.
 637
 638 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 639         bool "Hitachi tx18d42vm LCD panel"
 640         select VIDEO_LCD_HITACHI_TX18D42VM
 641         select VIDEO_LCD_IF_LVDS
 642         ---help---
 643         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 644
 645 config VIDEO_LCD_TL059WV5C0
 646         bool "tl059wv5c0 LCD panel"
 647         select VIDEO_LCD_PANEL_I2C
 648         select VIDEO_LCD_IF_PARALLEL
 649         ---help---
 650         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 651         Aigo M60/M608/M606 tablets.
 652
 653 endchoice
 654
 655
 656 config GMAC_TX_DELAY
 657         int "GMAC Transmit Clock Delay Chain"
 658         default 0
 659         ---help---
 660         Set the GMAC Transmit Clock Delay Chain value.
 661
 662 config SPL_STACK_R_ADDR
 663         default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
 664         default 0x2fe00000 if MACH_SUN9I
 665
 666 endif