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1 if ARCH_SUNXI
2
3 # Note only one of these may be selected at a time! But hidden choices are
4 # not supported by Kconfig
5 config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11 config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
19 choice
20 prompt "Sunxi SoC Variant"
21 optional
22
23 config MACH_SUN4I
24 bool "sun4i (Allwinner A10)"
25 select CPU_V7
26 select SUNXI_GEN_SUN4I
27 select SUPPORT_SPL
28
29 config MACH_SUN5I
30 bool "sun5i (Allwinner A13)"
31 select CPU_V7
32 select SUNXI_GEN_SUN4I
33 select SUPPORT_SPL
34
35 config MACH_SUN6I
36 bool "sun6i (Allwinner A31)"
37 select CPU_V7
38 select CPU_V7_HAS_NONSEC
39 select CPU_V7_HAS_VIRT
40 select SUNXI_GEN_SUN6I
41 select SUPPORT_SPL
42 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
43
44 config MACH_SUN7I
45 bool "sun7i (Allwinner A20)"
46 select CPU_V7
47 select CPU_V7_HAS_NONSEC
48 select CPU_V7_HAS_VIRT
49 select SUNXI_GEN_SUN4I
50 select SUPPORT_SPL
51 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
52
53 config MACH_SUN8I_A23
54 bool "sun8i (Allwinner A23)"
55 select CPU_V7
56 select CPU_V7_HAS_NONSEC
57 select CPU_V7_HAS_VIRT
58 select SUNXI_GEN_SUN6I
59 select SUPPORT_SPL
60 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
61
62 config MACH_SUN8I_A33
63 bool "sun8i (Allwinner A33)"
64 select CPU_V7
65 select CPU_V7_HAS_NONSEC
66 select CPU_V7_HAS_VIRT
67 select SUNXI_GEN_SUN6I
68 select SUPPORT_SPL
69 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
70
71 config MACH_SUN9I
72 bool "sun9i (Allwinner A80)"
73 select CPU_V7
74 select SUNXI_GEN_SUN6I
75
76 endchoice
77
78 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
79 config MACH_SUN8I
80 bool
81 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
82
83
84 config DRAM_CLK
85 int "sunxi dram clock speed"
86 default 312 if MACH_SUN6I || MACH_SUN8I
87 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
88 ---help---
89 Set the dram clock speed, valid range 240 - 480, must be a multiple
90 of 24.
91
92 if MACH_SUN5I || MACH_SUN7I
93 config DRAM_MBUS_CLK
94 int "sunxi mbus clock speed"
95 default 300
96 ---help---
97 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
98
99 endif
100
101 config DRAM_ZQ
102 int "sunxi dram zq value"
103 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
104 default 127 if MACH_SUN7I
105 ---help---
106 Set the dram zq value.
107
108 config DRAM_ODT_EN
109 bool "sunxi dram odt enable"
110 default n if !MACH_SUN8I_A23
111 default y if MACH_SUN8I_A23
112 ---help---
113 Select this to enable dram odt (on die termination).
114
115 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
116 config DRAM_EMR1
117 int "sunxi dram emr1 value"
118 default 0 if MACH_SUN4I
119 default 4 if MACH_SUN5I || MACH_SUN7I
120 ---help---
121 Set the dram controller emr1 value.
122
123 config DRAM_TPR3
124 hex "sunxi dram tpr3 value"
125 default 0
126 ---help---
127 Set the dram controller tpr3 parameter. This parameter configures
128 the delay on the command lane and also phase shifts, which are
129 applied for sampling incoming read data. The default value 0
130 means that no phase/delay adjustments are necessary. Properly
131 configuring this parameter increases reliability at high DRAM
132 clock speeds.
133
134 config DRAM_DQS_GATING_DELAY
135 hex "sunxi dram dqs_gating_delay value"
136 default 0
137 ---help---
138 Set the dram controller dqs_gating_delay parmeter. Each byte
139 encodes the DQS gating delay for each byte lane. The delay
140 granularity is 1/4 cycle. For example, the value 0x05060606
141 means that the delay is 5 quarter-cycles for one lane (1.25
142 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
143 The default value 0 means autodetection. The results of hardware
144 autodetection are not very reliable and depend on the chip
145 temperature (sometimes producing different results on cold start
146 and warm reboot). But the accuracy of hardware autodetection
147 is usually good enough, unless running at really high DRAM
148 clocks speeds (up to 600MHz). If unsure, keep as 0.
149
150 choice
151 prompt "sunxi dram timings"
152 default DRAM_TIMINGS_VENDOR_MAGIC
153 ---help---
154 Select the timings of the DDR3 chips.
155
156 config DRAM_TIMINGS_VENDOR_MAGIC
157 bool "Magic vendor timings from Android"
158 ---help---
159 The same DRAM timings as in the Allwinner boot0 bootloader.
160
161 config DRAM_TIMINGS_DDR3_1066F_1333H
162 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
163 ---help---
164 Use the timings of the standard JEDEC DDR3-1066F speed bin for
165 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
166 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
167 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
168 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
169 that down binning to DDR3-1066F is supported (because DDR3-1066F
170 uses a bit faster timings than DDR3-1333H).
171
172 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
173 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
174 ---help---
175 Use the timings of the slowest possible JEDEC speed bin for the
176 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
177 DDR3-800E, DDR3-1066G or DDR3-1333J.
178
179 endchoice
180
181 endif
182
183 if MACH_SUN8I_A23
184 config DRAM_ODT_CORRECTION
185 int "sunxi dram odt correction value"
186 default 0
187 ---help---
188 Set the dram odt correction value (range -255 - 255). In allwinner
189 fex files, this option is found in bits 8-15 of the u32 odt_en variable
190 in the [dram] section. When bit 31 of the odt_en variable is set
191 then the correction is negative. Usually the value for this is 0.
192 endif
193
194 config SYS_CLK_FREQ
195 default 912000000 if MACH_SUN7I
196 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
197
198 config SYS_CONFIG_NAME
199 default "sun4i" if MACH_SUN4I
200 default "sun5i" if MACH_SUN5I
201 default "sun6i" if MACH_SUN6I
202 default "sun7i" if MACH_SUN7I
203 default "sun8i" if MACH_SUN8I
204 default "sun9i" if MACH_SUN9I
205
206 config SYS_BOARD
207 default "sunxi"
208
209 config SYS_SOC
210 default "sunxi"
211
212 config UART0_PORT_F
213 bool "UART0 on MicroSD breakout board"
214 default n
215 ---help---
216 Repurpose the SD card slot for getting access to the UART0 serial
217 console. Primarily useful only for low level u-boot debugging on
218 tablets, where normal UART0 is difficult to access and requires
219 device disassembly and/or soldering. As the SD card can't be used
220 at the same time, the system can be only booted in the FEL mode.
221 Only enable this if you really know what you are doing.
222
223 config OLD_SUNXI_KERNEL_COMPAT
224 boolean "Enable workarounds for booting old kernels"
225 default n
226 ---help---
227 Set this to enable various workarounds for old kernels, this results in
228 sub-optimal settings for newer kernels, only enable if needed.
229
230 config MMC
231 depends on !UART0_PORT_F
232 default y if ARCH_SUNXI
233
234 config MMC0_CD_PIN
235 string "Card detect pin for mmc0"
236 default ""
237 ---help---
238 Set the card detect pin for mmc0, leave empty to not use cd. This
239 takes a string in the format understood by sunxi_name_to_gpio, e.g.
240 PH1 for pin 1 of port H.
241
242 config MMC1_CD_PIN
243 string "Card detect pin for mmc1"
244 default ""
245 ---help---
246 See MMC0_CD_PIN help text.
247
248 config MMC2_CD_PIN
249 string "Card detect pin for mmc2"
250 default ""
251 ---help---
252 See MMC0_CD_PIN help text.
253
254 config MMC3_CD_PIN
255 string "Card detect pin for mmc3"
256 default ""
257 ---help---
258 See MMC0_CD_PIN help text.
259
260 config MMC1_PINS
261 string "Pins for mmc1"
262 default ""
263 ---help---
264 Set the pins used for mmc1, when applicable. This takes a string in the
265 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
266
267 config MMC2_PINS
268 string "Pins for mmc2"
269 default ""
270 ---help---
271 See MMC1_PINS help text.
272
273 config MMC3_PINS
274 string "Pins for mmc3"
275 default ""
276 ---help---
277 See MMC1_PINS help text.
278
279 config MMC_SUNXI_SLOT_EXTRA
280 int "mmc extra slot number"
281 default -1
282 ---help---
283 sunxi builds always enable mmc0, some boards also have a second sdcard
284 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
285 support for this.
286
287 config USB0_VBUS_PIN
288 string "Vbus enable pin for usb0 (otg)"
289 default ""
290 ---help---
291 Set the Vbus enable pin for usb0 (otg). This takes a string in the
292 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
293
294 config USB0_VBUS_DET
295 string "Vbus detect pin for usb0 (otg)"
296 default ""
297 ---help---
298 Set the Vbus detect pin for usb0 (otg). This takes a string in the
299 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
300
301 config USB0_ID_DET
302 string "ID detect pin for usb0 (otg)"
303 default ""
304 ---help---
305 Set the ID detect pin for usb0 (otg). This takes a string in the
306 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
307
308 config USB1_VBUS_PIN
309 string "Vbus enable pin for usb1 (ehci0)"
310 default "PH6" if MACH_SUN4I || MACH_SUN7I
311 default "PH27" if MACH_SUN6I
312 ---help---
313 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
314 a string in the format understood by sunxi_name_to_gpio, e.g.
315 PH1 for pin 1 of port H.
316
317 config USB2_VBUS_PIN
318 string "Vbus enable pin for usb2 (ehci1)"
319 default "PH3" if MACH_SUN4I || MACH_SUN7I
320 default "PH24" if MACH_SUN6I
321 ---help---
322 See USB1_VBUS_PIN help text.
323
324 config I2C0_ENABLE
325 bool "Enable I2C/TWI controller 0"
326 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
327 default n if MACH_SUN6I || MACH_SUN8I
328 ---help---
329 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
330 its clock and setting up the bus. This is especially useful on devices
331 with slaves connected to the bus or with pins exposed through e.g. an
332 expansion port/header.
333
334 config I2C1_ENABLE
335 bool "Enable I2C/TWI controller 1"
336 default n
337 ---help---
338 See I2C0_ENABLE help text.
339
340 config I2C2_ENABLE
341 bool "Enable I2C/TWI controller 2"
342 default n
343 ---help---
344 See I2C0_ENABLE help text.
345
346 if MACH_SUN6I || MACH_SUN7I
347 config I2C3_ENABLE
348 bool "Enable I2C/TWI controller 3"
349 default n
350 ---help---
351 See I2C0_ENABLE help text.
352 endif
353
354 if MACH_SUN7I
355 config I2C4_ENABLE
356 bool "Enable I2C/TWI controller 4"
357 default n
358 ---help---
359 See I2C0_ENABLE help text.
360 endif
361
362 config AXP_GPIO
363 boolean "Enable support for gpio-s on axp PMICs"
364 default n
365 ---help---
366 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
367
368 config VIDEO
369 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
370 default y
371 ---help---
372 Say Y here to add support for using a cfb console on the HDMI, LCD
373 or VGA output found on most sunxi devices. See doc/README.video for
374 info on how to select the video output and mode.
375
376 config VIDEO_HDMI
377 boolean "HDMI output support"
378 depends on VIDEO && !MACH_SUN8I
379 default y
380 ---help---
381 Say Y here to add support for outputting video over HDMI.
382
383 config VIDEO_VGA
384 boolean "VGA output support"
385 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
386 default n
387 ---help---
388 Say Y here to add support for outputting video over VGA.
389
390 config VIDEO_VGA_VIA_LCD
391 boolean "VGA via LCD controller support"
392 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
393 default n
394 ---help---
395 Say Y here to add support for external DACs connected to the parallel
396 LCD interface driving a VGA connector, such as found on the
397 Olimex A13 boards.
398
399 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
400 boolean "Force sync active high for VGA via LCD controller support"
401 depends on VIDEO_VGA_VIA_LCD
402 default n
403 ---help---
404 Say Y here if you've a board which uses opendrain drivers for the vga
405 hsync and vsync signals. Opendrain drivers cannot generate steep enough
406 positive edges for a stable video output, so on boards with opendrain
407 drivers the sync signals must always be active high.
408
409 config VIDEO_VGA_EXTERNAL_DAC_EN
410 string "LCD panel power enable pin"
411 depends on VIDEO_VGA_VIA_LCD
412 default ""
413 ---help---
414 Set the enable pin for the external VGA DAC. This takes a string in the
415 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
416
417 config VIDEO_COMPOSITE
418 boolean "Composite video output support"
419 depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
420 default n
421 ---help---
422 Say Y here to add support for outputting composite video.
423
424 config VIDEO_LCD_MODE
425 string "LCD panel timing details"
426 depends on VIDEO
427 default ""
428 ---help---
429 LCD panel timing details string, leave empty if there is no LCD panel.
430 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
431 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
432 Also see: http://linux-sunxi.org/LCD
433
434 config VIDEO_LCD_DCLK_PHASE
435 int "LCD panel display clock phase"
436 depends on VIDEO
437 default 1
438 ---help---
439 Select LCD panel display clock phase shift, range 0-3.
440
441 config VIDEO_LCD_POWER
442 string "LCD panel power enable pin"
443 depends on VIDEO
444 default ""
445 ---help---
446 Set the power enable pin for the LCD panel. This takes a string in the
447 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
448
449 config VIDEO_LCD_RESET
450 string "LCD panel reset pin"
451 depends on VIDEO
452 default ""
453 ---help---
454 Set the reset pin for the LCD panel. This takes a string in the format
455 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
456
457 config VIDEO_LCD_BL_EN
458 string "LCD panel backlight enable pin"
459 depends on VIDEO
460 default ""
461 ---help---
462 Set the backlight enable pin for the LCD panel. This takes a string in the
463 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
464 port H.
465
466 config VIDEO_LCD_BL_PWM
467 string "LCD panel backlight pwm pin"
468 depends on VIDEO
469 default ""
470 ---help---
471 Set the backlight pwm pin for the LCD panel. This takes a string in the
472 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
473
474 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
475 bool "LCD panel backlight pwm is inverted"
476 depends on VIDEO
477 default y
478 ---help---
479 Set this if the backlight pwm output is active low.
480
481 config VIDEO_LCD_PANEL_I2C
482 bool "LCD panel needs to be configured via i2c"
483 depends on VIDEO
484 default n
485 ---help---
486 Say y here if the LCD panel needs to be configured via i2c. This
487 will add a bitbang i2c controller using gpios to talk to the LCD.
488
489 config VIDEO_LCD_PANEL_I2C_SDA
490 string "LCD panel i2c interface SDA pin"
491 depends on VIDEO_LCD_PANEL_I2C
492 default "PG12"
493 ---help---
494 Set the SDA pin for the LCD i2c interface. This takes a string in the
495 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
496
497 config VIDEO_LCD_PANEL_I2C_SCL
498 string "LCD panel i2c interface SCL pin"
499 depends on VIDEO_LCD_PANEL_I2C
500 default "PG10"
501 ---help---
502 Set the SCL pin for the LCD i2c interface. This takes a string in the
503 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
504
505
506 # Note only one of these may be selected at a time! But hidden choices are
507 # not supported by Kconfig
508 config VIDEO_LCD_IF_PARALLEL
509 bool
510
511 config VIDEO_LCD_IF_LVDS
512 bool
513
514
515 choice
516 prompt "LCD panel support"
517 depends on VIDEO
518 ---help---
519 Select which type of LCD panel to support.
520
521 config VIDEO_LCD_PANEL_PARALLEL
522 bool "Generic parallel interface LCD panel"
523 select VIDEO_LCD_IF_PARALLEL
524
525 config VIDEO_LCD_PANEL_LVDS
526 bool "Generic lvds interface LCD panel"
527 select VIDEO_LCD_IF_LVDS
528
529 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
530 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
531 select VIDEO_LCD_SSD2828
532 select VIDEO_LCD_IF_PARALLEL
533 ---help---
534 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
535
536 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
537 bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
538 select VIDEO_LCD_ANX9804
539 select VIDEO_LCD_IF_PARALLEL
540 select VIDEO_LCD_PANEL_I2C
541 ---help---
542 Select this for eDP LCD panels with 4 lanes running at 1.62G,
543 connected via an ANX9804 bridge chip.
544
545 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
546 bool "Hitachi tx18d42vm LCD panel"
547 select VIDEO_LCD_HITACHI_TX18D42VM
548 select VIDEO_LCD_IF_LVDS
549 ---help---
550 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
551
552 config VIDEO_LCD_TL059WV5C0
553 bool "tl059wv5c0 LCD panel"
554 select VIDEO_LCD_PANEL_I2C
555 select VIDEO_LCD_IF_PARALLEL
556 ---help---
557 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
558 Aigo M60/M608/M606 tablets.
559
560 endchoice
561
562
563 config GMAC_TX_DELAY
564 int "GMAC Transmit Clock Delay Chain"
565 default 0
566 ---help---
567 Set the GMAC Transmit Clock Delay Chain value.
568
569 config SPL_STACK_R_ADDR
570 default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I
571 default 0x2fe00000 if MACH_SUN9I
572
573 endif