board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 choice
   4         prompt "Sunxi SoC Variant"
   5
   6 config MACH_SUN4I
   7         bool "sun4i (Allwinner A10)"
   8         select CPU_V7
   9         select SUPPORT_SPL
  10
  11 config MACH_SUN5I
  12         bool "sun5i (Allwinner A13)"
  13         select CPU_V7
  14         select SUPPORT_SPL
  15
  16 config MACH_SUN6I
  17         bool "sun6i (Allwinner A31)"
  18         select CPU_V7
  19         select SUPPORT_SPL
  20
  21 config MACH_SUN7I
  22         bool "sun7i (Allwinner A20)"
  23         select CPU_V7
  24         select CPU_V7_HAS_NONSEC
  25         select CPU_V7_HAS_VIRT
  26         select SUPPORT_SPL
  27         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  28
  29 config MACH_SUN8I
  30         bool "sun8i (Allwinner A23)"
  31         select CPU_V7
  32         select SUPPORT_SPL
  33
  34 endchoice
  35
  36 config DRAM_CLK
  37         int "sunxi dram clock speed"
  38         default 312 if MACH_SUN6I || MACH_SUN8I
  39         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  40         ---help---
  41         Set the dram clock speed, valid range 240 - 480, must be a multiple
  42         of 24.
  43
  44 if MACH_SUN5I || MACH_SUN7I
  45 config DRAM_MBUS_CLK
  46         int "sunxi mbus clock speed"
  47         default 300
  48         ---help---
  49         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
  50
  51 endif
  52
  53 config DRAM_ZQ
  54         int "sunxi dram zq value"
  55         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
  56         default 127 if MACH_SUN7I
  57         ---help---
  58         Set the dram zq value.
  59
  60 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  61 config DRAM_EMR1
  62         int "sunxi dram emr1 value"
  63         default 0 if MACH_SUN4I
  64         default 4 if MACH_SUN5I || MACH_SUN7I
  65         ---help---
  66         Set the dram controller emr1 value.
  67
  68 config DRAM_ODT_EN
  69         int "sunxi dram odt_en value"
  70         default 0
  71         ---help---
  72         Set the dram controller odt_en parameter. This can be used to
  73         enable/disable the ODT feature.
  74
  75 config DRAM_TPR3
  76         hex "sunxi dram tpr3 value"
  77         default 0
  78         ---help---
  79         Set the dram controller tpr3 parameter. This parameter configures
  80         the delay on the command lane and also phase shifts, which are
  81         applied for sampling incoming read data. The default value 0
  82         means that no phase/delay adjustments are necessary. Properly
  83         configuring this parameter increases reliability at high DRAM
  84         clock speeds.
  85
  86 config DRAM_DQS_GATING_DELAY
  87         hex "sunxi dram dqs_gating_delay value"
  88         default 0
  89         ---help---
  90         Set the dram controller dqs_gating_delay parmeter. Each byte
  91         encodes the DQS gating delay for each byte lane. The delay
  92         granularity is 1/4 cycle. For example, the value 0x05060606
  93         means that the delay is 5 quarter-cycles for one lane (1.25
  94         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
  95         The default value 0 means autodetection. The results of hardware
  96         autodetection are not very reliable and depend on the chip
  97         temperature (sometimes producing different results on cold start
  98         and warm reboot). But the accuracy of hardware autodetection
  99         is usually good enough, unless running at really high DRAM
 100         clocks speeds (up to 600MHz). If unsure, keep as 0.
 101
 102 choice
 103         prompt "sunxi dram timings"
 104         default DRAM_TIMINGS_VENDOR_MAGIC
 105         ---help---
 106         Select the timings of the DDR3 chips.
 107
 108 config DRAM_TIMINGS_VENDOR_MAGIC
 109         bool "Magic vendor timings from Android"
 110         ---help---
 111         The same DRAM timings as in the Allwinner boot0 bootloader.
 112
 113 config DRAM_TIMINGS_DDR3_1066F_1333H
 114         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 115         ---help---
 116         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 117         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 118         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 119         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 120         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 121         that down binning to DDR3-1066F is supported (because DDR3-1066F
 122         uses a bit faster timings than DDR3-1333H).
 123
 124 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 125         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 126         ---help---
 127         Use the timings of the slowest possible JEDEC speed bin for the
 128         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 129         DDR3-800E, DDR3-1066G or DDR3-1333J.
 130
 131 endchoice
 132
 133 endif
 134
 135 config SYS_CLK_FREQ
 136         default 912000000 if MACH_SUN7I
 137         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 138
 139 config SYS_CONFIG_NAME
 140         default "sun4i" if MACH_SUN4I
 141         default "sun5i" if MACH_SUN5I
 142         default "sun6i" if MACH_SUN6I
 143         default "sun7i" if MACH_SUN7I
 144         default "sun8i" if MACH_SUN8I
 145
 146 config SYS_BOARD
 147         default "sunxi"
 148
 149 config SYS_SOC
 150         default "sunxi"
 151
 152 config SPL_FEL
 153         bool "SPL/FEL mode support"
 154         depends on SPL
 155         default n
 156         help
 157           This enables support for Fast Early Loader (FEL) mode. This
 158           allows U-Boot to be loaded to the board over USB by the on-chip
 159           boot rom. U-Boot should be sent in two parts: SPL first, with
 160           'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
 161           'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
 162           shrinks the amount of SRAM available to SPL, so only enable it if
 163           you need FEL. Note that enabling this option only allows FEL to be
 164           used; it is still possible to boot U-Boot from boot media. U-Boot
 165           SPL detects when it is being loaded using FEL.
 166
 167 config UART0_PORT_F
 168         bool "UART0 on MicroSD breakout board"
 169         depends on SPL_FEL
 170         default n
 171         ---help---
 172         Repurpose the SD card slot for getting access to the UART0 serial
 173         console. Primarily useful only for low level u-boot debugging on
 174         tablets, where normal UART0 is difficult to access and requires
 175         device disassembly and/or soldering. As the SD card can't be used
 176         at the same time, the system can be only booted in the FEL mode.
 177         Only enable this if you really know what you are doing.
 178
 179 config FDTFILE
 180         string "Default fdtfile env setting for this board"
 181
 182 config OLD_SUNXI_KERNEL_COMPAT
 183         boolean "Enable workarounds for booting old kernels"
 184         default n
 185         ---help---
 186         Set this to enable various workarounds for old kernels, this results in
 187         sub-optimal settings for newer kernels, only enable if needed.
 188
 189 config MMC0_CD_PIN
 190         string "Card detect pin for mmc0"
 191         default ""
 192         ---help---
 193         Set the card detect pin for mmc0, leave empty to not use cd. This
 194         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 195         PH1 for pin 1 of port H.
 196
 197 config MMC1_CD_PIN
 198         string "Card detect pin for mmc1"
 199         default ""
 200         ---help---
 201         See MMC0_CD_PIN help text.
 202
 203 config MMC2_CD_PIN
 204         string "Card detect pin for mmc2"
 205         default ""
 206         ---help---
 207         See MMC0_CD_PIN help text.
 208
 209 config MMC3_CD_PIN
 210         string "Card detect pin for mmc3"
 211         default ""
 212         ---help---
 213         See MMC0_CD_PIN help text.
 214
 215 config MMC_SUNXI_SLOT_EXTRA
 216         int "mmc extra slot number"
 217         default -1
 218         ---help---
 219         sunxi builds always enable mmc0, some boards also have a second sdcard
 220         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 221         support for this.
 222
 223 config USB0_VBUS_PIN
 224         string "Vbus enable pin for usb0 (otg)"
 225         default ""
 226         ---help---
 227         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 228         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 229
 230 config USB0_VBUS_DET
 231         string "Vbus detect pin for usb0 (otg)"
 232         depends on USB_MUSB_SUNXI
 233         default ""
 234         ---help---
 235         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 236         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 237
 238 config USB1_VBUS_PIN
 239         string "Vbus enable pin for usb1 (ehci0)"
 240         default "PH6" if MACH_SUN4I || MACH_SUN7I
 241         default "PH27" if MACH_SUN6I
 242         ---help---
 243         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 244         a string in the format understood by sunxi_name_to_gpio, e.g.
 245         PH1 for pin 1 of port H.
 246
 247 config USB2_VBUS_PIN
 248         string "Vbus enable pin for usb2 (ehci1)"
 249         default "PH3" if MACH_SUN4I || MACH_SUN7I
 250         default "PH24" if MACH_SUN6I
 251         ---help---
 252         See USB1_VBUS_PIN help text.
 253
 254 config VIDEO
 255         boolean "Enable graphical uboot console on HDMI, LCD or VGA"
 256         default y
 257         ---help---
 258         Say Y here to add support for using a cfb console on the HDMI, LCD
 259         or VGA output found on most sunxi devices. See doc/README.video for
 260         info on how to select the video output and mode.
 261
 262 config VIDEO_HDMI
 263         boolean "HDMI output support"
 264         depends on VIDEO && !MACH_SUN8I
 265         default y
 266         ---help---
 267         Say Y here to add support for outputting video over HDMI.
 268
 269 config VIDEO_VGA
 270         boolean "VGA output support"
 271         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 272         default n
 273         ---help---
 274         Say Y here to add support for outputting video over VGA.
 275
 276 config VIDEO_VGA_VIA_LCD
 277         boolean "VGA via LCD controller support"
 278         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 279         default n
 280         ---help---
 281         Say Y here to add support for external DACs connected to the parallel
 282         LCD interface driving a VGA connector, such as found on the
 283         Olimex A13 boards.
 284
 285 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 286         boolean "Force sync active high for VGA via LCD controller support"
 287         depends on VIDEO_VGA_VIA_LCD
 288         default n
 289         ---help---
 290         Say Y here if you've a board which uses opendrain drivers for the vga
 291         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 292         positive edges for a stable video output, so on boards with opendrain
 293         drivers the sync signals must always be active high.
 294
 295 config VIDEO_VGA_EXTERNAL_DAC_EN
 296         string "LCD panel power enable pin"
 297         depends on VIDEO_VGA_VIA_LCD
 298         default ""
 299         ---help---
 300         Set the enable pin for the external VGA DAC. This takes a string in the
 301         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 302
 303 config VIDEO_LCD_MODE
 304         string "LCD panel timing details"
 305         depends on VIDEO
 306         default ""
 307         ---help---
 308         LCD panel timing details string, leave empty if there is no LCD panel.
 309         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 310         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 311
 312 config VIDEO_LCD_DCLK_PHASE
 313         int "LCD panel display clock phase"
 314         depends on VIDEO
 315         default 1
 316         ---help---
 317         Select LCD panel display clock phase shift, range 0-3.
 318
 319 config VIDEO_LCD_POWER
 320         string "LCD panel power enable pin"
 321         depends on VIDEO
 322         default ""
 323         ---help---
 324         Set the power enable pin for the LCD panel. This takes a string in the
 325         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 326
 327 config VIDEO_LCD_RESET
 328         string "LCD panel reset pin"
 329         depends on VIDEO
 330         default ""
 331         ---help---
 332         Set the reset pin for the LCD panel. This takes a string in the format
 333         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 334
 335 config VIDEO_LCD_BL_EN
 336         string "LCD panel backlight enable pin"
 337         depends on VIDEO
 338         default ""
 339         ---help---
 340         Set the backlight enable pin for the LCD panel. This takes a string in the
 341         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 342         port H.
 343
 344 config VIDEO_LCD_BL_PWM
 345         string "LCD panel backlight pwm pin"
 346         depends on VIDEO
 347         default ""
 348         ---help---
 349         Set the backlight pwm pin for the LCD panel. This takes a string in the
 350         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 351
 352 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 353         bool "LCD panel backlight pwm is inverted"
 354         depends on VIDEO
 355         default y
 356         ---help---
 357         Set this if the backlight pwm output is active low.
 358
 359 config VIDEO_LCD_PANEL_I2C
 360         bool "LCD panel needs to be configured via i2c"
 361         depends on VIDEO
 362         default n
 363         ---help---
 364         Say y here if the LCD panel needs to be configured via i2c. This
 365         will add a bitbang i2c controller using gpios to talk to the LCD.
 366
 367 config VIDEO_LCD_PANEL_I2C_SDA
 368         string "LCD panel i2c interface SDA pin"
 369         depends on VIDEO_LCD_PANEL_I2C
 370         default "PG12"
 371         ---help---
 372         Set the SDA pin for the LCD i2c interface. This takes a string in the
 373         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 374
 375 config VIDEO_LCD_PANEL_I2C_SCL
 376         string "LCD panel i2c interface SCL pin"
 377         depends on VIDEO_LCD_PANEL_I2C
 378         default "PG10"
 379         ---help---
 380         Set the SCL pin for the LCD i2c interface. This takes a string in the
 381         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 382
 383
 384 # Note only one of these may be selected at a time! But hidden choices are
 385 # not supported by Kconfig
 386 config VIDEO_LCD_IF_PARALLEL
 387         bool
 388
 389 config VIDEO_LCD_IF_LVDS
 390         bool
 391
 392
 393 choice
 394         prompt "LCD panel support"
 395         depends on VIDEO
 396         ---help---
 397         Select which type of LCD panel to support.
 398
 399 config VIDEO_LCD_PANEL_PARALLEL
 400         bool "Generic parallel interface LCD panel"
 401         select VIDEO_LCD_IF_PARALLEL
 402
 403 config VIDEO_LCD_PANEL_LVDS
 404         bool "Generic lvds interface LCD panel"
 405         select VIDEO_LCD_IF_LVDS
 406
 407 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 408         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 409         select VIDEO_LCD_SSD2828
 410         select VIDEO_LCD_IF_PARALLEL
 411         ---help---
 412          7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 413
 414 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 415         bool "Hitachi tx18d42vm LCD panel"
 416         select VIDEO_LCD_HITACHI_TX18D42VM
 417         select VIDEO_LCD_IF_LVDS
 418         ---help---
 419         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 420
 421 config VIDEO_LCD_TL059WV5C0
 422         bool "tl059wv5c0 LCD panel"
 423         select VIDEO_LCD_PANEL_I2C
 424         select VIDEO_LCD_IF_PARALLEL
 425         ---help---
 426         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 427         Aigo M60/M608/M606 tablets.
 428
 429 endchoice
 430
 431
 432 config USB_MUSB_SUNXI
 433         bool "Enable sunxi OTG / DRC USB controller in host mode"
 434         default n
 435         ---help---
 436         Say y here to enable support for the sunxi OTG / DRC USB controller
 437         used on almost all sunxi boards. Note currently u-boot can only have
 438         one usb host controller enabled at a time, so enabling this on boards
 439         which also use the ehci host controller will result in build errors.
 440
 441 config USB_KEYBOARD
 442         boolean "Enable USB keyboard support"
 443         default y
 444         ---help---
 445         Say Y here to add support for using a USB keyboard (typically used
 446         in combination with a graphical console).
 447
 448 config GMAC_TX_DELAY
 449         int "GMAC Transmit Clock Delay Chain"
 450         default 0
 451         ---help---
 452         Set the GMAC Transmit Clock Delay Chain value.
 453
 454 endif