board/ti/ks2_evm/board_k2g.c

   1 /*
   2  * K2G EVM : Board initialization
   3  *
   4  * (C) Copyright 2015
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #include <common.h>
  10 #include <asm/arch/clock.h>
  11 #include <asm/ti-common/keystone_net.h>
  12 #include "mux-k2g.h"
  13
  14 #define SYS_CLK         24000000
  15
  16 unsigned int external_clk[ext_clk_count] = {
  17         [sys_clk]       =       SYS_CLK,
  18         [pa_clk]        =       SYS_CLK,
  19         [tetris_clk]    =       SYS_CLK,
  20         [ddr3a_clk]     =       SYS_CLK,
  21         [uart_clk]      =       SYS_CLK,
  22 };
  23
  24 static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
  25 static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
  26 static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
  27 static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
  28 static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
  29
  30 struct pll_init_data *get_pll_init_data(int pll)
  31 {
  32         struct pll_init_data *data = NULL;
  33
  34         switch (pll) {
  35         case MAIN_PLL:
  36                 data = &main_pll_config;
  37                 break;
  38         case TETRIS_PLL:
  39                 data = &tetris_pll_config;
  40                 break;
  41         case NSS_PLL:
  42                 data = &nss_pll_config;
  43                 break;
  44         case UART_PLL:
  45                 data = &uart_pll_config;
  46                 break;
  47         case DDR3_PLL:
  48                 data = &ddr3_pll_config;
  49                 break;
  50         default:
  51                 data = NULL;
  52         }
  53
  54         return data;
  55 }
  56
  57 s16 divn_val[16] = {
  58         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  59 };
  60
  61 #ifdef CONFIG_BOARD_EARLY_INIT_F
  62 int board_early_init_f(void)
  63 {
  64         init_plls();
  65
  66         k2g_mux_config();
  67
  68         return 0;
  69 }
  70 #endif
  71
  72 #ifdef CONFIG_SPL_BUILD
  73 void spl_init_keystone_plls(void)
  74 {
  75         init_plls();
  76 }
  77 #endif
  78
  79 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  80 struct eth_priv_t eth_priv_cfg[] = {
  81         {
  82                 .int_name       = "K2G_EMAC",
  83                 .rx_flow        = 0,
  84                 .phy_addr       = 0,
  85                 .slave_port     = 1,
  86                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  87                 .phy_if          = PHY_INTERFACE_MODE_RGMII,
  88         },
  89 };
  90
  91 int get_num_eth_ports(void)
  92 {
  93         return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
  94 }
  95 #endif