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git.ipfire.org Git - people/ms/u-boot.git/blob - board/ti/ks2_evm/ddr3_k2e.c
2 * Keystone2: DDR3 initialization
4 * (C) Copyright 2014-2015
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/ddr3.h>
14 static struct pll_init_data ddr3_400
= DDR3_PLL_400
;
15 static struct pll_init_data ddr3_333
= DDR3_PLL_333
;
19 struct ddr3_spd_cb spd_cb
;
21 if (ddr3_get_dimm_params_from_spd(&spd_cb
)) {
22 printf("Sorry, I don't know how to configure DDR3A.\n"
28 printf("Detected SO-DIMM [%s]\n", spd_cb
.dimm_name
);
30 printf("DDR3 speed %d\n", spd_cb
.ddrspdclock
);
31 if (spd_cb
.ddrspdclock
== 1600)
36 /* Reset DDR3 PHY after PLL enabled */
39 spd_cb
.phy_cfg
.zq0cr1
|= 0x10000;
40 spd_cb
.phy_cfg
.zq1cr1
|= 0x10000;
41 spd_cb
.phy_cfg
.zq2cr1
|= 0x10000;
42 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC
, &spd_cb
.phy_cfg
);
43 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE
, &spd_cb
.emif_cfg
);
45 printf("DRAM: %d GiB\n", spd_cb
.ddr_size_gbyte
);
47 return (u32
)spd_cb
.ddr_size_gbyte
;