1 // SPDX-License-Identifier: GPL-2.0+
4 * Texas Instruments Incorporated, <www.ti.com>
5 * Aneesh V <aneesh@ti.com>
6 * Steve Sakoman <steve@sakoman.com>
11 #include <asm/arch/omap.h>
12 #include <asm/arch/sys_proto.h>
13 #include <asm/arch/mmc_host_def.h>
16 #include <linux/usb/gadget.h>
17 #include <dwc3-uboot.h>
18 #include <dwc3-omap-uboot.h>
19 #include <ti-usb-phy-uboot.h>
23 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
27 #include <asm/mach-types.h>
28 #include <asm/arch/clock.h>
29 #include <asm/arch/ehci.h>
30 #include <asm/ehci-omap.h>
31 #include <asm/arch/sata.h>
33 #define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
34 #define DIE_ID_REG_OFFSET 0x200
38 DECLARE_GLOBAL_DATA_PTR
;
40 const struct omap_sysinfo sysinfo
= {
41 "Board: OMAP5432 uEVM\n"
45 * @brief tca642x_init - uEVM default values for the GPIO expander
46 * input reg, output reg, polarity reg, configuration reg
48 struct tca642x_bank_info tca642x_init
[] = {
52 .configuration_reg
= 0x80 },
56 .configuration_reg
= 0xff },
60 .configuration_reg
= 0x40 },
63 #ifdef CONFIG_USB_DWC3
64 static struct dwc3_device usb_otg_ss
= {
65 .maximum_speed
= USB_SPEED_SUPER
,
66 .base
= OMAP5XX_USB_OTG_SS_BASE
,
67 .tx_fifo_resize
= false,
71 static struct dwc3_omap_device usb_otg_ss_glue
= {
72 .base
= (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE
,
73 .utmi_mode
= DWC3_OMAP_UTMI_MODE_SW
,
77 static struct ti_usb_phy_device usb_phy_device
= {
78 .pll_ctrl_base
= (void *)OMAP5XX_USB3_PHY_PLL_CTRL
,
79 .usb2_phy_power
= (void *)OMAP5XX_USB2_PHY_POWER
,
80 .usb3_phy_power
= (void *)OMAP5XX_USB3_PHY_POWER
,
84 int board_usb_init(int index
, enum usb_init_type init
)
87 printf("Invalid Controller Index\n");
91 if (init
== USB_INIT_DEVICE
) {
92 usb_otg_ss
.dr_mode
= USB_DR_MODE_PERIPHERAL
;
93 usb_otg_ss_glue
.vbus_id_status
= OMAP_DWC3_VBUS_VALID
;
95 usb_otg_ss
.dr_mode
= USB_DR_MODE_HOST
;
96 usb_otg_ss_glue
.vbus_id_status
= OMAP_DWC3_ID_GROUND
;
99 enable_usb_clocks(index
);
100 ti_usb_phy_uboot_init(&usb_phy_device
);
101 dwc3_omap_uboot_init(&usb_otg_ss_glue
);
102 dwc3_uboot_init(&usb_otg_ss
);
107 int board_usb_cleanup(int index
, enum usb_init_type init
)
110 printf("Invalid Controller Index\n");
114 ti_usb_phy_uboot_exit(index
);
115 dwc3_uboot_exit(index
);
116 dwc3_omap_uboot_exit(index
);
117 disable_usb_clocks(index
);
122 int usb_gadget_handle_interrupts(int index
)
126 status
= dwc3_omap_uboot_interrupt_status(index
);
128 dwc3_uboot_handle_interrupt(index
);
142 gd
->bd
->bi_arch_number
= MACH_TYPE_OMAP5_SEVM
;
143 gd
->bd
->bi_boot_params
= (0x80000000 + 0x100); /* boot param addr */
145 tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR
, tca642x_init
);
150 int board_eth_init(bd_t
*bis
)
155 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
156 static void enable_host_clocks(void)
159 int hs_clk_ctrl_val
= (OPTFCLKEN_HSIC60M_P3_CLK
|
160 OPTFCLKEN_HSIC480M_P3_CLK
|
161 OPTFCLKEN_HSIC60M_P2_CLK
|
162 OPTFCLKEN_HSIC480M_P2_CLK
|
163 OPTFCLKEN_UTMI_P3_CLK
| OPTFCLKEN_UTMI_P2_CLK
);
165 /* Enable port 2 and 3 clocks*/
166 setbits_le32((*prcm
)->cm_l3init_hsusbhost_clkctrl
, hs_clk_ctrl_val
);
168 /* Enable port 2 and 3 usb host ports tll clocks*/
169 setbits_le32((*prcm
)->cm_l3init_hsusbtll_clkctrl
,
170 (OPTFCLKEN_USB_CH1_CLK_ENABLE
| OPTFCLKEN_USB_CH2_CLK_ENABLE
));
171 #ifdef CONFIG_USB_XHCI_OMAP
172 /* Enable the USB OTG Super speed clocks */
173 setbits_le32((*prcm
)->cm_l3init_usb_otg_ss_clkctrl
,
174 (OPTFCLKEN_REFCLK960M
| OTG_SS_CLKCTRL_MODULEMODE_HW
));
177 auxclk
= readl((*prcm
)->scrm_auxclk1
);
178 /* Request auxilary clock */
179 auxclk
|= AUXCLK_ENABLE_MASK
;
180 writel(auxclk
, (*prcm
)->scrm_auxclk1
);
185 * @brief misc_init_r - Configure EVM board specific configurations
186 * such as power configurations, ethernet initialization as phase2 of
191 int misc_init_r(void)
193 #ifdef CONFIG_PALMAS_POWER
194 palmas_init_settings();
197 omap_die_id_usbethaddr();
202 void set_muxconf_regs(void)
204 do_set_mux((*ctrl
)->control_padconf_core_base
,
205 core_padconf_array_essential
,
206 sizeof(core_padconf_array_essential
) /
207 sizeof(struct pad_conf_entry
));
209 do_set_mux((*ctrl
)->control_padconf_wkup_base
,
210 wkup_padconf_array_essential
,
211 sizeof(wkup_padconf_array_essential
) /
212 sizeof(struct pad_conf_entry
));
215 #if defined(CONFIG_MMC)
216 int board_mmc_init(bd_t
*bis
)
218 omap_mmc_init(0, 0, 0, -1, -1);
219 omap_mmc_init(1, 0, 0, -1, -1);
224 #ifdef CONFIG_USB_EHCI_HCD
225 static struct omap_usbhs_board_data usbhs_bdata
= {
226 .port_mode
[0] = OMAP_USBHS_PORT_MODE_UNUSED
,
227 .port_mode
[1] = OMAP_EHCI_PORT_MODE_HSIC
,
228 .port_mode
[2] = OMAP_EHCI_PORT_MODE_HSIC
,
231 int ehci_hcd_init(int index
, enum usb_init_type init
,
232 struct ehci_hccr
**hccr
, struct ehci_hcor
**hcor
)
236 enable_host_clocks();
238 ret
= omap_ehci_hcd_init(index
, &usbhs_bdata
, hccr
, hcor
);
240 puts("Failed to initialize ehci\n");
247 int ehci_hcd_stop(void)
249 return omap_ehci_hcd_stop();
252 void usb_hub_reset_devices(struct usb_hub_device
*hub
, int port
)
254 /* The LAN9730 needs to be reset after the port power has been set. */
256 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
, 0);
258 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
, 1);
263 #ifdef CONFIG_USB_XHCI_OMAP
265 * @brief board_usb_init - Configure EVM board specific configurations
266 * for the LDO's and clocks for the USB blocks.
270 int board_usb_init(int index
, enum usb_init_type init
)
273 #ifdef CONFIG_PALMAS_USB_SS_PWR
274 ret
= palmas_enable_ss_ldo();
277 enable_host_clocks();