board/ti/omap730p2/omap730p2.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * (C) Copyright 2003
  10  * Texas Instruments, <www.ti.com>
  11  * Kshitij Gupta <Kshitij@ti.com>
  12  *
  13  * SPDX-License-Identifier:     GPL-2.0+
  14  */
  15
  16 #include <common.h>
  17 #include <netdev.h>
  18 #if defined(CONFIG_OMAP730)
  19 #include <./configs/omap730.h>
  20 #endif
  21
  22 DECLARE_GLOBAL_DATA_PTR;
  23
  24 int test_boot_mode(void);
  25 void spin_up_leds(void);
  26 void flash__init (void);
  27 void ether__init (void);
  28 void set_muxconf_regs (void);
  29 void peripheral_power_enable (void);
  30
  31 #define FLASH_ON_CS0    1
  32 #define FLASH_ON_CS3    0
  33
  34 static inline void delay (unsigned long loops)
  35 {
  36         __asm__ volatile ("1:\n"
  37                           "subs %0, %1, #1\n"
  38                           "bne 1b":"=r" (loops):"0" (loops));
  39 }
  40
  41 int test_boot_mode(void)
  42 {
  43         /* Check for CS0 and CS3 address decode swapping */
  44         if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
  45                 return(FLASH_ON_CS3);
  46         else
  47                 return(FLASH_ON_CS0);
  48 }
  49
  50 /* Toggle backup LED indication */
  51 void toggle_backup_led(void)
  52 {
  53         static int  backupLEDState = 0;  /* Init variable so that the LED will be ON the first time */
  54         volatile unsigned int *IOConfReg;
  55
  56
  57         IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
  58
  59         if (backupLEDState != 0) {
  60                 *IOConfReg &= (0xFFFFEFFF);
  61                 backupLEDState = 0;
  62         } else {
  63                 *IOConfReg |= (0x00001000);
  64                 backupLEDState = 1;
  65         }
  66 }
  67
  68 /*
  69  * Miscellaneous platform dependent initialisations
  70  */
  71
  72 int board_init (void)
  73 {
  74         /* arch number of OMAP 730 P2 Board - Same as the Innovator! */
  75         gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
  76
  77         /* adress of boot parameters */
  78         gd->bd->bi_boot_params = 0x10000100;
  79
  80         /* Configure MUX settings */
  81         set_muxconf_regs ();
  82
  83         peripheral_power_enable ();
  84
  85         /* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
  86         toggle_backup_led();
  87
  88         /* Hold GSM in reset until needed */
  89         *((volatile unsigned short *)M_CTL) &= ~1;
  90
  91         /*
  92          *  CSx timings, GPIO Mux ... setup
  93          */
  94
  95         /* Flash: CS0 timings setup */
  96         *((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
  97         *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
  98
  99         /* Ethernet support trough the debug board */
 100         /* CS1 timings setup */
 101         *((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
 102         *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
 103
 104         /* this speeds up your boot a quite a bit.  However to make it
 105          *  work, you need make sure your kernel startup flush bug is fixed.
 106          *  ... rkw ...
 107          */
 108         icache_enable ();
 109
 110         flash__init ();
 111         ether__init ();
 112
 113         return 0;
 114 }
 115
 116 /******************************
 117  Routine:
 118  Description:
 119 ******************************/
 120 void flash__init (void)
 121 {
 122         unsigned int regval;
 123
 124         regval = *((volatile unsigned int *) EMIFS_CONFIG);
 125         /* Turn off write protection for flash devices. */
 126         regval = regval | 0x0001;
 127         *((volatile unsigned int *) EMIFS_CONFIG) = regval;
 128 }
 129
 130 /*************************************************************
 131  Routine:ether__init
 132  Description: take the Ethernet controller out of reset and wait
 133                            for the EEPROM load to complete.
 134 *************************************************************/
 135 void ether__init (void)
 136 {
 137 #define LAN_RESET_REGISTER 0x0400001c
 138
 139         *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 140         do {
 141                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
 142                 udelay (100);
 143         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
 144
 145         do {
 146                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 147                 udelay (100);
 148         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
 149
 150 #define ETH_CONTROL_REG 0x0400030b
 151
 152         *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
 153         udelay (100);
 154 }
 155
 156 /******************************
 157  Routine:
 158  Description:
 159 ******************************/
 160 int dram_init (void)
 161 {
 162         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 163         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 164
 165         return 0;
 166 }
 167
 168 /******************************************************
 169  Routine: set_muxconf_regs
 170  Description: Setting up the configuration Mux registers
 171                           specific to the hardware
 172 *******************************************************/
 173 void set_muxconf_regs (void)
 174 {
 175         volatile unsigned int *MuxConfReg;
 176         /* set each registers to its reset value; */
 177
 178         /*
 179          *  Backup LED Indication
 180          */
 181
 182         /* Configure MUXed pin. Mode 6: GPIO_140 */
 183         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
 184         *MuxConfReg &= (0xFFFFFF1F);         /* Clear D_MPU_LPG1 */
 185         *MuxConfReg |= 0x000000C0;           /* Set D_MPU_LPG1 to 0x6 */
 186
 187         /* Configure GPIO_140 as output */
 188         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
 189         *MuxConfReg &= (0xFFFFEFFF);         /* Clear direction (output) for GPIO 140 */
 190
 191         /*
 192          * Configure GPIOs for battery charge & feedback
 193          */
 194
 195         /* Configure MUXed pin. Mode 6: GPIO_35 */
 196         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 197         *MuxConfReg &= 0xFFFFFFF1;           /* Clear M_CLK_OUT */
 198         *MuxConfReg |= 0x0000000C;           /* Set M_CLK_OUT = 0x6 (GPIOs) */
 199
 200         /* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
 201         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
 202         *MuxConfReg &= 0xFFFF1FFF;           /* Clear D_DDR */
 203         *MuxConfReg |= 0x0000C000;           /* Set D_DDR = 0x6 (GPIOs) */
 204
 205         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
 206         *MuxConfReg |= 0x00000100;           /* Configure GPIO_72 as input */
 207         *MuxConfReg &= 0xFFFFFDFF;           /* Configure GPIO_73 as output     */
 208
 209         /*
 210          * Allow battery charge
 211          */
 212
 213         MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
 214         *MuxConfReg &= (0xFFFFFDFF);         /* Clear GPIO_73 pin */
 215
 216         /*
 217          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 218          * It is used as the Ethernet controller interrupt
 219          */
 220         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
 221         *MuxConfReg &= 0x1FFFFFFF;
 222 }
 223
 224 /******************************************************
 225  Routine: peripheral_power_enable
 226  Description: Enable the power for UART1
 227 *******************************************************/
 228 void peripheral_power_enable (void)
 229 {
 230         volatile unsigned int *MuxConfReg;
 231
 232
 233         /* Set up pins used by UART */
 234
 235         /* Start UART clock (48MHz) */
 236         MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
 237         *MuxConfReg &= (0xFFFFFFF7);
 238         *MuxConfReg |= (0x00000008);
 239
 240         /* Get the UART pin in mode0  */
 241         MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 242         *MuxConfReg &= (0xFF1FFFFF);
 243         *MuxConfReg &= (0xF1FFFFFF);
 244 }
 245
 246 #ifdef CONFIG_CMD_NET
 247 int board_eth_init(bd_t *bis)
 248 {
 249         int rc = 0;
 250 #ifdef CONFIG_LAN91C96
 251         rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
 252 #endif
 253         return rc;
 254 }
 255 #endif