1 // SPDX-License-Identifier: GPL-2.0+
4 * Texas Instruments Incorporated, <www.ti.com>
5 * Steve Sakoman <steve@sakoman.com>
8 #include <asm/mach-types.h>
9 #include <asm/arch/sys_proto.h>
10 #include <asm/arch/mmc_host_def.h>
11 #include <asm/arch/clock.h>
12 #include <asm/arch/gpio.h>
17 #include "panda_mux_data.h"
19 #ifdef CONFIG_USB_EHCI_HCD
21 #include <asm/arch/ehci.h>
22 #include <asm/ehci-omap.h>
25 #define PANDA_ULPI_PHY_TYPE_GPIO 182
26 #define PANDA_BOARD_ID_1_GPIO 101
27 #define PANDA_ES_BOARD_ID_1_GPIO 48
28 #define PANDA_BOARD_ID_2_GPIO 171
29 #define PANDA_ES_BOARD_ID_3_GPIO 3
30 #define PANDA_ES_BOARD_ID_4_GPIO 2
32 DECLARE_GLOBAL_DATA_PTR
;
34 const struct omap_sysinfo sysinfo
= {
35 "Board: OMAP4 Panda\n"
38 struct omap4_scrm_regs
*const scrm
= (struct omap4_scrm_regs
*)0x4a30a000;
49 gd
->bd
->bi_arch_number
= MACH_TYPE_OMAP4_PANDA
;
50 gd
->bd
->bi_boot_params
= (0x80000000 + 0x100); /* boot param addr */
55 int board_eth_init(bd_t
*bis
)
61 * Routine: get_board_revision
62 * Description: Detect if we are running on a panda revision A1-A6,
63 * or an ES panda board. This can be done by reading
64 * the level of GPIOs and checking the processor revisions.
65 * This should result in:
67 * GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
68 * GPIO171, GPIO101, GPIO182: 1 0 1 => A6
70 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
71 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
73 int get_board_revision(void)
75 int board_id0
, board_id1
, board_id2
;
76 int board_id3
, board_id4
;
79 int processor_rev
= omap_revision();
81 /* Setup the mux for the common board ID pins (gpio 171 and 182) */
82 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+ UNIPRO_TX0
);
83 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+ FREF_CLK2_OUT
);
85 board_id0
= gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO
);
86 board_id2
= gpio_get_value(PANDA_BOARD_ID_2_GPIO
);
88 if ((processor_rev
>= OMAP4460_ES1_0
&&
89 processor_rev
<= OMAP4460_ES1_1
)) {
91 * Setup the mux for the ES specific board ID pins (gpio 101,
94 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+
96 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+
98 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+
101 board_id1
= gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO
);
102 board_id3
= gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO
);
103 board_id4
= gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO
);
105 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
106 env_set("board_name", "panda-es");
108 board_id
= ((board_id4
<< 4) | (board_id3
<< 3) |
109 (board_id2
<< 2) | (board_id1
<< 1) | (board_id0
));
111 /* Setup the mux for the Ax specific board ID pins (gpio 101) */
112 writew((IEN
| M3
), (*ctrl
)->control_padconf_core_base
+
115 board_id1
= gpio_get_value(PANDA_BOARD_ID_1_GPIO
);
116 board_id
= ((board_id2
<< 2) | (board_id1
<< 1) | (board_id0
));
118 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
119 if ((board_id
>= 0x3) && (processor_rev
== OMAP4430_ES2_3
))
120 env_set("board_name", "panda-a4");
128 * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
131 * Detect if we are running on B3 version of ES panda board,
132 * This can be done by reading the level of GPIO 171 and checking the
133 * processor revisions.
134 * GPIO171: 1 => Panda ES Rev B3
136 * Return : return 1 if Panda ES Rev B3 , else return 0
138 u8
is_panda_es_rev_b3(void)
140 int processor_rev
= omap_revision();
143 if ((processor_rev
>= OMAP4460_ES1_0
&&
144 processor_rev
<= OMAP4460_ES1_1
)) {
146 /* Setup the mux for the common board ID pins (gpio 171) */
148 (*ctrl
)->control_padconf_core_base
+ UNIPRO_TX0
);
150 /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */
151 ret
= gpio_get_value(PANDA_BOARD_ID_2_GPIO
);
156 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
158 * emif_get_reg_dump() - emif_get_reg_dump strong function
160 * @emif_nr - emif base
161 * @regs - reg dump of timing values
163 * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
165 void emif_get_reg_dump(u32 emif_nr
, const struct emif_regs
**regs
)
167 u32 omap4_rev
= omap_revision();
169 /* Same devices and geometry on both EMIFs */
170 if (omap4_rev
== OMAP4430_ES1_0
)
171 *regs
= &emif_regs_elpida_380_mhz_1cs
;
172 else if (omap4_rev
== OMAP4430_ES2_0
)
173 *regs
= &emif_regs_elpida_200_mhz_2cs
;
174 else if (omap4_rev
== OMAP4430_ES2_3
)
175 *regs
= &emif_regs_elpida_400_mhz_1cs
;
176 else if (omap4_rev
< OMAP4470_ES1_0
) {
177 if(is_panda_es_rev_b3())
178 *regs
= &emif_regs_elpida_400_mhz_1cs
;
180 *regs
= &emif_regs_elpida_400_mhz_2cs
;
183 *regs
= &emif_regs_elpida_400_mhz_1cs
;
186 void emif_get_dmm_regs(const struct dmm_lisa_map_regs
189 u32 omap_rev
= omap_revision();
191 if (omap_rev
== OMAP4430_ES1_0
)
192 *dmm_lisa_regs
= &lisa_map_2G_x_1_x_2
;
193 else if (omap_rev
== OMAP4430_ES2_3
)
194 *dmm_lisa_regs
= &lisa_map_2G_x_2_x_2
;
195 else if (omap_rev
< OMAP4460_ES1_0
)
196 *dmm_lisa_regs
= &lisa_map_2G_x_2_x_2
;
198 *dmm_lisa_regs
= &ma_lisa_map_2G_x_2_x_2
;
204 * @brief misc_init_r - Configure Panda board specific configurations
205 * such as power configurations, ethernet initialization as phase2 of
210 int misc_init_r(void)
213 u32 auxclk
, altclksrc
;
215 /* EHCI is not supported on ES1.0 */
216 if (omap_revision() == OMAP4430_ES1_0
)
219 get_board_revision();
221 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO
);
222 phy_type
= gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO
);
225 /* ULPI PHY supplied by auxclk3 derived from sys_clk */
226 debug("ULPI PHY supplied by auxclk3\n");
228 auxclk
= readl(&scrm
->auxclk3
);
230 auxclk
&= ~AUXCLK_SRCSELECT_MASK
;
231 auxclk
|= AUXCLK_SRCSELECT_SYS_CLK
<< AUXCLK_SRCSELECT_SHIFT
;
232 /* Set the divisor to 2 */
233 auxclk
&= ~AUXCLK_CLKDIV_MASK
;
234 auxclk
|= AUXCLK_CLKDIV_2
<< AUXCLK_CLKDIV_SHIFT
;
235 /* Request auxilary clock #3 */
236 auxclk
|= AUXCLK_ENABLE_MASK
;
238 writel(auxclk
, &scrm
->auxclk3
);
240 /* ULPI PHY supplied by auxclk1 derived from PER dpll */
241 debug("ULPI PHY supplied by auxclk1\n");
243 auxclk
= readl(&scrm
->auxclk1
);
244 /* Select per DPLL */
245 auxclk
&= ~AUXCLK_SRCSELECT_MASK
;
246 auxclk
|= AUXCLK_SRCSELECT_PER_DPLL
<< AUXCLK_SRCSELECT_SHIFT
;
247 /* Set the divisor to 16 */
248 auxclk
&= ~AUXCLK_CLKDIV_MASK
;
249 auxclk
|= AUXCLK_CLKDIV_16
<< AUXCLK_CLKDIV_SHIFT
;
250 /* Request auxilary clock #3 */
251 auxclk
|= AUXCLK_ENABLE_MASK
;
253 writel(auxclk
, &scrm
->auxclk1
);
256 altclksrc
= readl(&scrm
->altclksrc
);
258 /* Activate alternate system clock supplier */
259 altclksrc
&= ~ALTCLKSRC_MODE_MASK
;
260 altclksrc
|= ALTCLKSRC_MODE_ACTIVE
;
263 altclksrc
|= ALTCLKSRC_ENABLE_INT_MASK
| ALTCLKSRC_ENABLE_EXT_MASK
;
265 writel(altclksrc
, &scrm
->altclksrc
);
267 omap_die_id_usbethaddr();
272 void set_muxconf_regs(void)
274 do_set_mux((*ctrl
)->control_padconf_core_base
,
275 core_padconf_array_essential
,
276 sizeof(core_padconf_array_essential
) /
277 sizeof(struct pad_conf_entry
));
279 do_set_mux((*ctrl
)->control_padconf_wkup_base
,
280 wkup_padconf_array_essential
,
281 sizeof(wkup_padconf_array_essential
) /
282 sizeof(struct pad_conf_entry
));
284 if (omap_revision() >= OMAP4460_ES1_0
)
285 do_set_mux((*ctrl
)->control_padconf_wkup_base
,
286 wkup_padconf_array_essential_4460
,
287 sizeof(wkup_padconf_array_essential_4460
) /
288 sizeof(struct pad_conf_entry
));
291 #if defined(CONFIG_MMC)
292 int board_mmc_init(bd_t
*bis
)
294 return omap_mmc_init(0, 0, 0, -1, -1);
297 #if !defined(CONFIG_SPL_BUILD)
298 void board_mmc_power_init(void)
300 twl6030_power_mmc_init(0);
305 #ifdef CONFIG_USB_EHCI_HCD
307 static struct omap_usbhs_board_data usbhs_bdata
= {
308 .port_mode
[0] = OMAP_EHCI_PORT_MODE_PHY
,
309 .port_mode
[1] = OMAP_USBHS_PORT_MODE_UNUSED
,
310 .port_mode
[2] = OMAP_USBHS_PORT_MODE_UNUSED
,
313 int ehci_hcd_init(int index
, enum usb_init_type init
,
314 struct ehci_hccr
**hccr
, struct ehci_hcor
**hcor
)
317 unsigned int utmi_clk
;
319 /* Now we can enable our port clocks */
320 utmi_clk
= readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL
);
321 utmi_clk
|= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK
;
322 setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL
, utmi_clk
);
324 ret
= omap_ehci_hcd_init(index
, &usbhs_bdata
, hccr
, hcor
);
331 int ehci_hcd_stop(int index
)
333 return omap_ehci_hcd_stop();
338 * get_board_rev() - get board revision
340 u32
get_board_rev(void)