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[thirdparty/u-boot.git] / board / toradex / apalis-tk1 / apalis-tk1.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2016-2018 Toradex, Inc.
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <env.h>
9 #include <init.h>
10 #include <asm/arch-tegra/ap.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include <asm/arch/gpio.h>
14 #include <asm/arch/pinmux.h>
15 #include <env_internal.h>
16 #include <pci_tegra.h>
17 #include <power/as3722.h>
18 #include <power/pmic.h>
19
20 #include "../common/tdx-common.h"
21 #include "pinmux-config-apalis-tk1.h"
22
23 #define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
24 #define LAN_RESET_N TEGRA_GPIO(S, 2)
25 #define FAN_EN TEGRA_GPIO(DD, 2)
26 #define LAN_WAKE_N TEGRA_GPIO(O, 5)
27 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
28 #define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
29 #define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
30 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
31 #define VCC_USBH TEGRA_GPIO(T, 6)
32 #define VCC_USBH_V1_0 TEGRA_GPIO(N, 5)
33 #define VCC_USBO1 TEGRA_GPIO(T, 5)
34 #define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4)
35
36 int arch_misc_init(void)
37 {
38 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
39 NVBOOTTYPE_RECOVERY)
40 printf("USB recovery mode\n");
41
42 /* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */
43 gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication");
44 gpio_direction_input(TEGRA_GPIO(V, 0));
45 if (gpio_get_value(TEGRA_GPIO(V, 0))) {
46 /*
47 * if using the default device tree for new V1.2 and later HW,
48 * use version for older V1.0 and V1.1 HW
49 */
50 char *fdt_env = env_get("fdt_module");
51
52 if (fdt_env && !strcmp(FDT_MODULE, fdt_env)) {
53 env_set("fdt_module", FDT_MODULE_V1_0);
54 printf("patching fdt_module to " FDT_MODULE_V1_0
55 " for older V1.0 and V1.1 HW\n");
56 #ifndef CONFIG_ENV_IS_NOWHERE
57 env_save();
58 #endif
59 }
60
61 /* activate USB power enable GPIOs */
62 gpio_request(VCC_USBH_V1_0, "VCC_USBH");
63 gpio_direction_output(VCC_USBH_V1_0, 1);
64 gpio_request(VCC_USBO1_V1_0, "VCC_USBO1");
65 gpio_direction_output(VCC_USBO1_V1_0, 1);
66 } else {
67 /* activate USB power enable GPIOs */
68 gpio_request(VCC_USBH, "VCC_USBH");
69 gpio_direction_output(VCC_USBH, 1);
70 gpio_request(VCC_USBO1, "VCC_USBO1");
71 gpio_direction_output(VCC_USBO1, 1);
72 }
73
74 return 0;
75 }
76
77 int checkboard(void)
78 {
79 puts("Model: Toradex Apalis TK1 2GB\n");
80
81 return 0;
82 }
83
84 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
85 int ft_board_setup(void *blob, bd_t *bd)
86 {
87 return ft_common_board_setup(blob, bd);
88 }
89 #endif
90
91 /*
92 * Routine: pinmux_init
93 * Description: Do individual peripheral pinmux configs
94 */
95 void pinmux_init(void)
96 {
97 pinmux_clear_tristate_input_clamping();
98
99 gpio_config_table(apalis_tk1_gpio_inits,
100 ARRAY_SIZE(apalis_tk1_gpio_inits));
101
102 pinmux_config_pingrp_table(apalis_tk1_pingrps,
103 ARRAY_SIZE(apalis_tk1_pingrps));
104
105 pinmux_config_drvgrp_table(apalis_tk1_drvgrps,
106 ARRAY_SIZE(apalis_tk1_drvgrps));
107 }
108
109 #ifdef CONFIG_PCI_TEGRA
110 /* TODO: Convert to driver model */
111 static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
112 {
113 int err;
114
115 if (sd > 6)
116 return -EINVAL;
117
118 err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
119 if (err) {
120 pr_err("failed to update SD control register: %d", err);
121 return err;
122 }
123
124 return 0;
125 }
126
127 /* TODO: Convert to driver model */
128 static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
129 {
130 int err;
131 u8 ctrl_reg = AS3722_LDO_CONTROL0;
132
133 if (ldo > 11)
134 return -EINVAL;
135
136 if (ldo > 7) {
137 ctrl_reg = AS3722_LDO_CONTROL1;
138 ldo -= 8;
139 }
140
141 err = pmic_clrsetbits(pmic, ctrl_reg, 0, 1 << ldo);
142 if (err) {
143 pr_err("failed to update LDO control register: %d", err);
144 return err;
145 }
146
147 return 0;
148 }
149
150 int tegra_pcie_board_init(void)
151 {
152 struct udevice *dev;
153 int ret;
154
155 ret = uclass_get_device_by_driver(UCLASS_PMIC,
156 DM_GET_DRIVER(pmic_as3722), &dev);
157 if (ret) {
158 pr_err("failed to find AS3722 PMIC: %d\n", ret);
159 return ret;
160 }
161
162 ret = as3722_sd_enable(dev, 4);
163 if (ret < 0) {
164 pr_err("failed to enable SD4: %d\n", ret);
165 return ret;
166 }
167
168 ret = as3722_sd_set_voltage(dev, 4, 0x24);
169 if (ret < 0) {
170 pr_err("failed to set SD4 voltage: %d\n", ret);
171 return ret;
172 }
173
174 gpio_request(LAN_DEV_OFF_N, "LAN_DEV_OFF_N");
175 gpio_request(LAN_RESET_N, "LAN_RESET_N");
176 gpio_request(LAN_WAKE_N, "LAN_WAKE_N");
177
178 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
179 gpio_request(PEX_PERST_N, "PEX_PERST_N");
180 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
181 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
182
183 return 0;
184 }
185
186 void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
187 {
188 int index = tegra_pcie_port_index_of_port(port);
189
190 if (index == 1) { /* I210 Gigabit Ethernet Controller (On-module) */
191 struct udevice *dev;
192 int ret;
193
194 ret = uclass_get_device_by_driver(UCLASS_PMIC,
195 DM_GET_DRIVER(pmic_as3722),
196 &dev);
197 if (ret) {
198 debug("%s: Failed to find PMIC\n", __func__);
199 return;
200 }
201
202 /* Reset I210 Gigabit Ethernet Controller */
203 gpio_direction_output(LAN_RESET_N, 0);
204
205 /*
206 * Make sure we don't get any back feeding from DEV_OFF_N resp.
207 * LAN_WAKE_N
208 */
209 gpio_direction_output(LAN_DEV_OFF_N, 0);
210 gpio_direction_output(LAN_WAKE_N, 0);
211
212 /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
213 ret = as3722_ldo_enable(dev, 9);
214 if (ret < 0) {
215 pr_err("failed to enable LDO9: %d\n", ret);
216 return;
217 }
218 ret = as3722_ldo_enable(dev, 10);
219 if (ret < 0) {
220 pr_err("failed to enable LDO10: %d\n", ret);
221 return;
222 }
223 ret = as3722_ldo_set_voltage(dev, 9, 0x80);
224 if (ret < 0) {
225 pr_err("failed to set LDO9 voltage: %d\n", ret);
226 return;
227 }
228 ret = as3722_ldo_set_voltage(dev, 10, 0x80);
229 if (ret < 0) {
230 pr_err("failed to set LDO10 voltage: %d\n", ret);
231 return;
232 }
233
234 /* Make sure controller gets enabled by disabling DEV_OFF_N */
235 gpio_set_value(LAN_DEV_OFF_N, 1);
236
237 /*
238 * Enable LDO9 and LDO10 for +V3.3_ETH on patched prototype
239 * V1.0A and sample V1.0B and newer modules
240 */
241 ret = as3722_ldo_set_voltage(dev, 9, 0xff);
242 if (ret < 0) {
243 pr_err("failed to set LDO9 voltage: %d\n", ret);
244 return;
245 }
246 ret = as3722_ldo_set_voltage(dev, 10, 0xff);
247 if (ret < 0) {
248 pr_err("failed to set LDO10 voltage: %d\n", ret);
249 return;
250 }
251
252 /*
253 * Must be asserted for 100 ms after power and clocks are stable
254 */
255 mdelay(100);
256
257 gpio_set_value(LAN_RESET_N, 1);
258 } else if (index == 0) { /* Apalis PCIe */
259 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
260 /*
261 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis
262 * Evaluation Board
263 */
264 gpio_direction_output(PEX_PERST_N, 0);
265 gpio_direction_output(RESET_MOCI_CTRL, 0);
266
267 /*
268 * Must be asserted for 100 ms after power and clocks are stable
269 */
270 mdelay(100);
271
272 gpio_set_value(PEX_PERST_N, 1);
273 /*
274 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed
275 * Until 900 us After PEX_PERST# De-assertion
276 */
277 mdelay(1);
278 gpio_set_value(RESET_MOCI_CTRL, 1);
279 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
280 }
281 }
282 #endif /* CONFIG_PCI_TEGRA */
283
284 /*
285 * Enable/start PWM CPU fan
286 */
287 void start_cpu_fan(void)
288 {
289 gpio_request(FAN_EN, "FAN_EN");
290 gpio_direction_output(FAN_EN, 1);
291 }
292
293 /*
294 * Backlight off before OS handover
295 */
296 void board_preboot_os(void)
297 {
298 gpio_request(TEGRA_GPIO(BB, 5), "BL_ON");
299 gpio_direction_output(TEGRA_GPIO(BB, 5), 0);
300 }