]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/toradex/colibri_pxa270/colibri_pxa270.c
c1e25623488d63ae2f3c7c0f72ca6d59d1dec894
2 * Toradex Colibri PXA270 Support
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
6 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/hardware.h>
11 #include <asm/arch/regs-mmc.h>
12 #include <asm/arch/pxa.h>
17 DECLARE_GLOBAL_DATA_PTR
;
21 /* We have RAM, disable cache */
25 /* arch number of vpac270 */
26 gd
->bd
->bi_arch_number
= MACH_TYPE_COLIBRI
;
28 /* adress of boot parameters */
29 gd
->bd
->bi_boot_params
= 0xa0000100;
37 gd
->ram_size
= PHYS_SDRAM_1_SIZE
;
42 int usb_board_init(void)
44 writel((readl(UHCHR
) | UHCHR_PCPL
| UHCHR_PSPL
) &
45 ~(UHCHR_SSEP0
| UHCHR_SSEP1
| UHCHR_SSEP2
| UHCHR_SSE
),
48 writel(readl(UHCHR
) | UHCHR_FSBIR
, UHCHR
);
50 while (UHCHR
& UHCHR_FSBIR
)
53 writel(readl(UHCHR
) & ~UHCHR_SSE
, UHCHR
);
54 writel((UHCHIE_UPRIE
| UHCHIE_RWIE
), UHCHIE
);
56 /* Clear any OTG Pin Hold */
57 if (readl(PSSR
) & PSSR_OTGPH
)
58 writel(readl(PSSR
) | PSSR_OTGPH
, PSSR
);
60 writel(readl(UHCRHDA
) & ~(0x200), UHCRHDA
);
61 writel(readl(UHCRHDA
) | 0x100, UHCRHDA
);
63 /* Set port power control mask bits, only 3 ports. */
64 writel(readl(UHCRHDB
) | (0x7<<17), UHCRHDB
);
67 writel(readl(UP2OCR
) | UP2OCR_HXOE
| UP2OCR_HXS
|
68 UP2OCR_DMPDE
| UP2OCR_DPPDE
, UP2OCR
);
73 void usb_board_init_fail(void)
78 void usb_board_stop(void)
80 writel(readl(UHCHR
) | UHCHR_FHR
, UHCHR
);
82 writel(readl(UHCHR
) & ~UHCHR_FHR
, UHCHR
);
84 writel(readl(UHCCOMS
) | 1, UHCCOMS
);
87 writel(readl(CKEN
) & ~CKEN10_USBHOST
, CKEN
);
93 #ifdef CONFIG_DRIVER_DM9000
94 int board_eth_init(bd_t
*bis
)
96 return dm9000_initialize(bis
);
100 #ifdef CONFIG_CMD_MMC
101 int board_mmc_init(bd_t
*bis
)