board/vpac270/vpac270.c

   1 /*
   2  * Voipac PXA270 Support
   3  *
   4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #include <common.h>
  23 #include <asm/arch/hardware.h>
  24 #include <netdev.h>
  25 #include <serial.h>
  26 #include <asm/io.h>
  27
  28 DECLARE_GLOBAL_DATA_PTR;
  29
  30 /*
  31  * Miscelaneous platform dependent initialisations
  32  */
  33 int board_init(void)
  34 {
  35         /* We have RAM, disable cache */
  36         dcache_disable();
  37         icache_disable();
  38
  39         /* memory and cpu-speed are setup before relocation */
  40         /* so we do _nothing_ here */
  41
  42         /* Arch number of vpac270 */
  43         gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
  44
  45         /* adress of boot parameters */
  46         gd->bd->bi_boot_params = 0xa0000100;
  47
  48         return 0;
  49 }
  50
  51 struct serial_device *default_serial_console(void)
  52 {
  53         return &serial_ffuart_device;
  54 }
  55
  56 extern void pxa_dram_init(void);
  57 int dram_init(void)
  58 {
  59         pxa_dram_init();
  60         gd->ram_size = PHYS_SDRAM_1_SIZE;
  61         return 0;
  62 }
  63
  64 void dram_init_banksize(void)
  65 {
  66         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  67         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  68
  69 #ifdef  CONFIG_RAM_256M
  70         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  71         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  72 #endif
  73 }
  74
  75 #ifdef  CONFIG_CMD_USB
  76 int usb_board_init(void)
  77 {
  78         writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
  79                 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
  80                 UHCHR);
  81
  82         writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
  83
  84         while (readl(UHCHR) & UHCHR_FSBIR)
  85                 ;
  86
  87         writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
  88         writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
  89
  90         /* Clear any OTG Pin Hold */
  91         if (readl(PSSR) & PSSR_OTGPH)
  92                 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
  93
  94         writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
  95         writel(readl(UHCRHDA) | 0x100, UHCRHDA);
  96
  97         /* Set port power control mask bits, only 3 ports. */
  98         writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
  99
 100         /* enable port 2 */
 101         writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
 102                 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
 103
 104         return 0;
 105 }
 106
 107 void usb_board_init_fail(void)
 108 {
 109         return;
 110 }
 111
 112 void usb_board_stop(void)
 113 {
 114         writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
 115         udelay(11);
 116         writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 117
 118         writel(readl(UHCCOMS) | 1, UHCCOMS);
 119         udelay(10);
 120
 121         writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 122
 123         return;
 124 }
 125 #endif
 126
 127 #ifdef CONFIG_DRIVER_DM9000
 128 int board_eth_init(bd_t *bis)
 129 {
 130         return dm9000_initialize(bis);
 131 }
 132 #endif