board/warp/warp.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
   4  * Copyright (C) 2014 Kynetics LLC.
   5  * Copyright (C) 2014 Revolution Robotics, Inc.
   6  *
   7  * Author: Otavio Salvador <otavio@ossystems.com.br>
   8  */
   9
  10 #include <asm/arch/clock.h>
  11 #include <asm/arch/iomux.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <asm/arch/mx6-pins.h>
  14 #include <asm/arch/sys_proto.h>
  15 #include <asm/gpio.h>
  16 #include <asm/mach-imx/iomux-v3.h>
  17 #include <asm/mach-imx/mxc_i2c.h>
  18 #include <asm/io.h>
  19 #include <linux/sizes.h>
  20 #include <common.h>
  21 #include <watchdog.h>
  22 #include <fsl_esdhc_imx.h>
  23 #include <i2c.h>
  24 #include <mmc.h>
  25 #include <usb.h>
  26 #include <power/pmic.h>
  27 #include <power/max77696_pmic.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
  32         PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
  33         PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
  34         PAD_CTL_LVE)
  35
  36 #define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
  37         PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
  38         PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
  39         PAD_CTL_LVE)
  40
  41 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |               \
  42                       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  43                       PAD_CTL_DSE_40ohm | PAD_CTL_HYS |         \
  44                       PAD_CTL_ODE | PAD_CTL_SRE_FAST)
  45
  46 int dram_init(void)
  47 {
  48         gd->ram_size = imx_ddr_size();
  49
  50         return 0;
  51 }
  52
  53 static void setup_iomux_uart(void)
  54 {
  55         static iomux_v3_cfg_t const uart1_pads[] = {
  56                 MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
  57                 MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
  58         };
  59
  60         imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  61 }
  62
  63 static struct fsl_esdhc_cfg usdhc_cfg[1] = {
  64         {USDHC2_BASE_ADDR, 0, 0, 0, 1},
  65 };
  66
  67 int board_mmc_getcd(struct mmc *mmc)
  68 {
  69         return 1;       /* Assume boot SD always present */
  70 }
  71
  72 int board_mmc_init(bd_t *bis)
  73 {
  74         static iomux_v3_cfg_t const usdhc2_pads[] = {
  75                 MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  76                 MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  77                 MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  78                 MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  79                 MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  80                 MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  81                 MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  82                 MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  83                 MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  84                 MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  85                 MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
  86         };
  87
  88         imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
  89
  90         usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
  91         return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
  92 }
  93
  94 int board_usb_phy_mode(int port)
  95 {
  96         return USB_INIT_DEVICE;
  97 }
  98
  99 /* I2C1 for PMIC */
 100 #define I2C_PMIC        0
 101 #define PC      MUX_PAD_CTRL(I2C_PAD_CTRL)
 102 struct i2c_pads_info i2c_pad_info1 = {
 103         .sda = {
 104                 .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
 105                 .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
 106                 .gp = IMX_GPIO_NR(3, 13),
 107         },
 108         .scl = {
 109                 .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
 110                 .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
 111                 .gp = IMX_GPIO_NR(3, 12),
 112         },
 113 };
 114
 115 int power_init_board(void)
 116 {
 117         struct pmic *p;
 118         int ret;
 119         unsigned int reg;
 120
 121         ret = power_max77696_init(I2C_PMIC);
 122         if (ret)
 123                 return ret;
 124
 125         p = pmic_get("MAX77696");
 126         if (!p)
 127                 return -EINVAL;
 128
 129         ret = pmic_reg_read(p, CID, &reg);
 130         if (ret)
 131                 return ret;
 132
 133         printf("PMIC:  MAX77696 detected, rev=0x%x\n", reg);
 134
 135         return pmic_probe(p);
 136 }
 137
 138 int board_early_init_f(void)
 139 {
 140         setup_iomux_uart();
 141         return 0;
 142 }
 143
 144 int board_init(void)
 145 {
 146         /* address of boot parameters */
 147         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 148
 149         setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 150
 151         return 0;
 152 }
 153
 154 int board_late_init(void)
 155 {
 156 #ifdef CONFIG_HW_WATCHDOG
 157         hw_watchdog_init();
 158 #endif
 159
 160         return 0;
 161 }
 162
 163 int checkboard(void)
 164 {
 165         puts("Board: WaRP Board\n");
 166
 167         return 0;
 168 }