]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/xilinx/zynq/board.c
427e75485deb9e10fc9152c0f16bbf9bc46f44f1
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/sys_proto.h>
16 DECLARE_GLOBAL_DATA_PTR
;
18 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
19 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
20 static xilinx_desc fpga
;
22 /* It can be done differently */
23 static xilinx_desc fpga010
= XILINX_XC7Z010_DESC(0x10);
24 static xilinx_desc fpga015
= XILINX_XC7Z015_DESC(0x15);
25 static xilinx_desc fpga020
= XILINX_XC7Z020_DESC(0x20);
26 static xilinx_desc fpga030
= XILINX_XC7Z030_DESC(0x30);
27 static xilinx_desc fpga035
= XILINX_XC7Z035_DESC(0x35);
28 static xilinx_desc fpga045
= XILINX_XC7Z045_DESC(0x45);
29 static xilinx_desc fpga100
= XILINX_XC7Z100_DESC(0x100);
34 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
35 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
38 idcode
= zynq_slcr_get_idcode();
41 case XILINX_ZYNQ_7010
:
44 case XILINX_ZYNQ_7015
:
47 case XILINX_ZYNQ_7020
:
50 case XILINX_ZYNQ_7030
:
53 case XILINX_ZYNQ_7035
:
56 case XILINX_ZYNQ_7045
:
59 case XILINX_ZYNQ_7100
:
65 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
66 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
68 fpga_add(fpga_xilinx
, &fpga
);
74 int board_late_init(void)
76 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK
) {
78 setenv("modeboot", "norboot");
81 setenv("modeboot", "sdboot");
84 setenv("modeboot", "jtagboot");
87 setenv("modeboot", "");
94 #ifdef CONFIG_DISPLAY_BOARDINFO
97 puts("Board:\tXilinx Zynq\n");
102 int board_eth_init(bd_t
*bis
)
106 #ifdef CONFIG_XILINX_EMACLITE
109 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
112 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
115 ret
|= xilinx_emaclite_initialize(bis
, XILINX_EMACLITE_BASEADDR
,
123 #if CONFIG_IS_ENABLED(OF_CONTROL)
127 const void *blob
= gd
->fdt_blob
;
129 node
= fdt_node_offset_by_prop_value(blob
, -1, "device_type",
131 if (node
== -FDT_ERR_NOTFOUND
) {
132 debug("ZYNQ DRAM: Can't get memory node\n");
135 addr
= fdtdec_get_addr_size(blob
, node
, "reg", &size
);
136 if (addr
== FDT_ADDR_T_NONE
|| size
== 0) {
137 debug("ZYNQ DRAM: Can't get base address or size\n");
142 gd
->ram_size
= CONFIG_SYS_SDRAM_SIZE
;