board/xilinx/zynq/board.c

   1 /*
   2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <netdev.h>
   9 #include <zynqpl.h>
  10 #include <asm/arch/hardware.h>
  11 #include <asm/arch/sys_proto.h>
  12
  13 DECLARE_GLOBAL_DATA_PTR;
  14
  15 #ifdef CONFIG_FPGA
  16 Xilinx_desc fpga;
  17
  18 /* It can be done differently */
  19 Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
  20 Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
  21 Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
  22 Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
  23 #endif
  24
  25 int board_init(void)
  26 {
  27 #ifdef CONFIG_FPGA
  28         u32 idcode;
  29
  30         idcode = zynq_slcr_get_idcode();
  31
  32         switch (idcode) {
  33         case XILINX_ZYNQ_7010:
  34                 fpga = fpga010;
  35                 break;
  36         case XILINX_ZYNQ_7020:
  37                 fpga = fpga020;
  38                 break;
  39         case XILINX_ZYNQ_7030:
  40                 fpga = fpga030;
  41                 break;
  42         case XILINX_ZYNQ_7045:
  43                 fpga = fpga045;
  44                 break;
  45         }
  46 #endif
  47
  48         icache_enable();
  49
  50 #ifdef CONFIG_FPGA
  51         fpga_init();
  52         fpga_add(fpga_xilinx, &fpga);
  53 #endif
  54
  55         return 0;
  56 }
  57
  58
  59 #ifdef CONFIG_CMD_NET
  60 int board_eth_init(bd_t *bis)
  61 {
  62         u32 ret = 0;
  63
  64 #if defined(CONFIG_ZYNQ_GEM)
  65 # if defined(CONFIG_ZYNQ_GEM0)
  66         ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
  67                                                 CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
  68 # endif
  69 # if defined(CONFIG_ZYNQ_GEM1)
  70         ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
  71                                                 CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
  72 # endif
  73 #endif
  74         return ret;
  75 }
  76 #endif
  77
  78 #ifdef CONFIG_CMD_MMC
  79 int board_mmc_init(bd_t *bd)
  80 {
  81         int ret = 0;
  82
  83 #if defined(CONFIG_ZYNQ_SDHCI)
  84 # if defined(CONFIG_ZYNQ_SDHCI0)
  85         ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
  86 # endif
  87 # if defined(CONFIG_ZYNQ_SDHCI1)
  88         ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
  89 # endif
  90 #endif
  91         return ret;
  92 }
  93 #endif
  94
  95 int dram_init(void)
  96 {
  97         gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  98
  99         return 0;
 100 }