2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/hardware.h>
11 #include <asm/arch/sys_proto.h>
13 DECLARE_GLOBAL_DATA_PTR
;
18 /* It can be done differently */
19 Xilinx_desc fpga010
= XILINX_XC7Z010_DESC(0x10);
20 Xilinx_desc fpga020
= XILINX_XC7Z020_DESC(0x20);
21 Xilinx_desc fpga030
= XILINX_XC7Z030_DESC(0x30);
22 Xilinx_desc fpga045
= XILINX_XC7Z045_DESC(0x45);
23 Xilinx_desc fpga100
= XILINX_XC7Z100_DESC(0x100);
31 idcode
= zynq_slcr_get_idcode();
34 case XILINX_ZYNQ_7010
:
37 case XILINX_ZYNQ_7020
:
40 case XILINX_ZYNQ_7030
:
43 case XILINX_ZYNQ_7045
:
46 case XILINX_ZYNQ_7100
:
56 fpga_add(fpga_xilinx
, &fpga
);
64 int board_eth_init(bd_t
*bis
)
68 #ifdef CONFIG_XILINX_AXIEMAC
69 ret
|= xilinx_axiemac_initialize(bis
, XILINX_AXIEMAC_BASEADDR
,
70 XILINX_AXIDMA_BASEADDR
);
72 #ifdef CONFIG_XILINX_EMACLITE
75 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
78 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
81 ret
|= xilinx_emaclite_initialize(bis
, XILINX_EMACLITE_BASEADDR
,
85 #if defined(CONFIG_ZYNQ_GEM)
86 # if defined(CONFIG_ZYNQ_GEM0)
87 ret
|= zynq_gem_initialize(bis
, ZYNQ_GEM_BASEADDR0
,
88 CONFIG_ZYNQ_GEM_PHY_ADDR0
, 0);
90 # if defined(CONFIG_ZYNQ_GEM1)
91 ret
|= zynq_gem_initialize(bis
, ZYNQ_GEM_BASEADDR1
,
92 CONFIG_ZYNQ_GEM_PHY_ADDR1
, 0);
100 int board_mmc_init(bd_t
*bd
)
104 #if defined(CONFIG_ZYNQ_SDHCI)
105 # if defined(CONFIG_ZYNQ_SDHCI0)
106 ret
= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0
);
108 # if defined(CONFIG_ZYNQ_SDHCI1)
109 ret
|= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1
);
118 gd
->ram_size
= CONFIG_SYS_SDRAM_SIZE
;