]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/zipitz2/zipitz2.c
3 * Marek Vasut <marek.vasut@gmail.com>
5 * Heavily based on pxa255_idp platform
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/pxa.h>
15 #include <asm/arch/regs-mmc.h>
20 DECLARE_GLOBAL_DATA_PTR
;
25 inline void lcd_start(void) {};
29 * Miscelaneous platform dependent initialisations
33 /* We have RAM, disable cache */
37 /* arch number of Z2 */
38 gd
->bd
->bi_arch_number
= MACH_TYPE_ZIPIT2
;
40 /* adress of boot parameters */
41 gd
->bd
->bi_boot_params
= 0xa0000100;
52 gd
->ram_size
= PHYS_SDRAM_1_SIZE
;
57 int board_usb_init(int index
, enum usb_init_type init
)
60 writel(readl(UP2OCR
) | UP2OCR_HXOE
| UP2OCR_HXS
|
61 UP2OCR_DMPDE
| UP2OCR_DPPDE
, UP2OCR
);
66 int board_usb_cleanup(int index
, enum usb_init_type init
)
71 void usb_board_stop(void)
76 void dram_init_banksize(void)
78 gd
->bd
->bi_dram
[0].start
= PHYS_SDRAM_1
;
79 gd
->bd
->bi_dram
[0].size
= PHYS_SDRAM_1_SIZE
;
83 int board_mmc_init(bd_t
*bis
)
102 { 0x13, 0x0040, 50 },
104 { 0x13, 0x0070, 200 },
130 { 0x07, 0x0015, 30 },
137 void zipitz2_spi_sda(int set
)
141 writel((1 << 13), GPSR0
);
143 writel((1 << 13), GPCR0
);
146 void zipitz2_spi_scl(int set
)
150 writel((1 << 22), GPCR0
);
152 writel((1 << 22), GPSR0
);
155 unsigned char zipitz2_spi_read(void)
158 return !!(readl(GPLR1
) & (1 << 8));
161 int spi_cs_is_valid(unsigned int bus
, unsigned int cs
)
167 void spi_cs_activate(struct spi_slave
*slave
)
170 writel((1 << 24), GPCR2
);
173 void spi_cs_deactivate(struct spi_slave
*slave
)
176 writel((1 << 24), GPSR2
);
182 unsigned char reg
[3] = { 0x74, 0x00, 0 };
183 unsigned char data
[3] = { 0x76, 0, 0 };
184 unsigned char dummy
[3] = { 0, 0, 0 };
187 writel(readl(GAFR0_L
) | 0x00800000, GAFR0_L
);
188 /* Enable clock to all PWM */
189 writel(readl(CKEN
) | 0x3, CKEN
);
191 writel(0x4f, PWM_CTRL2
);
192 writel(0x2ff, PWM_PWDUTY2
);
193 writel(792, PWM_PERVAL2
);
195 /* Toggle the reset pin to reset the LCD */
196 writel((1 << 19), GPSR0
);
198 writel((1 << 19), GPCR0
);
200 writel((1 << 19), GPSR0
);
203 /* Program the LCD init sequence */
204 for (i
= 0; i
< sizeof(lcd_data
) / sizeof(lcd_data
[0]); i
++) {
207 reg
[2] = lcd_data
[i
].reg
;
208 spi_xfer(NULL
, 24, reg
, dummy
, SPI_XFER_BEGIN
| SPI_XFER_END
);
211 data
[1] = lcd_data
[i
].data
>> 8;
212 data
[2] = lcd_data
[i
].data
& 0xff;
213 spi_xfer(NULL
, 24, data
, dummy
, SPI_XFER_BEGIN
| SPI_XFER_END
);
215 if (lcd_data
[i
].mdelay
)
216 udelay(lcd_data
[i
].mdelay
* 1000);
219 writel((1 << 11), GPSR0
);