1 // SPDX-License-Identifier: GPL-2.0+
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
15 typedef struct _MII_reg_desc_t
{
20 static const MII_reg_desc_t reg_0_5_desc_tbl
[] = {
21 { MII_BMCR
, "PHY control register" },
22 { MII_BMSR
, "PHY status register" },
23 { MII_PHYSID1
, "PHY ID 1 register" },
24 { MII_PHYSID2
, "PHY ID 2 register" },
25 { MII_ADVERTISE
, "Autonegotiation advertisement register" },
26 { MII_LPA
, "Autonegotiation partner abilities register" },
29 typedef struct _MII_field_desc_t
{
36 static const MII_field_desc_t reg_0_desc_tbl
[] = {
37 { 15, 15, 0x01, "reset" },
38 { 14, 14, 0x01, "loopback" },
39 { 13, 6, 0x81, "speed selection" }, /* special */
40 { 12, 12, 0x01, "A/N enable" },
41 { 11, 11, 0x01, "power-down" },
42 { 10, 10, 0x01, "isolate" },
43 { 9, 9, 0x01, "restart A/N" },
44 { 8, 8, 0x01, "duplex" }, /* special */
45 { 7, 7, 0x01, "collision test enable" },
46 { 5, 0, 0x3f, "(reserved)" }
49 static const MII_field_desc_t reg_1_desc_tbl
[] = {
50 { 15, 15, 0x01, "100BASE-T4 able" },
51 { 14, 14, 0x01, "100BASE-X full duplex able" },
52 { 13, 13, 0x01, "100BASE-X half duplex able" },
53 { 12, 12, 0x01, "10 Mbps full duplex able" },
54 { 11, 11, 0x01, "10 Mbps half duplex able" },
55 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
56 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
57 { 8, 8, 0x01, "extended status" },
58 { 7, 7, 0x01, "(reserved)" },
59 { 6, 6, 0x01, "MF preamble suppression" },
60 { 5, 5, 0x01, "A/N complete" },
61 { 4, 4, 0x01, "remote fault" },
62 { 3, 3, 0x01, "A/N able" },
63 { 2, 2, 0x01, "link status" },
64 { 1, 1, 0x01, "jabber detect" },
65 { 0, 0, 0x01, "extended capabilities" },
68 static const MII_field_desc_t reg_2_desc_tbl
[] = {
69 { 15, 0, 0xffff, "OUI portion" },
72 static const MII_field_desc_t reg_3_desc_tbl
[] = {
73 { 15, 10, 0x3f, "OUI portion" },
74 { 9, 4, 0x3f, "manufacturer part number" },
75 { 3, 0, 0x0f, "manufacturer rev. number" },
78 static const MII_field_desc_t reg_4_desc_tbl
[] = {
79 { 15, 15, 0x01, "next page able" },
80 { 14, 14, 0x01, "(reserved)" },
81 { 13, 13, 0x01, "remote fault" },
82 { 12, 12, 0x01, "(reserved)" },
83 { 11, 11, 0x01, "asymmetric pause" },
84 { 10, 10, 0x01, "pause enable" },
85 { 9, 9, 0x01, "100BASE-T4 able" },
86 { 8, 8, 0x01, "100BASE-TX full duplex able" },
87 { 7, 7, 0x01, "100BASE-TX able" },
88 { 6, 6, 0x01, "10BASE-T full duplex able" },
89 { 5, 5, 0x01, "10BASE-T able" },
90 { 4, 0, 0x1f, "xxx to do" },
93 static const MII_field_desc_t reg_5_desc_tbl
[] = {
94 { 15, 15, 0x01, "next page able" },
95 { 14, 14, 0x01, "acknowledge" },
96 { 13, 13, 0x01, "remote fault" },
97 { 12, 12, 0x01, "(reserved)" },
98 { 11, 11, 0x01, "asymmetric pause able" },
99 { 10, 10, 0x01, "pause able" },
100 { 9, 9, 0x01, "100BASE-T4 able" },
101 { 8, 8, 0x01, "100BASE-X full duplex able" },
102 { 7, 7, 0x01, "100BASE-TX able" },
103 { 6, 6, 0x01, "10BASE-T full duplex able" },
104 { 5, 5, 0x01, "10BASE-T able" },
105 { 4, 0, 0x1f, "xxx to do" },
107 typedef struct _MII_field_desc_and_len_t
{
108 const MII_field_desc_t
*pdesc
;
110 } MII_field_desc_and_len_t
;
112 static const MII_field_desc_and_len_t desc_and_len_tbl
[] = {
113 { reg_0_desc_tbl
, ARRAY_SIZE(reg_0_desc_tbl
) },
114 { reg_1_desc_tbl
, ARRAY_SIZE(reg_1_desc_tbl
) },
115 { reg_2_desc_tbl
, ARRAY_SIZE(reg_2_desc_tbl
) },
116 { reg_3_desc_tbl
, ARRAY_SIZE(reg_3_desc_tbl
) },
117 { reg_4_desc_tbl
, ARRAY_SIZE(reg_4_desc_tbl
) },
118 { reg_5_desc_tbl
, ARRAY_SIZE(reg_5_desc_tbl
) },
121 static void dump_reg(
123 const MII_reg_desc_t
*prd
,
124 const MII_field_desc_and_len_t
*pdl
);
126 static int special_field(
128 const MII_field_desc_t
*pdesc
,
131 static void MII_dump_0_to_5(
138 for (i
= 0; i
< 6; i
++) {
139 if ((reglo
<= i
) && (i
<= reghi
))
140 dump_reg(regvals
[i
], ®_0_5_desc_tbl
[i
],
141 &desc_and_len_tbl
[i
]);
145 static void dump_reg(
147 const MII_reg_desc_t
*prd
,
148 const MII_field_desc_and_len_t
*pdl
)
151 ushort mask_in_place
;
152 const MII_field_desc_t
*pdesc
;
154 printf("%u. (%04hx) -- %s --\n",
155 prd
->regno
, regval
, prd
->name
);
157 for (i
= 0; i
< pdl
->len
; i
++) {
158 pdesc
= &pdl
->pdesc
[i
];
160 mask_in_place
= pdesc
->mask
<< pdesc
->lo
;
162 printf(" (%04hx:%04x) %u.",
164 regval
& mask_in_place
,
167 if (special_field(prd
->regno
, pdesc
, regval
)) {
170 if (pdesc
->hi
== pdesc
->lo
)
171 printf("%2u ", pdesc
->lo
);
173 printf("%2u-%2u", pdesc
->hi
, pdesc
->lo
);
175 (regval
& mask_in_place
) >> pdesc
->lo
,
193 static int special_field(
195 const MII_field_desc_t
*pdesc
,
198 if ((regno
== MII_BMCR
) && (pdesc
->lo
== 6)) {
199 ushort speed_bits
= regval
& (BMCR_SPEED1000
| BMCR_SPEED100
);
200 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
204 speed_bits
== BMCR_SPEED1000
? "1000" :
205 speed_bits
== BMCR_SPEED100
? "100" :
210 else if ((regno
== MII_BMCR
) && (pdesc
->lo
== 8)) {
211 printf("%2u = %5u duplex = %s",
213 (regval
>> pdesc
->lo
) & 1,
214 ((regval
>> pdesc
->lo
) & 1) ? "full" : "half");
218 else if ((regno
== MII_ADVERTISE
) && (pdesc
->lo
== 0)) {
219 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
220 printf("%2u-%2u = %5u selector = %s",
221 pdesc
->hi
, pdesc
->lo
, sel_bits
,
222 sel_bits
== PHY_ANLPAR_PSB_802_3
?
224 sel_bits
== PHY_ANLPAR_PSB_802_9
?
225 "IEEE 802.9 ISLAN-16T" :
230 else if ((regno
== MII_LPA
) && (pdesc
->lo
== 0)) {
231 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
232 printf("%2u-%2u = %u selector = %s",
233 pdesc
->hi
, pdesc
->lo
, sel_bits
,
234 sel_bits
== PHY_ANLPAR_PSB_802_3
?
236 sel_bits
== PHY_ANLPAR_PSB_802_9
?
237 "IEEE 802.9 ISLAN-16T" :
245 static char last_op
[2];
246 static uint last_data
;
247 static uint last_addr_lo
;
248 static uint last_addr_hi
;
249 static uint last_reg_lo
;
250 static uint last_reg_hi
;
251 static uint last_mask
;
253 static void extract_range(
259 *plo
= simple_strtoul(input
, &end
, 16);
262 *phi
= simple_strtoul(end
, NULL
, 16);
269 /* ---------------------------------------------------------------- */
270 static int do_mii(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
273 unsigned char addrlo
, addrhi
, reglo
, reghi
;
274 unsigned char addr
, reg
;
275 unsigned short data
, mask
;
280 return CMD_RET_USAGE
;
282 #if defined(CONFIG_MII_INIT)
287 * We use the last specified parameters, unless new ones are
292 addrlo
= last_addr_lo
;
293 addrhi
= last_addr_hi
;
299 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
301 if (strlen(argv
[1]) > 1)
307 extract_range(argv
[2], &addrlo
, &addrhi
);
309 extract_range(argv
[3], ®lo
, ®hi
);
311 data
= simple_strtoul(argv
[4], NULL
, 16);
313 mask
= simple_strtoul(argv
[5], NULL
, 16);
317 printf("Incorrect PHY address. Range should be 0-31\n");
318 return CMD_RET_USAGE
;
321 /* use current device */
322 devname
= miiphy_get_current_dev();
325 * check info/read/write.
328 unsigned char j
, start
, end
;
334 * Look for any and all PHYs. Valid addresses are 0..31.
337 start
= addrlo
; end
= addrhi
;
342 for (j
= start
; j
<= end
; j
++) {
343 if (miiphy_info (devname
, j
, &oui
, &model
, &rev
) == 0) {
344 printf("PHY 0x%02X: "
350 miiphy_speed (devname
, j
),
351 miiphy_is_1000base_x (devname
, j
)
353 (miiphy_duplex (devname
, j
) == FULL
)
357 } else if (op
[0] == 'r') {
358 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
359 for (reg
= reglo
; reg
<= reghi
; reg
++) {
361 if (miiphy_read (devname
, addr
, reg
, &data
) != 0) {
363 "Error reading from the PHY addr=%02x reg=%02x\n",
367 if ((addrlo
!= addrhi
) || (reglo
!= reghi
))
368 printf("addr=%02x reg=%02x data=",
369 (uint
)addr
, (uint
)reg
);
370 printf("%04X\n", data
& 0x0000FFFF);
373 if ((addrlo
!= addrhi
) && (reglo
!= reghi
))
376 } else if (op
[0] == 'w') {
377 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
378 for (reg
= reglo
; reg
<= reghi
; reg
++) {
379 if (miiphy_write (devname
, addr
, reg
, data
) != 0) {
380 printf("Error writing to the PHY addr=%02x reg=%02x\n",
386 } else if (op
[0] == 'm') {
387 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
388 for (reg
= reglo
; reg
<= reghi
; reg
++) {
389 unsigned short val
= 0;
390 if (miiphy_read(devname
, addr
,
392 printf("Error reading from the PHY");
393 printf(" addr=%02x", addr
);
394 printf(" reg=%02x\n", reg
);
397 val
= (val
& ~mask
) | (data
& mask
);
398 if (miiphy_write(devname
, addr
,
400 printf("Error writing to the PHY");
401 printf(" addr=%02x", addr
);
402 printf(" reg=%02x\n", reg
);
408 } else if (strncmp(op
, "du", 2) == 0) {
411 if ((reglo
> 5) || (reghi
> 5)) {
413 "The MII dump command only formats the "
414 "standard MII registers, 0-5.\n");
417 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
418 for (reg
= reglo
; reg
< reghi
+ 1; reg
++) {
419 if (miiphy_read(devname
, addr
, reg
, ®s
[reg
]) != 0) {
422 "Error reading from the PHY addr=%02x reg=%02x\n",
428 MII_dump_0_to_5(regs
, reglo
, reghi
);
431 } else if (strncmp(op
, "de", 2) == 0) {
435 miiphy_set_current_dev (argv
[2]);
437 return CMD_RET_USAGE
;
441 * Save the parameters for repeats.
445 last_addr_lo
= addrlo
;
446 last_addr_hi
= addrhi
;
455 /***************************************************/
459 "MII utility commands",
460 "device - list available devices\n"
461 "mii device <devname> - set current device\n"
462 "mii info <addr> - display MII PHY info\n"
463 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
464 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
465 "mii modify <addr> <reg> <data> <mask> - modify MII PHY <addr> register <reg>\n"
466 " updating bits identified in <mask>\n"
467 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
468 "Addr and/or reg may be ranges, e.g. 2-7."