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git.ipfire.org Git - thirdparty/u-boot.git/blob - cmd/tsi148.c
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
5 * base on universe.h by
7 * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
18 #define LPCI_VENDOR PCI_VENDOR_ID_TUNDRA
19 #define LPCI_DEVICE PCI_DEVICE_ID_TUNDRA_TSI148
21 typedef struct _TSI148_DEV TSI148_DEV
;
30 static TSI148_DEV
*dev
;
33 * Most of the TSI148 register are BIGENDIAN
34 * This is the reason for the __raw_writel(htonl(x), x) usage!
43 busdevfn
= pci_find_device(LPCI_VENDOR
, LPCI_DEVICE
, 0);
45 puts("Tsi148: No Tundra Tsi148 found!\n");
49 /* Lets turn Latency off */
50 pci_write_config_dword(busdevfn
, 0x0c, 0);
52 dev
= malloc(sizeof(*dev
));
54 puts("Tsi148: No memory!\n");
58 memset(dev
, 0, sizeof(*dev
));
59 dev
->busdevfn
= busdevfn
;
61 pci_read_config_dword(busdevfn
, PCI_BASE_ADDRESS_0
, &val
);
63 dev
->uregs
= (TSI148
*)val
;
65 debug("Tsi148: Base : %p\n", dev
->uregs
);
68 debug("Tsi148: Read via mapping, PCI_ID = %08X\n",
69 readl(&dev
->uregs
->pci_id
));
70 if (((LPCI_DEVICE
<< 16) | LPCI_VENDOR
) != readl(&dev
->uregs
->pci_id
)) {
71 printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n",
72 readl(&dev
->uregs
->pci_id
));
77 debug("Tsi148: PCI_BS = %08X\n", readl(&dev
->uregs
->pci_mbarl
));
79 dev
->pci_bs
= readl(&dev
->uregs
->pci_mbarl
);
81 /* turn off windows */
82 for (j
= 0; j
< 8; j
++) {
83 __raw_writel(htonl(0x00000000), &dev
->uregs
->outbound
[j
].otat
);
84 __raw_writel(htonl(0x00000000), &dev
->uregs
->inbound
[j
].itat
);
87 /* Tsi148 VME timeout etc */
88 __raw_writel(htonl(0x00000084), &dev
->uregs
->vctrl
);
91 if ((__raw_readl(&dev
->uregs
->vstat
) & 0x00000100) != 0)
92 printf("Tsi148: System Controller!\n");
94 printf("Tsi148: Not System Controller!\n");
98 * Lets turn off interrupts
100 /* Disable interrupts in Tsi148 first */
101 __raw_writel(htonl(0x00000000), &dev
->uregs
->inten
);
102 /* Disable interrupt out */
103 __raw_writel(htonl(0x00000000), &dev
->uregs
->inteo
);
105 /* Reset all IRQ's */
106 __raw_writel(htonl(0x03ff3f00), &dev
->uregs
->intc
);
107 /* Map all ints to 0 */
108 __raw_writel(htonl(0x00000000), &dev
->uregs
->intm1
);
109 __raw_writel(htonl(0x00000000), &dev
->uregs
->intm2
);
112 val
= __raw_readl(&dev
->uregs
->vstat
);
113 val
&= ~(0x00004000);
114 __raw_writel(val
, &dev
->uregs
->vstat
);
117 debug("Tsi148: register struct size %08x\n", sizeof(TSI148
));
129 * Create pci slave window (access: pci -> vme)
131 int tsi148_pci_slave_window(unsigned int pciAddr
, unsigned int vmeAddr
,
132 int size
, int vam
, int vdw
)
135 unsigned int ctl
= 0;
142 for (i
= 0; i
< 8; i
++) {
143 if (0x00000000 == readl(&dev
->uregs
->outbound
[i
].otat
))
148 printf("Tsi148: No Image available\n");
153 debug("Tsi148: Using image %d\n", i
);
155 printf("Tsi148: Pci addr %08x\n", pciAddr
);
157 __raw_writel(htonl(pciAddr
), &dev
->uregs
->outbound
[i
].otsal
);
158 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].otsau
);
159 __raw_writel(htonl(pciAddr
+ size
), &dev
->uregs
->outbound
[i
].oteal
);
160 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].oteau
);
161 __raw_writel(htonl(vmeAddr
- pciAddr
), &dev
->uregs
->outbound
[i
].otofl
);
162 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].otofu
);
164 switch (vam
& VME_AM_Axx
) {
176 switch (vam
& VME_AM_Mxx
) {
185 if (vam
& VME_AM_SUP
)
188 switch (vdw
& VME_FLAG_Dxx
) {
197 ctl
|= 0x80040000; /* enable, no prefetch */
199 __raw_writel(htonl(ctl
), &dev
->uregs
->outbound
[i
].otat
);
201 debug("Tsi148: window-addr =%p\n",
202 &dev
->uregs
->outbound
[i
].otsau
);
203 debug("Tsi148: pci slave window[%d] attr =%08x\n",
204 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otat
)));
205 debug("Tsi148: pci slave window[%d] start =%08x\n",
206 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otsal
)));
207 debug("Tsi148: pci slave window[%d] end =%08x\n",
208 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].oteal
)));
209 debug("Tsi148: pci slave window[%d] offset=%08x\n",
210 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otofl
)));
218 unsigned int tsi148_eval_vam(int vam
)
220 unsigned int ctl
= 0;
222 switch (vam
& VME_AM_Axx
) {
233 switch (vam
& VME_AM_Mxx
) {
240 case (VME_AM_PROG
| VME_AM_DATA
):
245 if (vam
& VME_AM_SUP
)
247 if (vam
& VME_AM_USR
)
254 * Create vme slave window (access: vme -> pci)
256 int tsi148_vme_slave_window(unsigned int vmeAddr
, unsigned int pciAddr
,
260 unsigned int ctl
= 0;
267 for (i
= 0; i
< 8; i
++) {
268 if (0x00000000 == readl(&dev
->uregs
->inbound
[i
].itat
))
273 printf("Tsi148: No Image available\n");
278 debug("Tsi148: Using image %d\n", i
);
280 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->inbound
[i
].itsal
);
281 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].itsau
);
282 __raw_writel(htonl(vmeAddr
+ size
), &dev
->uregs
->inbound
[i
].iteal
);
283 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].iteau
);
284 __raw_writel(htonl(pciAddr
- vmeAddr
), &dev
->uregs
->inbound
[i
].itofl
);
285 if (vmeAddr
> pciAddr
)
286 __raw_writel(0xffffffff, &dev
->uregs
->inbound
[i
].itofu
);
288 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].itofu
);
290 ctl
= tsi148_eval_vam(vam
);
291 ctl
|= 0x80000000; /* enable */
292 __raw_writel(htonl(ctl
), &dev
->uregs
->inbound
[i
].itat
);
294 debug("Tsi148: window-addr =%p\n",
295 &dev
->uregs
->inbound
[i
].itsau
);
296 debug("Tsi148: vme slave window[%d] attr =%08x\n",
297 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itat
)));
298 debug("Tsi148: vme slave window[%d] start =%08x\n",
299 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itsal
)));
300 debug("Tsi148: vme slave window[%d] end =%08x\n",
301 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].iteal
)));
302 debug("Tsi148: vme slave window[%d] offset=%08x\n",
303 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itofl
)));
312 * Create vme slave window (access: vme -> gcsr)
314 int tsi148_vme_gcsr_window(unsigned int vmeAddr
, int vam
)
324 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->gbal
);
325 __raw_writel(0x00000000, &dev
->uregs
->gbau
);
327 ctl
= tsi148_eval_vam(vam
);
328 ctl
|= 0x00000080; /* enable */
329 __raw_writel(htonl(ctl
), &dev
->uregs
->gcsrat
);
336 * Create vme slave window (access: vme -> crcsr)
338 int tsi148_vme_crcsr_window(unsigned int vmeAddr
)
348 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->crol
);
349 __raw_writel(0x00000000, &dev
->uregs
->crou
);
351 ctl
= 0x00000080; /* enable */
352 __raw_writel(htonl(ctl
), &dev
->uregs
->crat
);
359 * Create vme slave window (access: vme -> crg)
361 int tsi148_vme_crg_window(unsigned int vmeAddr
, int vam
)
371 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->cbal
);
372 __raw_writel(0x00000000, &dev
->uregs
->cbau
);
374 ctl
= tsi148_eval_vam(vam
);
375 ctl
|= 0x00000080; /* enable */
376 __raw_writel(htonl(ctl
), &dev
->uregs
->crgat
);
383 * Tundra Tsi148 configuration
385 int do_tsi148(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
387 ulong addr1
= 0, addr2
= 0, size
= 0, vam
= 0, vdw
= 0;
394 addr1
= simple_strtoul(argv
[2], NULL
, 16);
396 addr2
= simple_strtoul(argv
[3], NULL
, 16);
398 size
= simple_strtoul(argv
[4], NULL
, 16);
400 vam
= simple_strtoul(argv
[5], NULL
, 16);
402 vdw
= simple_strtoul(argv
[6], NULL
, 16);
406 if (strcmp(argv
[1], "crg") == 0) {
408 printf("Tsi148: Configuring VME CRG Window "
410 printf(" vme=%08lx vam=%02lx\n", addr1
, vam
);
411 tsi148_vme_crg_window(addr1
, vam
);
413 printf("Tsi148: Configuring VME CR/CSR Window "
415 printf(" pci=%08lx\n", addr1
);
416 tsi148_vme_crcsr_window(addr1
);
424 printf("Tsi148: Configuring VME GCSR Window (VME->GCSR):\n");
425 printf(" vme=%08lx vam=%02lx\n", addr1
, vam
);
426 tsi148_vme_gcsr_window(addr1
, vam
);
429 printf("Tsi148: Configuring VME Slave Window (VME->PCI):\n");
430 printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx\n",
431 addr1
, addr2
, size
, vam
);
432 tsi148_vme_slave_window(addr1
, addr2
, size
, vam
);
435 printf("Tsi148: Configuring PCI Slave Window (PCI->VME):\n");
436 printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx vdw=%02lx\n",
437 addr1
, addr2
, size
, vam
, vdw
);
438 tsi148_pci_slave_window(addr1
, addr2
, size
, vam
, vdw
);
441 printf("Tsi148: Command %s not supported!\n", argv
[1]);
448 tsi148
, 7, 1, do_tsi148
,
449 "initialize and configure Turndra Tsi148\n",
451 " - initialize tsi148\n"
452 "tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n"
453 " - create vme slave window (access: vme->pci)\n"
454 "tsi148 pci [pci_addr] [vme_addr] [size] [vam] [vdw]\n"
455 " - create pci slave window (access: pci->vme)\n"
456 "tsi148 crg [vme_addr] [vam]\n"
457 " - create vme slave window: (access vme->CRG\n"
458 "tsi148 crcsr [pci_addr]\n"
459 " - create vme slave window: (access vme->CR/CSR\n"
460 "tsi148 gcsr [vme_addr] [vam]\n"
461 " - create vme slave window: (access vme->GCSR\n"
462 " [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
463 " 02 -> A24 Address Space\n"
464 " 03 -> A32 Address Space\n"
465 " 04 -> Usr AM Code\n"
466 " 08 -> Supervisor AM Code\n"
467 " 10 -> Data AM Code\n"
468 " 20 -> Program AM Code\n"
469 " [vdw] = VMEbus Maximum Datawidth: 02 -> D16 Data Width\n"
470 " 03 -> D32 Data Width\n"