common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <console.h>
  17 #include <environment.h>
  18 #include <dm.h>
  19 #include <fdtdec.h>
  20 #include <fs.h>
  21 #if defined(CONFIG_CMD_IDE)
  22 #include <ide.h>
  23 #endif
  24 #include <i2c.h>
  25 #include <initcall.h>
  26 #include <logbuff.h>
  27 #include <malloc.h>
  28 #include <mapmem.h>
  29
  30 /* TODO: Can we move these into arch/ headers? */
  31 #ifdef CONFIG_8xx
  32 #include <mpc8xx.h>
  33 #endif
  34 #ifdef CONFIG_5xx
  35 #include <mpc5xx.h>
  36 #endif
  37 #ifdef CONFIG_MPC5xxx
  38 #include <mpc5xxx.h>
  39 #endif
  40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  41 #include <asm/mp.h>
  42 #endif
  43
  44 #include <os.h>
  45 #include <post.h>
  46 #include <spi.h>
  47 #include <status_led.h>
  48 #include <timer.h>
  49 #include <trace.h>
  50 #include <video.h>
  51 #include <watchdog.h>
  52 #include <linux/errno.h>
  53 #include <asm/io.h>
  54 #include <asm/sections.h>
  55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  56 #include <asm/init_helpers.h>
  57 #endif
  58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
  59 #include <asm/relocate.h>
  60 #endif
  61 #include <dm/root.h>
  62 #include <linux/compiler.h>
  63
  64 /*
  65  * Pointer to initial global data area
  66  *
  67  * Here we initialize it if needed.
  68  */
  69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  70 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  71 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  73 #else
  74 DECLARE_GLOBAL_DATA_PTR;
  75 #endif
  76
  77 /*
  78  * TODO(sjg@chromium.org): IMO this code should be
  79  * refactored to a single function, something like:
  80  *
  81  * void led_set_state(enum led_colour_t colour, int on);
  82  */
  83 /************************************************************************
  84  * Coloured LED functionality
  85  ************************************************************************
  86  * May be supplied by boards if desired
  87  */
  88 __weak void coloured_LED_init(void) {}
  89 __weak void red_led_on(void) {}
  90 __weak void red_led_off(void) {}
  91 __weak void green_led_on(void) {}
  92 __weak void green_led_off(void) {}
  93 __weak void yellow_led_on(void) {}
  94 __weak void yellow_led_off(void) {}
  95 __weak void blue_led_on(void) {}
  96 __weak void blue_led_off(void) {}
  97
  98 /*
  99  * Why is gd allocated a register? Prior to reloc it might be better to
 100  * just pass it around to each function in this file?
 101  *
 102  * After reloc one could argue that it is hardly used and doesn't need
 103  * to be in a register. Or if it is it should perhaps hold pointers to all
 104  * global data for all modules, so that post-reloc we can avoid the massive
 105  * literal pool we get on ARM. Or perhaps just encourage each module to use
 106  * a structure...
 107  */
 108
 109 /*
 110  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 111  */
 112
 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 114 static int init_func_watchdog_init(void)
 115 {
 116 # if defined(CONFIG_HW_WATCHDOG) && \
 117         (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 118         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 119         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
 120         defined(CONFIG_IMX_WATCHDOG))
 121         hw_watchdog_init();
 122         puts("       Watchdog enabled\n");
 123 # endif
 124         WATCHDOG_RESET();
 125
 126         return 0;
 127 }
 128
 129 int init_func_watchdog_reset(void)
 130 {
 131         WATCHDOG_RESET();
 132
 133         return 0;
 134 }
 135 #endif /* CONFIG_WATCHDOG */
 136
 137 __weak void board_add_ram_info(int use_default)
 138 {
 139         /* please define platform specific board_add_ram_info() */
 140 }
 141
 142 static int init_baud_rate(void)
 143 {
 144         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 145         return 0;
 146 }
 147
 148 static int display_text_info(void)
 149 {
 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 151         ulong bss_start, bss_end, text_base;
 152
 153         bss_start = (ulong)&__bss_start;
 154         bss_end = (ulong)&__bss_end;
 155
 156 #ifdef CONFIG_SYS_TEXT_BASE
 157         text_base = CONFIG_SYS_TEXT_BASE;
 158 #else
 159         text_base = CONFIG_SYS_MONITOR_BASE;
 160 #endif
 161
 162         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 163                 text_base, bss_start, bss_end);
 164 #endif
 165
 166 #ifdef CONFIG_USE_IRQ
 167         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 168         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 169 #endif
 170
 171         return 0;
 172 }
 173
 174 static int announce_dram_init(void)
 175 {
 176         puts("DRAM:  ");
 177         return 0;
 178 }
 179
 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 181 static int init_func_ram(void)
 182 {
 183         gd->ram_size = initdram();
 184
 185         if (gd->ram_size > 0)
 186                 return 0;
 187
 188         puts("*** failed ***\n");
 189         return 1;
 190 }
 191 #endif
 192
 193 static int show_dram_config(void)
 194 {
 195         unsigned long long size;
 196
 197 #ifdef CONFIG_NR_DRAM_BANKS
 198         int i;
 199
 200         debug("\nRAM Configuration:\n");
 201         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 202                 size += gd->bd->bi_dram[i].size;
 203                 debug("Bank #%d: %llx ", i,
 204                       (unsigned long long)(gd->bd->bi_dram[i].start));
 205 #ifdef DEBUG
 206                 print_size(gd->bd->bi_dram[i].size, "\n");
 207 #endif
 208         }
 209         debug("\nDRAM:  ");
 210 #else
 211         size = gd->ram_size;
 212 #endif
 213
 214         print_size(size, "");
 215         board_add_ram_info(0);
 216         putc('\n');
 217
 218         return 0;
 219 }
 220
 221 __weak void dram_init_banksize(void)
 222 {
 223 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 224         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 225         gd->bd->bi_dram[0].size = get_effective_memsize();
 226 #endif
 227 }
 228
 229 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 230 static int init_func_i2c(void)
 231 {
 232         puts("I2C:   ");
 233 #ifdef CONFIG_SYS_I2C
 234         i2c_init_all();
 235 #else
 236         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 237 #endif
 238         puts("ready\n");
 239         return 0;
 240 }
 241 #endif
 242
 243 #if defined(CONFIG_HARD_SPI)
 244 static int init_func_spi(void)
 245 {
 246         puts("SPI:   ");
 247         spi_init();
 248         puts("ready\n");
 249         return 0;
 250 }
 251 #endif
 252
 253 __maybe_unused
 254 static int zero_global_data(void)
 255 {
 256         memset((void *)gd, '\0', sizeof(gd_t));
 257
 258         return 0;
 259 }
 260
 261 static int setup_mon_len(void)
 262 {
 263 #if defined(__ARM__) || defined(__MICROBLAZE__)
 264         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 265 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 266         gd->mon_len = (ulong)&_end - (ulong)_init;
 267 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 268         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 269 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
 270         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 271 #elif defined(CONFIG_SYS_MONITOR_BASE)
 272         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 273         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 274 #endif
 275         return 0;
 276 }
 277
 278 __weak int arch_cpu_init(void)
 279 {
 280         return 0;
 281 }
 282
 283 __weak int mach_cpu_init(void)
 284 {
 285         return 0;
 286 }
 287
 288 /* Get the top of usable RAM */
 289 __weak ulong board_get_usable_ram_top(ulong total_size)
 290 {
 291 #ifdef CONFIG_SYS_SDRAM_BASE
 292         /*
 293          * Detect whether we have so much RAM that it goes past the end of our
 294          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 295          */
 296         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 297                 /*
 298                  * Will wrap back to top of 32-bit space when reservations
 299                  * are made.
 300                  */
 301                 return 0;
 302 #endif
 303         return gd->ram_top;
 304 }
 305
 306 static int setup_dest_addr(void)
 307 {
 308         debug("Monitor len: %08lX\n", gd->mon_len);
 309         /*
 310          * Ram is setup, size stored in gd !!
 311          */
 312         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 313 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 314         /*
 315          * Subtract specified amount of memory to hide so that it won't
 316          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 317          * the Linux kernel should now get passed the now "corrected"
 318          * memory size and won't touch it either. This should work
 319          * for arch/ppc and arch/powerpc. Only Linux board ports in
 320          * arch/powerpc with bootwrapper support, that recalculate the
 321          * memory size from the SDRAM controller setup will have to
 322          * get fixed.
 323          */
 324         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 325 #endif
 326 #ifdef CONFIG_SYS_SDRAM_BASE
 327         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 328 #endif
 329         gd->ram_top += get_effective_memsize();
 330         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 331         gd->relocaddr = gd->ram_top;
 332         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 333 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 334         /*
 335          * We need to make sure the location we intend to put secondary core
 336          * boot code is reserved and not used by any part of u-boot
 337          */
 338         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 339                 gd->relocaddr = determine_mp_bootpg(NULL);
 340                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 341         }
 342 #endif
 343         return 0;
 344 }
 345
 346 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 347 static int reserve_logbuffer(void)
 348 {
 349         /* reserve kernel log buffer */
 350         gd->relocaddr -= LOGBUFF_RESERVE;
 351         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 352                 gd->relocaddr);
 353         return 0;
 354 }
 355 #endif
 356
 357 #ifdef CONFIG_PRAM
 358 /* reserve protected RAM */
 359 static int reserve_pram(void)
 360 {
 361         ulong reg;
 362
 363         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 364         gd->relocaddr -= (reg << 10);           /* size is in kB */
 365         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 366               gd->relocaddr);
 367         return 0;
 368 }
 369 #endif /* CONFIG_PRAM */
 370
 371 /* Round memory pointer down to next 4 kB limit */
 372 static int reserve_round_4k(void)
 373 {
 374         gd->relocaddr &= ~(4096 - 1);
 375         return 0;
 376 }
 377
 378 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 379                 defined(CONFIG_ARM)
 380 static int reserve_mmu(void)
 381 {
 382         /* reserve TLB table */
 383         gd->arch.tlb_size = PGTABLE_SIZE;
 384         gd->relocaddr -= gd->arch.tlb_size;
 385
 386         /* round down to next 64 kB limit */
 387         gd->relocaddr &= ~(0x10000 - 1);
 388
 389         gd->arch.tlb_addr = gd->relocaddr;
 390         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 391               gd->arch.tlb_addr + gd->arch.tlb_size);
 392
 393 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 394         /*
 395          * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
 396          * with location within secure ram.
 397          */
 398         gd->arch.tlb_allocated = gd->arch.tlb_addr;
 399 #endif
 400
 401         return 0;
 402 }
 403 #endif
 404
 405 #ifdef CONFIG_DM_VIDEO
 406 static int reserve_video(void)
 407 {
 408         ulong addr;
 409         int ret;
 410
 411         addr = gd->relocaddr;
 412         ret = video_reserve(&addr);
 413         if (ret)
 414                 return ret;
 415         gd->relocaddr = addr;
 416
 417         return 0;
 418 }
 419 #else
 420
 421 # ifdef CONFIG_LCD
 422 static int reserve_lcd(void)
 423 {
 424 #  ifdef CONFIG_FB_ADDR
 425         gd->fb_base = CONFIG_FB_ADDR;
 426 #  else
 427         /* reserve memory for LCD display (always full pages) */
 428         gd->relocaddr = lcd_setmem(gd->relocaddr);
 429         gd->fb_base = gd->relocaddr;
 430 #  endif /* CONFIG_FB_ADDR */
 431
 432         return 0;
 433 }
 434 # endif /* CONFIG_LCD */
 435
 436 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 437                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 438                 !defined(CONFIG_M68K)
 439 static int reserve_legacy_video(void)
 440 {
 441         /* reserve memory for video display (always full pages) */
 442         gd->relocaddr = video_setmem(gd->relocaddr);
 443         gd->fb_base = gd->relocaddr;
 444
 445         return 0;
 446 }
 447 # endif
 448 #endif /* !CONFIG_DM_VIDEO */
 449
 450 static int reserve_trace(void)
 451 {
 452 #ifdef CONFIG_TRACE
 453         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 454         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 455         debug("Reserving %dk for trace data at: %08lx\n",
 456               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 457 #endif
 458
 459         return 0;
 460 }
 461
 462 static int reserve_uboot(void)
 463 {
 464         /*
 465          * reserve memory for U-Boot code, data & bss
 466          * round down to next 4 kB limit
 467          */
 468         gd->relocaddr -= gd->mon_len;
 469         gd->relocaddr &= ~(4096 - 1);
 470 #ifdef CONFIG_E500
 471         /* round down to next 64 kB limit so that IVPR stays aligned */
 472         gd->relocaddr &= ~(65536 - 1);
 473 #endif
 474
 475         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 476               gd->relocaddr);
 477
 478         gd->start_addr_sp = gd->relocaddr;
 479
 480         return 0;
 481 }
 482
 483 #ifndef CONFIG_SPL_BUILD
 484 /* reserve memory for malloc() area */
 485 static int reserve_malloc(void)
 486 {
 487         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 488         debug("Reserving %dk for malloc() at: %08lx\n",
 489                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 490         return 0;
 491 }
 492
 493 /* (permanently) allocate a Board Info struct */
 494 static int reserve_board(void)
 495 {
 496         if (!gd->bd) {
 497                 gd->start_addr_sp -= sizeof(bd_t);
 498                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 499                 memset(gd->bd, '\0', sizeof(bd_t));
 500                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 501                       sizeof(bd_t), gd->start_addr_sp);
 502         }
 503         return 0;
 504 }
 505 #endif
 506
 507 static int setup_machine(void)
 508 {
 509 #ifdef CONFIG_MACH_TYPE
 510         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 511 #endif
 512         return 0;
 513 }
 514
 515 static int reserve_global_data(void)
 516 {
 517         gd->start_addr_sp -= sizeof(gd_t);
 518         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 519         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 520                         sizeof(gd_t), gd->start_addr_sp);
 521         return 0;
 522 }
 523
 524 static int reserve_fdt(void)
 525 {
 526 #ifndef CONFIG_OF_EMBED
 527         /*
 528          * If the device tree is sitting immediately above our image then we
 529          * must relocate it. If it is embedded in the data section, then it
 530          * will be relocated with other data.
 531          */
 532         if (gd->fdt_blob) {
 533                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 534
 535                 gd->start_addr_sp -= gd->fdt_size;
 536                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 537                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 538                       gd->fdt_size, gd->start_addr_sp);
 539         }
 540 #endif
 541
 542         return 0;
 543 }
 544
 545 int arch_reserve_stacks(void)
 546 {
 547         return 0;
 548 }
 549
 550 static int reserve_stacks(void)
 551 {
 552         /* make stack pointer 16-byte aligned */
 553         gd->start_addr_sp -= 16;
 554         gd->start_addr_sp &= ~0xf;
 555
 556         /*
 557          * let the architecture-specific code tailor gd->start_addr_sp and
 558          * gd->irq_sp
 559          */
 560         return arch_reserve_stacks();
 561 }
 562
 563 static int display_new_sp(void)
 564 {
 565         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 566
 567         return 0;
 568 }
 569
 570 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 571         defined(CONFIG_SH)
 572 static int setup_board_part1(void)
 573 {
 574         bd_t *bd = gd->bd;
 575
 576         /*
 577          * Save local variables to board info struct
 578          */
 579         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 580         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 581
 582 #ifdef CONFIG_SYS_SRAM_BASE
 583         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 584         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 585 #endif
 586
 587 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 588                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 589         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 590 #endif
 591 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 592         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 593 #endif
 594 #if defined(CONFIG_MPC83xx)
 595         bd->bi_immrbar = CONFIG_SYS_IMMR;
 596 #endif
 597
 598         return 0;
 599 }
 600 #endif
 601
 602 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 603 static int setup_board_part2(void)
 604 {
 605         bd_t *bd = gd->bd;
 606
 607         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 608         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 609 #if defined(CONFIG_CPM2)
 610         bd->bi_cpmfreq = gd->arch.cpm_clk;
 611         bd->bi_brgfreq = gd->arch.brg_clk;
 612         bd->bi_sccfreq = gd->arch.scc_clk;
 613         bd->bi_vco = gd->arch.vco_out;
 614 #endif /* CONFIG_CPM2 */
 615 #if defined(CONFIG_MPC512X)
 616         bd->bi_ipsfreq = gd->arch.ips_clk;
 617 #endif /* CONFIG_MPC512X */
 618 #if defined(CONFIG_MPC5xxx)
 619         bd->bi_ipbfreq = gd->arch.ipb_clk;
 620         bd->bi_pcifreq = gd->pci_clk;
 621 #endif /* CONFIG_MPC5xxx */
 622 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 623         bd->bi_pcifreq = gd->pci_clk;
 624 #endif
 625 #if defined(CONFIG_EXTRA_CLOCK)
 626         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 627         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 628         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 629 #endif
 630
 631         return 0;
 632 }
 633 #endif
 634
 635 #ifdef CONFIG_SYS_EXTBDINFO
 636 static int setup_board_extra(void)
 637 {
 638         bd_t *bd = gd->bd;
 639
 640         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 641         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 642                 sizeof(bd->bi_r_version));
 643
 644         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 645         bd->bi_plb_busfreq = gd->bus_clk;
 646 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 647                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 648                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 649         bd->bi_pci_busfreq = get_PCI_freq();
 650         bd->bi_opbfreq = get_OPB_freq();
 651 #elif defined(CONFIG_XILINX_405)
 652         bd->bi_pci_busfreq = get_PCI_freq();
 653 #endif
 654
 655         return 0;
 656 }
 657 #endif
 658
 659 #ifdef CONFIG_POST
 660 static int init_post(void)
 661 {
 662         post_bootmode_init();
 663         post_run(NULL, POST_ROM | post_bootmode_get(0));
 664
 665         return 0;
 666 }
 667 #endif
 668
 669 static int setup_dram_config(void)
 670 {
 671         /* Ram is board specific, so move it to board code ... */
 672         dram_init_banksize();
 673
 674         return 0;
 675 }
 676
 677 static int reloc_fdt(void)
 678 {
 679 #ifndef CONFIG_OF_EMBED
 680         if (gd->flags & GD_FLG_SKIP_RELOC)
 681                 return 0;
 682         if (gd->new_fdt) {
 683                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 684                 gd->fdt_blob = gd->new_fdt;
 685         }
 686 #endif
 687
 688         return 0;
 689 }
 690
 691 static int setup_reloc(void)
 692 {
 693         if (gd->flags & GD_FLG_SKIP_RELOC) {
 694                 debug("Skipping relocation due to flag\n");
 695                 return 0;
 696         }
 697
 698 #ifdef CONFIG_SYS_TEXT_BASE
 699         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 700 #ifdef CONFIG_M68K
 701         /*
 702          * On all ColdFire arch cpu, monitor code starts always
 703          * just after the default vector table location, so at 0x400
 704          */
 705         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 706 #endif
 707 #endif
 708         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 709
 710         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 711         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 712               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 713               gd->start_addr_sp);
 714
 715         return 0;
 716 }
 717
 718 #ifdef CONFIG_OF_BOARD_FIXUP
 719 static int fix_fdt(void)
 720 {
 721         return board_fix_fdt((void *)gd->fdt_blob);
 722 }
 723 #endif
 724
 725 /* ARM calls relocate_code from its crt0.S */
 726 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 727                 !CONFIG_IS_ENABLED(X86_64)
 728
 729 static int jump_to_copy(void)
 730 {
 731         if (gd->flags & GD_FLG_SKIP_RELOC)
 732                 return 0;
 733         /*
 734          * x86 is special, but in a nice way. It uses a trampoline which
 735          * enables the dcache if possible.
 736          *
 737          * For now, other archs use relocate_code(), which is implemented
 738          * similarly for all archs. When we do generic relocation, hopefully
 739          * we can make all archs enable the dcache prior to relocation.
 740          */
 741 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 742         /*
 743          * SDRAM and console are now initialised. The final stack can now
 744          * be setup in SDRAM. Code execution will continue in Flash, but
 745          * with the stack in SDRAM and Global Data in temporary memory
 746          * (CPU cache)
 747          */
 748         arch_setup_gd(gd->new_gd);
 749         board_init_f_r_trampoline(gd->start_addr_sp);
 750 #else
 751         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 752 #endif
 753
 754         return 0;
 755 }
 756 #endif
 757
 758 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 759 static int mark_bootstage(void)
 760 {
 761         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 762
 763         return 0;
 764 }
 765
 766 static int initf_console_record(void)
 767 {
 768 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 769         return console_record_init();
 770 #else
 771         return 0;
 772 #endif
 773 }
 774
 775 static int initf_dm(void)
 776 {
 777 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 778         int ret;
 779
 780         ret = dm_init_and_scan(true);
 781         if (ret)
 782                 return ret;
 783 #endif
 784 #ifdef CONFIG_TIMER_EARLY
 785         ret = dm_timer_init();
 786         if (ret)
 787                 return ret;
 788 #endif
 789
 790         return 0;
 791 }
 792
 793 /* Architecture-specific memory reservation */
 794 __weak int reserve_arch(void)
 795 {
 796         return 0;
 797 }
 798
 799 __weak int arch_cpu_init_dm(void)
 800 {
 801         return 0;
 802 }
 803
 804 static const init_fnc_t init_sequence_f[] = {
 805         setup_mon_len,
 806 #ifdef CONFIG_OF_CONTROL
 807         fdtdec_setup,
 808 #endif
 809 #ifdef CONFIG_TRACE
 810         trace_early_init,
 811 #endif
 812         initf_malloc,
 813         initf_console_record,
 814 #if defined(CONFIG_HAVE_FSP)
 815         arch_fsp_init,
 816 #endif
 817         arch_cpu_init,          /* basic arch cpu dependent setup */
 818         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 819         initf_dm,
 820         arch_cpu_init_dm,
 821         mark_bootstage,         /* need timer, go after init dm */
 822 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 823         board_early_init_f,
 824 #endif
 825 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 826         /* get CPU and bus clocks according to the environment variable */
 827         get_clocks,             /* get CPU and bus clocks (etc.) */
 828 #endif
 829         timer_init,             /* initialize timer */
 830 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 831         board_postclk_init,
 832 #endif
 833         env_init,               /* initialize environment */
 834         init_baud_rate,         /* initialze baudrate settings */
 835         serial_init,            /* serial communications setup */
 836         console_init_f,         /* stage 1 init of console */
 837         display_options,        /* say that we are here */
 838         display_text_info,      /* show debugging info if required */
 839 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
 840                 defined(CONFIG_X86)
 841         checkcpu,
 842 #endif
 843 #if defined(CONFIG_DISPLAY_CPUINFO)
 844         print_cpuinfo,          /* display cpu info (and speed) */
 845 #endif
 846 #if defined(CONFIG_DISPLAY_BOARDINFO)
 847         show_board_info,
 848 #endif
 849         INIT_FUNC_WATCHDOG_INIT
 850 #if defined(CONFIG_MISC_INIT_F)
 851         misc_init_f,
 852 #endif
 853         INIT_FUNC_WATCHDOG_RESET
 854 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 855         init_func_i2c,
 856 #endif
 857 #if defined(CONFIG_HARD_SPI)
 858         init_func_spi,
 859 #endif
 860         announce_dram_init,
 861         /* TODO: unify all these dram functions? */
 862 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 863                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
 864                 defined(CONFIG_SH)
 865         dram_init,              /* configure available RAM banks */
 866 #endif
 867 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 868         init_func_ram,
 869 #endif
 870 #ifdef CONFIG_POST
 871         post_init_f,
 872 #endif
 873         INIT_FUNC_WATCHDOG_RESET
 874 #if defined(CONFIG_SYS_DRAM_TEST)
 875         testdram,
 876 #endif /* CONFIG_SYS_DRAM_TEST */
 877         INIT_FUNC_WATCHDOG_RESET
 878
 879 #ifdef CONFIG_POST
 880         init_post,
 881 #endif
 882         INIT_FUNC_WATCHDOG_RESET
 883         /*
 884          * Now that we have DRAM mapped and working, we can
 885          * relocate the code and continue running from DRAM.
 886          *
 887          * Reserve memory at end of RAM for (top down in that order):
 888          *  - area that won't get touched by U-Boot and Linux (optional)
 889          *  - kernel log buffer
 890          *  - protected RAM
 891          *  - LCD framebuffer
 892          *  - monitor code
 893          *  - board info struct
 894          */
 895         setup_dest_addr,
 896 #if defined(CONFIG_XTENSA)
 897         /* Blackfin u-boot monitor should be on top of the ram */
 898         reserve_uboot,
 899 #endif
 900 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 901         reserve_logbuffer,
 902 #endif
 903 #ifdef CONFIG_PRAM
 904         reserve_pram,
 905 #endif
 906         reserve_round_4k,
 907 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 908                 defined(CONFIG_ARM)
 909         reserve_mmu,
 910 #endif
 911 #ifdef CONFIG_DM_VIDEO
 912         reserve_video,
 913 #else
 914 # ifdef CONFIG_LCD
 915         reserve_lcd,
 916 # endif
 917         /* TODO: Why the dependency on CONFIG_8xx? */
 918 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 919                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 920                 !defined(CONFIG_M68K)
 921         reserve_legacy_video,
 922 # endif
 923 #endif /* CONFIG_DM_VIDEO */
 924         reserve_trace,
 925 #if !defined(CONFIG_XTENSA)
 926         reserve_uboot,
 927 #endif
 928 #ifndef CONFIG_SPL_BUILD
 929         reserve_malloc,
 930         reserve_board,
 931 #endif
 932         setup_machine,
 933         reserve_global_data,
 934         reserve_fdt,
 935         reserve_arch,
 936         reserve_stacks,
 937         setup_dram_config,
 938         show_dram_config,
 939 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 940         defined(CONFIG_SH)
 941         setup_board_part1,
 942 #endif
 943 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 944         INIT_FUNC_WATCHDOG_RESET
 945         setup_board_part2,
 946 #endif
 947         display_new_sp,
 948 #ifdef CONFIG_SYS_EXTBDINFO
 949         setup_board_extra,
 950 #endif
 951 #ifdef CONFIG_OF_BOARD_FIXUP
 952         fix_fdt,
 953 #endif
 954         INIT_FUNC_WATCHDOG_RESET
 955         reloc_fdt,
 956         setup_reloc,
 957 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 958         copy_uboot_to_ram,
 959         do_elf_reloc_fixups,
 960         clear_bss,
 961 #endif
 962 #if defined(CONFIG_XTENSA)
 963         clear_bss,
 964 #endif
 965 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 966                 !CONFIG_IS_ENABLED(X86_64)
 967         jump_to_copy,
 968 #endif
 969         NULL,
 970 };
 971
 972 void board_init_f(ulong boot_flags)
 973 {
 974 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
 975         /*
 976          * For some architectures, global data is initialized and used before
 977          * calling this function. The data should be preserved. For others,
 978          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
 979          * here to host global data until relocation.
 980          */
 981         gd_t data;
 982
 983         gd = &data;
 984
 985         /*
 986          * Clear global data before it is accessed at debug print
 987          * in initcall_run_list. Otherwise the debug print probably
 988          * get the wrong value of gd->have_console.
 989          */
 990         zero_global_data();
 991 #endif
 992
 993         gd->flags = boot_flags;
 994         gd->have_console = 0;
 995
 996         if (initcall_run_list(init_sequence_f))
 997                 hang();
 998
 999 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1000                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
1001         /* NOTREACHED - jump_to_copy() does not return */
1002         hang();
1003 #endif
1004 }
1005
1006 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1007 /*
1008  * For now this code is only used on x86.
1009  *
1010  * init_sequence_f_r is the list of init functions which are run when
1011  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1012  * The following limitations must be considered when implementing an
1013  * '_f_r' function:
1014  *  - 'static' variables are read-only
1015  *  - Global Data (gd->xxx) is read/write
1016  *
1017  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1018  * supported).  It _should_, if possible, copy global data to RAM and
1019  * initialise the CPU caches (to speed up the relocation process)
1020  *
1021  * NOTE: At present only x86 uses this route, but it is intended that
1022  * all archs will move to this when generic relocation is implemented.
1023  */
1024 static const init_fnc_t init_sequence_f_r[] = {
1025 #if !CONFIG_IS_ENABLED(X86_64)
1026         init_cache_f_r,
1027 #endif
1028
1029         NULL,
1030 };
1031
1032 void board_init_f_r(void)
1033 {
1034         if (initcall_run_list(init_sequence_f_r))
1035                 hang();
1036
1037         /*
1038          * The pre-relocation drivers may be using memory that has now gone
1039          * away. Mark serial as unavailable - this will fall back to the debug
1040          * UART if available.
1041          */
1042         gd->flags &= ~GD_FLG_SERIAL_READY;
1043
1044         /*
1045          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1046          * Transfer execution from Flash to RAM by calculating the address
1047          * of the in-RAM copy of board_init_r() and calling it
1048          */
1049         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1050
1051         /* NOTREACHED - board_init_r() does not return */
1052         hang();
1053 }
1054 #endif /* CONFIG_X86 */