common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <environment.h>
  17 #include <dm.h>
  18 #include <fdtdec.h>
  19 #include <fs.h>
  20 #if defined(CONFIG_CMD_IDE)
  21 #include <ide.h>
  22 #endif
  23 #include <i2c.h>
  24 #include <initcall.h>
  25 #include <logbuff.h>
  26 #include <malloc.h>
  27 #include <mapmem.h>
  28
  29 /* TODO: Can we move these into arch/ headers? */
  30 #ifdef CONFIG_8xx
  31 #include <mpc8xx.h>
  32 #endif
  33 #ifdef CONFIG_5xx
  34 #include <mpc5xx.h>
  35 #endif
  36 #ifdef CONFIG_MPC5xxx
  37 #include <mpc5xxx.h>
  38 #endif
  39 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  40 #include <asm/mp.h>
  41 #endif
  42
  43 #include <os.h>
  44 #include <post.h>
  45 #include <spi.h>
  46 #include <status_led.h>
  47 #include <trace.h>
  48 #include <watchdog.h>
  49 #include <asm/errno.h>
  50 #include <asm/io.h>
  51 #include <asm/sections.h>
  52 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  53 #include <asm/init_helpers.h>
  54 #include <asm/relocate.h>
  55 #endif
  56 #ifdef CONFIG_SANDBOX
  57 #include <asm/state.h>
  58 #endif
  59 #include <dm/root.h>
  60 #include <linux/compiler.h>
  61
  62 /*
  63  * Pointer to initial global data area
  64  *
  65  * Here we initialize it if needed.
  66  */
  67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  68 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  69 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  70 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  71 #else
  72 DECLARE_GLOBAL_DATA_PTR;
  73 #endif
  74
  75 /*
  76  * TODO(sjg@chromium.org): IMO this code should be
  77  * refactored to a single function, something like:
  78  *
  79  * void led_set_state(enum led_colour_t colour, int on);
  80  */
  81 /************************************************************************
  82  * Coloured LED functionality
  83  ************************************************************************
  84  * May be supplied by boards if desired
  85  */
  86 __weak void coloured_LED_init(void) {}
  87 __weak void red_led_on(void) {}
  88 __weak void red_led_off(void) {}
  89 __weak void green_led_on(void) {}
  90 __weak void green_led_off(void) {}
  91 __weak void yellow_led_on(void) {}
  92 __weak void yellow_led_off(void) {}
  93 __weak void blue_led_on(void) {}
  94 __weak void blue_led_off(void) {}
  95
  96 /*
  97  * Why is gd allocated a register? Prior to reloc it might be better to
  98  * just pass it around to each function in this file?
  99  *
 100  * After reloc one could argue that it is hardly used and doesn't need
 101  * to be in a register. Or if it is it should perhaps hold pointers to all
 102  * global data for all modules, so that post-reloc we can avoid the massive
 103  * literal pool we get on ARM. Or perhaps just encourage each module to use
 104  * a structure...
 105  */
 106
 107 /*
 108  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 109  */
 110
 111 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 112 static int init_func_watchdog_init(void)
 113 {
 114 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 115         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 116         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 117         defined(CONFIG_IMX_WATCHDOG))
 118         hw_watchdog_init();
 119 # endif
 120         puts("       Watchdog enabled\n");
 121         WATCHDOG_RESET();
 122
 123         return 0;
 124 }
 125
 126 int init_func_watchdog_reset(void)
 127 {
 128         WATCHDOG_RESET();
 129
 130         return 0;
 131 }
 132 #endif /* CONFIG_WATCHDOG */
 133
 134 __weak void board_add_ram_info(int use_default)
 135 {
 136         /* please define platform specific board_add_ram_info() */
 137 }
 138
 139 static int init_baud_rate(void)
 140 {
 141         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 142         return 0;
 143 }
 144
 145 static int display_text_info(void)
 146 {
 147 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 148         ulong bss_start, bss_end, text_base;
 149
 150         bss_start = (ulong)&__bss_start;
 151         bss_end = (ulong)&__bss_end;
 152
 153 #ifdef CONFIG_SYS_TEXT_BASE
 154         text_base = CONFIG_SYS_TEXT_BASE;
 155 #else
 156         text_base = CONFIG_SYS_MONITOR_BASE;
 157 #endif
 158
 159         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 160                 text_base, bss_start, bss_end);
 161 #endif
 162
 163 #ifdef CONFIG_MODEM_SUPPORT
 164         debug("Modem Support enabled\n");
 165 #endif
 166 #ifdef CONFIG_USE_IRQ
 167         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 168         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 169 #endif
 170
 171         return 0;
 172 }
 173
 174 static int announce_dram_init(void)
 175 {
 176         puts("DRAM:  ");
 177         return 0;
 178 }
 179
 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 181 static int init_func_ram(void)
 182 {
 183 #ifdef  CONFIG_BOARD_TYPES
 184         int board_type = gd->board_type;
 185 #else
 186         int board_type = 0;     /* use dummy arg */
 187 #endif
 188
 189         gd->ram_size = initdram(board_type);
 190
 191         if (gd->ram_size > 0)
 192                 return 0;
 193
 194         puts("*** failed ***\n");
 195         return 1;
 196 }
 197 #endif
 198
 199 static int show_dram_config(void)
 200 {
 201         unsigned long long size;
 202
 203 #ifdef CONFIG_NR_DRAM_BANKS
 204         int i;
 205
 206         debug("\nRAM Configuration:\n");
 207         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 208                 size += gd->bd->bi_dram[i].size;
 209                 debug("Bank #%d: %llx ", i,
 210                       (unsigned long long)(gd->bd->bi_dram[i].start));
 211 #ifdef DEBUG
 212                 print_size(gd->bd->bi_dram[i].size, "\n");
 213 #endif
 214         }
 215         debug("\nDRAM:  ");
 216 #else
 217         size = gd->ram_size;
 218 #endif
 219
 220         print_size(size, "");
 221         board_add_ram_info(0);
 222         putc('\n');
 223
 224         return 0;
 225 }
 226
 227 __weak void dram_init_banksize(void)
 228 {
 229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 230         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 231         gd->bd->bi_dram[0].size = get_effective_memsize();
 232 #endif
 233 }
 234
 235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 236 static int init_func_i2c(void)
 237 {
 238         puts("I2C:   ");
 239 #ifdef CONFIG_SYS_I2C
 240         i2c_init_all();
 241 #else
 242         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 243 #endif
 244         puts("ready\n");
 245         return 0;
 246 }
 247 #endif
 248
 249 #if defined(CONFIG_HARD_SPI)
 250 static int init_func_spi(void)
 251 {
 252         puts("SPI:   ");
 253         spi_init();
 254         puts("ready\n");
 255         return 0;
 256 }
 257 #endif
 258
 259 __maybe_unused
 260 static int zero_global_data(void)
 261 {
 262         memset((void *)gd, '\0', sizeof(gd_t));
 263
 264         return 0;
 265 }
 266
 267 static int setup_mon_len(void)
 268 {
 269 #if defined(__ARM__) || defined(__MICROBLAZE__)
 270         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 272         gd->mon_len = (ulong)&_end - (ulong)_init;
 273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 274         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 275 #elif defined(CONFIG_NDS32)
 276         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 277 #else
 278         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 279         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 280 #endif
 281         return 0;
 282 }
 283
 284 __weak int arch_cpu_init(void)
 285 {
 286         return 0;
 287 }
 288
 289 #ifdef CONFIG_SANDBOX
 290 static int setup_ram_buf(void)
 291 {
 292         struct sandbox_state *state = state_get_current();
 293
 294         gd->arch.ram_buf = state->ram_buf;
 295         gd->ram_size = state->ram_size;
 296
 297         return 0;
 298 }
 299 #endif
 300
 301 /* Get the top of usable RAM */
 302 __weak ulong board_get_usable_ram_top(ulong total_size)
 303 {
 304 #ifdef CONFIG_SYS_SDRAM_BASE
 305         /*
 306          * Detect whether we have so much RAM that it goes past the end of our
 307          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 308          */
 309         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 310                 /*
 311                  * Will wrap back to top of 32-bit space when reservations
 312                  * are made.
 313                  */
 314                 return 0;
 315 #endif
 316         return gd->ram_top;
 317 }
 318
 319 static int setup_dest_addr(void)
 320 {
 321         debug("Monitor len: %08lX\n", gd->mon_len);
 322         /*
 323          * Ram is setup, size stored in gd !!
 324          */
 325         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 326 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 327         /*
 328          * Subtract specified amount of memory to hide so that it won't
 329          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 330          * the Linux kernel should now get passed the now "corrected"
 331          * memory size and won't touch it either. This should work
 332          * for arch/ppc and arch/powerpc. Only Linux board ports in
 333          * arch/powerpc with bootwrapper support, that recalculate the
 334          * memory size from the SDRAM controller setup will have to
 335          * get fixed.
 336          */
 337         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 338 #endif
 339 #ifdef CONFIG_SYS_SDRAM_BASE
 340         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 341 #endif
 342         gd->ram_top += get_effective_memsize();
 343         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 344         gd->relocaddr = gd->ram_top;
 345         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 346 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 347         /*
 348          * We need to make sure the location we intend to put secondary core
 349          * boot code is reserved and not used by any part of u-boot
 350          */
 351         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 352                 gd->relocaddr = determine_mp_bootpg(NULL);
 353                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 354         }
 355 #endif
 356         return 0;
 357 }
 358
 359 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 360 static int reserve_logbuffer(void)
 361 {
 362         /* reserve kernel log buffer */
 363         gd->relocaddr -= LOGBUFF_RESERVE;
 364         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 365                 gd->relocaddr);
 366         return 0;
 367 }
 368 #endif
 369
 370 #ifdef CONFIG_PRAM
 371 /* reserve protected RAM */
 372 static int reserve_pram(void)
 373 {
 374         ulong reg;
 375
 376         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 377         gd->relocaddr -= (reg << 10);           /* size is in kB */
 378         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 379               gd->relocaddr);
 380         return 0;
 381 }
 382 #endif /* CONFIG_PRAM */
 383
 384 /* Round memory pointer down to next 4 kB limit */
 385 static int reserve_round_4k(void)
 386 {
 387         gd->relocaddr &= ~(4096 - 1);
 388         return 0;
 389 }
 390
 391 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 392                 defined(CONFIG_ARM)
 393 static int reserve_mmu(void)
 394 {
 395         /* reserve TLB table */
 396         gd->arch.tlb_size = PGTABLE_SIZE;
 397         gd->relocaddr -= gd->arch.tlb_size;
 398
 399         /* round down to next 64 kB limit */
 400         gd->relocaddr &= ~(0x10000 - 1);
 401
 402         gd->arch.tlb_addr = gd->relocaddr;
 403         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 404               gd->arch.tlb_addr + gd->arch.tlb_size);
 405         return 0;
 406 }
 407 #endif
 408
 409 #ifdef CONFIG_LCD
 410 static int reserve_lcd(void)
 411 {
 412 #ifdef CONFIG_FB_ADDR
 413         gd->fb_base = CONFIG_FB_ADDR;
 414 #else
 415         /* reserve memory for LCD display (always full pages) */
 416         gd->relocaddr = lcd_setmem(gd->relocaddr);
 417         gd->fb_base = gd->relocaddr;
 418 #endif /* CONFIG_FB_ADDR */
 419         return 0;
 420 }
 421 #endif /* CONFIG_LCD */
 422
 423 static int reserve_trace(void)
 424 {
 425 #ifdef CONFIG_TRACE
 426         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 427         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 428         debug("Reserving %dk for trace data at: %08lx\n",
 429               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 430 #endif
 431
 432         return 0;
 433 }
 434
 435 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 436                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 437                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 438 static int reserve_video(void)
 439 {
 440         /* reserve memory for video display (always full pages) */
 441         gd->relocaddr = video_setmem(gd->relocaddr);
 442         gd->fb_base = gd->relocaddr;
 443
 444         return 0;
 445 }
 446 #endif
 447
 448 static int reserve_uboot(void)
 449 {
 450         /*
 451          * reserve memory for U-Boot code, data & bss
 452          * round down to next 4 kB limit
 453          */
 454         gd->relocaddr -= gd->mon_len;
 455         gd->relocaddr &= ~(4096 - 1);
 456 #ifdef CONFIG_E500
 457         /* round down to next 64 kB limit so that IVPR stays aligned */
 458         gd->relocaddr &= ~(65536 - 1);
 459 #endif
 460
 461         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 462               gd->relocaddr);
 463
 464         gd->start_addr_sp = gd->relocaddr;
 465
 466         return 0;
 467 }
 468
 469 #ifndef CONFIG_SPL_BUILD
 470 /* reserve memory for malloc() area */
 471 static int reserve_malloc(void)
 472 {
 473         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 474         debug("Reserving %dk for malloc() at: %08lx\n",
 475                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 476         return 0;
 477 }
 478
 479 /* (permanently) allocate a Board Info struct */
 480 static int reserve_board(void)
 481 {
 482         if (!gd->bd) {
 483                 gd->start_addr_sp -= sizeof(bd_t);
 484                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 485                 memset(gd->bd, '\0', sizeof(bd_t));
 486                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 487                       sizeof(bd_t), gd->start_addr_sp);
 488         }
 489         return 0;
 490 }
 491 #endif
 492
 493 static int setup_machine(void)
 494 {
 495 #ifdef CONFIG_MACH_TYPE
 496         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 497 #endif
 498         return 0;
 499 }
 500
 501 static int reserve_global_data(void)
 502 {
 503         gd->start_addr_sp -= sizeof(gd_t);
 504         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 505         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 506                         sizeof(gd_t), gd->start_addr_sp);
 507         return 0;
 508 }
 509
 510 static int reserve_fdt(void)
 511 {
 512         /*
 513          * If the device tree is sitting immediately above our image then we
 514          * must relocate it. If it is embedded in the data section, then it
 515          * will be relocated with other data.
 516          */
 517         if (gd->fdt_blob) {
 518                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 519
 520                 gd->start_addr_sp -= gd->fdt_size;
 521                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 522                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 523                       gd->fdt_size, gd->start_addr_sp);
 524         }
 525
 526         return 0;
 527 }
 528
 529 int arch_reserve_stacks(void)
 530 {
 531         return 0;
 532 }
 533
 534 static int reserve_stacks(void)
 535 {
 536         /* make stack pointer 16-byte aligned */
 537         gd->start_addr_sp -= 16;
 538         gd->start_addr_sp &= ~0xf;
 539
 540         /*
 541          * let the architecture-specific code tailor gd->start_addr_sp and
 542          * gd->irq_sp
 543          */
 544         return arch_reserve_stacks();
 545 }
 546
 547 static int display_new_sp(void)
 548 {
 549         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 550
 551         return 0;
 552 }
 553
 554 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 555 static int setup_board_part1(void)
 556 {
 557         bd_t *bd = gd->bd;
 558
 559         /*
 560          * Save local variables to board info struct
 561          */
 562         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 563         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 564
 565 #ifdef CONFIG_SYS_SRAM_BASE
 566         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 567         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 568 #endif
 569
 570 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 571                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 572         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 573 #endif
 574 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 575         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 576 #endif
 577 #if defined(CONFIG_MPC83xx)
 578         bd->bi_immrbar = CONFIG_SYS_IMMR;
 579 #endif
 580
 581         return 0;
 582 }
 583
 584 static int setup_board_part2(void)
 585 {
 586         bd_t *bd = gd->bd;
 587
 588         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 589         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 590 #if defined(CONFIG_CPM2)
 591         bd->bi_cpmfreq = gd->arch.cpm_clk;
 592         bd->bi_brgfreq = gd->arch.brg_clk;
 593         bd->bi_sccfreq = gd->arch.scc_clk;
 594         bd->bi_vco = gd->arch.vco_out;
 595 #endif /* CONFIG_CPM2 */
 596 #if defined(CONFIG_MPC512X)
 597         bd->bi_ipsfreq = gd->arch.ips_clk;
 598 #endif /* CONFIG_MPC512X */
 599 #if defined(CONFIG_MPC5xxx)
 600         bd->bi_ipbfreq = gd->arch.ipb_clk;
 601         bd->bi_pcifreq = gd->pci_clk;
 602 #endif /* CONFIG_MPC5xxx */
 603 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 604         bd->bi_pcifreq = gd->pci_clk;
 605 #endif
 606 #if defined(CONFIG_EXTRA_CLOCK)
 607         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 608         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 609         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 610 #endif
 611
 612         return 0;
 613 }
 614 #endif
 615
 616 #ifdef CONFIG_SYS_EXTBDINFO
 617 static int setup_board_extra(void)
 618 {
 619         bd_t *bd = gd->bd;
 620
 621         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 622         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 623                 sizeof(bd->bi_r_version));
 624
 625         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 626         bd->bi_plb_busfreq = gd->bus_clk;
 627 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 628                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 629                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 630         bd->bi_pci_busfreq = get_PCI_freq();
 631         bd->bi_opbfreq = get_OPB_freq();
 632 #elif defined(CONFIG_XILINX_405)
 633         bd->bi_pci_busfreq = get_PCI_freq();
 634 #endif
 635
 636         return 0;
 637 }
 638 #endif
 639
 640 #ifdef CONFIG_POST
 641 static int init_post(void)
 642 {
 643         post_bootmode_init();
 644         post_run(NULL, POST_ROM | post_bootmode_get(0));
 645
 646         return 0;
 647 }
 648 #endif
 649
 650 static int setup_dram_config(void)
 651 {
 652         /* Ram is board specific, so move it to board code ... */
 653         dram_init_banksize();
 654
 655         return 0;
 656 }
 657
 658 static int reloc_fdt(void)
 659 {
 660         if (gd->flags & GD_FLG_SKIP_RELOC)
 661                 return 0;
 662         if (gd->new_fdt) {
 663                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 664                 gd->fdt_blob = gd->new_fdt;
 665         }
 666
 667         return 0;
 668 }
 669
 670 static int setup_reloc(void)
 671 {
 672         if (gd->flags & GD_FLG_SKIP_RELOC) {
 673                 debug("Skipping relocation due to flag\n");
 674                 return 0;
 675         }
 676
 677 #ifdef CONFIG_SYS_TEXT_BASE
 678         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 679 #ifdef CONFIG_M68K
 680         /*
 681          * On all ColdFire arch cpu, monitor code starts always
 682          * just after the default vector table location, so at 0x400
 683          */
 684         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 685 #endif
 686 #endif
 687         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 688
 689         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 690         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 691               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 692               gd->start_addr_sp);
 693
 694         return 0;
 695 }
 696
 697 /* ARM calls relocate_code from its crt0.S */
 698 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 699
 700 static int jump_to_copy(void)
 701 {
 702         if (gd->flags & GD_FLG_SKIP_RELOC)
 703                 return 0;
 704         /*
 705          * x86 is special, but in a nice way. It uses a trampoline which
 706          * enables the dcache if possible.
 707          *
 708          * For now, other archs use relocate_code(), which is implemented
 709          * similarly for all archs. When we do generic relocation, hopefully
 710          * we can make all archs enable the dcache prior to relocation.
 711          */
 712 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 713         /*
 714          * SDRAM and console are now initialised. The final stack can now
 715          * be setup in SDRAM. Code execution will continue in Flash, but
 716          * with the stack in SDRAM and Global Data in temporary memory
 717          * (CPU cache)
 718          */
 719         arch_setup_gd(gd->new_gd);
 720         board_init_f_r_trampoline(gd->start_addr_sp);
 721 #else
 722         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 723 #endif
 724
 725         return 0;
 726 }
 727 #endif
 728
 729 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 730 static int mark_bootstage(void)
 731 {
 732         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 733
 734         return 0;
 735 }
 736
 737 static int initf_dm(void)
 738 {
 739 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 740         int ret;
 741
 742         ret = dm_init_and_scan(true);
 743         if (ret)
 744                 return ret;
 745 #endif
 746
 747         return 0;
 748 }
 749
 750 /* Architecture-specific memory reservation */
 751 __weak int reserve_arch(void)
 752 {
 753         return 0;
 754 }
 755
 756 __weak int arch_cpu_init_dm(void)
 757 {
 758         return 0;
 759 }
 760
 761 static init_fnc_t init_sequence_f[] = {
 762 #ifdef CONFIG_SANDBOX
 763         setup_ram_buf,
 764 #endif
 765         setup_mon_len,
 766 #ifdef CONFIG_OF_CONTROL
 767         fdtdec_setup,
 768 #endif
 769 #ifdef CONFIG_TRACE
 770         trace_early_init,
 771 #endif
 772         initf_malloc,
 773 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 774         /* TODO: can this go into arch_cpu_init()? */
 775         probecpu,
 776 #endif
 777 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 778         x86_fsp_init,
 779 #endif
 780         arch_cpu_init,          /* basic arch cpu dependent setup */
 781         mark_bootstage,
 782         initf_dm,
 783         arch_cpu_init_dm,
 784 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 785         board_early_init_f,
 786 #endif
 787         /* TODO: can any of this go into arch_cpu_init()? */
 788 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 789         get_clocks,             /* get CPU and bus clocks (etc.) */
 790 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 791                 && !defined(CONFIG_TQM885D)
 792         adjust_sdram_tbs_8xx,
 793 #endif
 794         /* TODO: can we rename this to timer_init()? */
 795         init_timebase,
 796 #endif
 797 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
 798                 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
 799         timer_init,             /* initialize timer */
 800 #endif
 801 #ifdef CONFIG_SYS_ALLOC_DPRAM
 802 #if !defined(CONFIG_CPM2)
 803         dpram_init,
 804 #endif
 805 #endif
 806 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 807         board_postclk_init,
 808 #endif
 809 #ifdef CONFIG_FSL_ESDHC
 810         get_clocks,
 811 #endif
 812 #ifdef CONFIG_M68K
 813         get_clocks,
 814 #endif
 815         env_init,               /* initialize environment */
 816 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 817         /* get CPU and bus clocks according to the environment variable */
 818         get_clocks_866,
 819         /* adjust sdram refresh rate according to the new clock */
 820         sdram_adjust_866,
 821         init_timebase,
 822 #endif
 823         init_baud_rate,         /* initialze baudrate settings */
 824         serial_init,            /* serial communications setup */
 825         console_init_f,         /* stage 1 init of console */
 826 #ifdef CONFIG_SANDBOX
 827         sandbox_early_getopt_check,
 828 #endif
 829 #ifdef CONFIG_OF_CONTROL
 830         fdtdec_prepare_fdt,
 831 #endif
 832         display_options,        /* say that we are here */
 833         display_text_info,      /* show debugging info if required */
 834 #if defined(CONFIG_MPC8260)
 835         prt_8260_rsr,
 836         prt_8260_clks,
 837 #endif /* CONFIG_MPC8260 */
 838 #if defined(CONFIG_MPC83xx)
 839         prt_83xx_rsr,
 840 #endif
 841 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 842         checkcpu,
 843 #endif
 844         print_cpuinfo,          /* display cpu info (and speed) */
 845 #if defined(CONFIG_MPC5xxx)
 846         prt_mpc5xxx_clks,
 847 #endif /* CONFIG_MPC5xxx */
 848 #if defined(CONFIG_DISPLAY_BOARDINFO)
 849         show_board_info,
 850 #endif
 851         INIT_FUNC_WATCHDOG_INIT
 852 #if defined(CONFIG_MISC_INIT_F)
 853         misc_init_f,
 854 #endif
 855         INIT_FUNC_WATCHDOG_RESET
 856 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 857         init_func_i2c,
 858 #endif
 859 #if defined(CONFIG_HARD_SPI)
 860         init_func_spi,
 861 #endif
 862         announce_dram_init,
 863         /* TODO: unify all these dram functions? */
 864 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 865                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 866         dram_init,              /* configure available RAM banks */
 867 #endif
 868 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 869         init_func_ram,
 870 #endif
 871 #ifdef CONFIG_POST
 872         post_init_f,
 873 #endif
 874         INIT_FUNC_WATCHDOG_RESET
 875 #if defined(CONFIG_SYS_DRAM_TEST)
 876         testdram,
 877 #endif /* CONFIG_SYS_DRAM_TEST */
 878         INIT_FUNC_WATCHDOG_RESET
 879
 880 #ifdef CONFIG_POST
 881         init_post,
 882 #endif
 883         INIT_FUNC_WATCHDOG_RESET
 884         /*
 885          * Now that we have DRAM mapped and working, we can
 886          * relocate the code and continue running from DRAM.
 887          *
 888          * Reserve memory at end of RAM for (top down in that order):
 889          *  - area that won't get touched by U-Boot and Linux (optional)
 890          *  - kernel log buffer
 891          *  - protected RAM
 892          *  - LCD framebuffer
 893          *  - monitor code
 894          *  - board info struct
 895          */
 896         setup_dest_addr,
 897 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 898         /* Blackfin u-boot monitor should be on top of the ram */
 899         reserve_uboot,
 900 #endif
 901 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 902         reserve_logbuffer,
 903 #endif
 904 #ifdef CONFIG_PRAM
 905         reserve_pram,
 906 #endif
 907         reserve_round_4k,
 908 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 909                 defined(CONFIG_ARM)
 910         reserve_mmu,
 911 #endif
 912 #ifdef CONFIG_LCD
 913         reserve_lcd,
 914 #endif
 915         reserve_trace,
 916         /* TODO: Why the dependency on CONFIG_8xx? */
 917 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 918                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 919                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 920         reserve_video,
 921 #endif
 922 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
 923         reserve_uboot,
 924 #endif
 925 #ifndef CONFIG_SPL_BUILD
 926         reserve_malloc,
 927         reserve_board,
 928 #endif
 929         setup_machine,
 930         reserve_global_data,
 931         reserve_fdt,
 932         reserve_arch,
 933         reserve_stacks,
 934         setup_dram_config,
 935         show_dram_config,
 936 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 937         setup_board_part1,
 938         INIT_FUNC_WATCHDOG_RESET
 939         setup_board_part2,
 940 #endif
 941         display_new_sp,
 942 #ifdef CONFIG_SYS_EXTBDINFO
 943         setup_board_extra,
 944 #endif
 945         INIT_FUNC_WATCHDOG_RESET
 946         reloc_fdt,
 947         setup_reloc,
 948 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 949         copy_uboot_to_ram,
 950         clear_bss,
 951         do_elf_reloc_fixups,
 952 #endif
 953 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 954         jump_to_copy,
 955 #endif
 956         NULL,
 957 };
 958
 959 void board_init_f(ulong boot_flags)
 960 {
 961 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
 962         /*
 963          * For some archtectures, global data is initialized and used before
 964          * calling this function. The data should be preserved. For others,
 965          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
 966          * here to host global data until relocation.
 967          */
 968         gd_t data;
 969
 970         gd = &data;
 971
 972         /*
 973          * Clear global data before it is accessed at debug print
 974          * in initcall_run_list. Otherwise the debug print probably
 975          * get the wrong vaule of gd->have_console.
 976          */
 977         zero_global_data();
 978 #endif
 979
 980         gd->flags = boot_flags;
 981         gd->have_console = 0;
 982
 983         if (initcall_run_list(init_sequence_f))
 984                 hang();
 985
 986 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 987                 !defined(CONFIG_EFI_APP)
 988         /* NOTREACHED - jump_to_copy() does not return */
 989         hang();
 990 #endif
 991 }
 992
 993 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 994 /*
 995  * For now this code is only used on x86.
 996  *
 997  * init_sequence_f_r is the list of init functions which are run when
 998  * U-Boot is executing from Flash with a semi-limited 'C' environment.
 999  * The following limitations must be considered when implementing an
1000  * '_f_r' function:
1001  *  - 'static' variables are read-only
1002  *  - Global Data (gd->xxx) is read/write
1003  *
1004  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1005  * supported).  It _should_, if possible, copy global data to RAM and
1006  * initialise the CPU caches (to speed up the relocation process)
1007  *
1008  * NOTE: At present only x86 uses this route, but it is intended that
1009  * all archs will move to this when generic relocation is implemented.
1010  */
1011 static init_fnc_t init_sequence_f_r[] = {
1012         init_cache_f_r,
1013
1014         NULL,
1015 };
1016
1017 void board_init_f_r(void)
1018 {
1019         if (initcall_run_list(init_sequence_f_r))
1020                 hang();
1021
1022         /*
1023          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1024          * Transfer execution from Flash to RAM by calculating the address
1025          * of the in-RAM copy of board_init_r() and calling it
1026          */
1027         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1028
1029         /* NOTREACHED - board_init_r() does not return */
1030         hang();
1031 }
1032 #endif /* CONFIG_X86 */