common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <environment.h>
  17 #include <dm.h>
  18 #include <fdtdec.h>
  19 #include <fs.h>
  20 #if defined(CONFIG_CMD_IDE)
  21 #include <ide.h>
  22 #endif
  23 #include <i2c.h>
  24 #include <initcall.h>
  25 #include <logbuff.h>
  26
  27 /* TODO: Can we move these into arch/ headers? */
  28 #ifdef CONFIG_8xx
  29 #include <mpc8xx.h>
  30 #endif
  31 #ifdef CONFIG_5xx
  32 #include <mpc5xx.h>
  33 #endif
  34 #ifdef CONFIG_MPC5xxx
  35 #include <mpc5xxx.h>
  36 #endif
  37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  38 #include <asm/mp.h>
  39 #endif
  40
  41 #include <os.h>
  42 #include <post.h>
  43 #include <spi.h>
  44 #include <status_led.h>
  45 #include <trace.h>
  46 #include <watchdog.h>
  47 #include <asm/errno.h>
  48 #include <asm/io.h>
  49 #include <asm/sections.h>
  50 #ifdef CONFIG_X86
  51 #include <asm/init_helpers.h>
  52 #include <asm/relocate.h>
  53 #endif
  54 #ifdef CONFIG_SANDBOX
  55 #include <asm/state.h>
  56 #endif
  57 #include <dm/root.h>
  58 #include <linux/compiler.h>
  59
  60 /*
  61  * Pointer to initial global data area
  62  *
  63  * Here we initialize it if needed.
  64  */
  65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  66 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  67 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  69 #else
  70 DECLARE_GLOBAL_DATA_PTR;
  71 #endif
  72
  73 /*
  74  * sjg: IMO this code should be
  75  * refactored to a single function, something like:
  76  *
  77  * void led_set_state(enum led_colour_t colour, int on);
  78  */
  79 /************************************************************************
  80  * Coloured LED functionality
  81  ************************************************************************
  82  * May be supplied by boards if desired
  83  */
  84 __weak void coloured_LED_init(void) {}
  85 __weak void red_led_on(void) {}
  86 __weak void red_led_off(void) {}
  87 __weak void green_led_on(void) {}
  88 __weak void green_led_off(void) {}
  89 __weak void yellow_led_on(void) {}
  90 __weak void yellow_led_off(void) {}
  91 __weak void blue_led_on(void) {}
  92 __weak void blue_led_off(void) {}
  93
  94 /*
  95  * Why is gd allocated a register? Prior to reloc it might be better to
  96  * just pass it around to each function in this file?
  97  *
  98  * After reloc one could argue that it is hardly used and doesn't need
  99  * to be in a register. Or if it is it should perhaps hold pointers to all
 100  * global data for all modules, so that post-reloc we can avoid the massive
 101  * literal pool we get on ARM. Or perhaps just encourage each module to use
 102  * a structure...
 103  */
 104
 105 /*
 106  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 107  */
 108
 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 110 static int init_func_watchdog_init(void)
 111 {
 112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 113         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 114         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG))
 115         hw_watchdog_init();
 116 # endif
 117         puts("       Watchdog enabled\n");
 118         WATCHDOG_RESET();
 119
 120         return 0;
 121 }
 122
 123 int init_func_watchdog_reset(void)
 124 {
 125         WATCHDOG_RESET();
 126
 127         return 0;
 128 }
 129 #endif /* CONFIG_WATCHDOG */
 130
 131 __weak void board_add_ram_info(int use_default)
 132 {
 133         /* please define platform specific board_add_ram_info() */
 134 }
 135
 136 static int init_baud_rate(void)
 137 {
 138         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 139         return 0;
 140 }
 141
 142 static int display_text_info(void)
 143 {
 144 #ifndef CONFIG_SANDBOX
 145         ulong bss_start, bss_end, text_base;
 146
 147         bss_start = (ulong)&__bss_start;
 148         bss_end = (ulong)&__bss_end;
 149
 150 #ifdef CONFIG_SYS_TEXT_BASE
 151         text_base = CONFIG_SYS_TEXT_BASE;
 152 #else
 153         text_base = CONFIG_SYS_MONITOR_BASE;
 154 #endif
 155
 156         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 157                 text_base, bss_start, bss_end);
 158 #endif
 159
 160 #ifdef CONFIG_MODEM_SUPPORT
 161         debug("Modem Support enabled\n");
 162 #endif
 163 #ifdef CONFIG_USE_IRQ
 164         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 165         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 166 #endif
 167
 168         return 0;
 169 }
 170
 171 static int announce_dram_init(void)
 172 {
 173         puts("DRAM:  ");
 174         return 0;
 175 }
 176
 177 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
 178 static int init_func_ram(void)
 179 {
 180 #ifdef  CONFIG_BOARD_TYPES
 181         int board_type = gd->board_type;
 182 #else
 183         int board_type = 0;     /* use dummy arg */
 184 #endif
 185
 186         gd->ram_size = initdram(board_type);
 187
 188         if (gd->ram_size > 0)
 189                 return 0;
 190
 191         puts("*** failed ***\n");
 192         return 1;
 193 }
 194 #endif
 195
 196 static int show_dram_config(void)
 197 {
 198         unsigned long long size;
 199
 200 #ifdef CONFIG_NR_DRAM_BANKS
 201         int i;
 202
 203         debug("\nRAM Configuration:\n");
 204         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 205                 size += gd->bd->bi_dram[i].size;
 206                 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
 207 #ifdef DEBUG
 208                 print_size(gd->bd->bi_dram[i].size, "\n");
 209 #endif
 210         }
 211         debug("\nDRAM:  ");
 212 #else
 213         size = gd->ram_size;
 214 #endif
 215
 216         print_size(size, "");
 217         board_add_ram_info(0);
 218         putc('\n');
 219
 220         return 0;
 221 }
 222
 223 __weak void dram_init_banksize(void)
 224 {
 225 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 226         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 227         gd->bd->bi_dram[0].size = get_effective_memsize();
 228 #endif
 229 }
 230
 231 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 232 static int init_func_i2c(void)
 233 {
 234         puts("I2C:   ");
 235 #ifdef CONFIG_SYS_I2C
 236         i2c_init_all();
 237 #else
 238         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 239 #endif
 240         puts("ready\n");
 241         return 0;
 242 }
 243 #endif
 244
 245 #if defined(CONFIG_HARD_SPI)
 246 static int init_func_spi(void)
 247 {
 248         puts("SPI:   ");
 249         spi_init();
 250         puts("ready\n");
 251         return 0;
 252 }
 253 #endif
 254
 255 __maybe_unused
 256 static int zero_global_data(void)
 257 {
 258         memset((void *)gd, '\0', sizeof(gd_t));
 259
 260         return 0;
 261 }
 262
 263 static int setup_mon_len(void)
 264 {
 265 #if defined(__ARM__) || defined(__MICROBLAZE__)
 266         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 267 #elif defined(CONFIG_SANDBOX)
 268         gd->mon_len = (ulong)&_end - (ulong)_init;
 269 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 270         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 271 #else
 272         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 273         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 274 #endif
 275         return 0;
 276 }
 277
 278 __weak int arch_cpu_init(void)
 279 {
 280         return 0;
 281 }
 282
 283 #ifdef CONFIG_OF_HOSTFILE
 284
 285 static int read_fdt_from_file(void)
 286 {
 287         struct sandbox_state *state = state_get_current();
 288         const char *fname = state->fdt_fname;
 289         void *blob;
 290         loff_t size;
 291         int err;
 292         int fd;
 293
 294         blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
 295         if (!state->fdt_fname) {
 296                 err = fdt_create_empty_tree(blob, 256);
 297                 if (!err)
 298                         goto done;
 299                 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
 300                 return -EINVAL;
 301         }
 302
 303         err = os_get_filesize(fname, &size);
 304         if (err < 0) {
 305                 printf("Failed to file FDT file '%s'\n", fname);
 306                 return err;
 307         }
 308         fd = os_open(fname, OS_O_RDONLY);
 309         if (fd < 0) {
 310                 printf("Failed to open FDT file '%s'\n", fname);
 311                 return -EACCES;
 312         }
 313         if (os_read(fd, blob, size) != size) {
 314                 os_close(fd);
 315                 return -EIO;
 316         }
 317         os_close(fd);
 318
 319 done:
 320         gd->fdt_blob = blob;
 321
 322         return 0;
 323 }
 324 #endif
 325
 326 #ifdef CONFIG_SANDBOX
 327 static int setup_ram_buf(void)
 328 {
 329         struct sandbox_state *state = state_get_current();
 330
 331         gd->arch.ram_buf = state->ram_buf;
 332         gd->ram_size = state->ram_size;
 333
 334         return 0;
 335 }
 336 #endif
 337
 338 static int setup_fdt(void)
 339 {
 340 #ifdef CONFIG_OF_CONTROL
 341 # ifdef CONFIG_OF_EMBED
 342         /* Get a pointer to the FDT */
 343         gd->fdt_blob = __dtb_dt_begin;
 344 # elif defined CONFIG_OF_SEPARATE
 345         /* FDT is at end of image */
 346         gd->fdt_blob = (ulong *)&_end;
 347 # elif defined(CONFIG_OF_HOSTFILE)
 348         if (read_fdt_from_file()) {
 349                 puts("Failed to read control FDT\n");
 350                 return -1;
 351         }
 352 # endif
 353         /* Allow the early environment to override the fdt address */
 354         gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
 355                                                 (uintptr_t)gd->fdt_blob);
 356 #endif
 357         return 0;
 358 }
 359
 360 /* Get the top of usable RAM */
 361 __weak ulong board_get_usable_ram_top(ulong total_size)
 362 {
 363 #ifdef CONFIG_SYS_SDRAM_BASE
 364         /*
 365          * Detect whether we have so much RAM it goes past the end of our
 366          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 367          */
 368         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 369                 /*
 370                  * Will wrap back to top of 32-bit space when reservations
 371                  * are made.
 372                  */
 373                 return 0;
 374 #endif
 375         return gd->ram_top;
 376 }
 377
 378 static int setup_dest_addr(void)
 379 {
 380         debug("Monitor len: %08lX\n", gd->mon_len);
 381         /*
 382          * Ram is setup, size stored in gd !!
 383          */
 384         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 385 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 386         /*
 387          * Subtract specified amount of memory to hide so that it won't
 388          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 389          * the Linux kernel should now get passed the now "corrected"
 390          * memory size and won't touch it either. This should work
 391          * for arch/ppc and arch/powerpc. Only Linux board ports in
 392          * arch/powerpc with bootwrapper support, that recalculate the
 393          * memory size from the SDRAM controller setup will have to
 394          * get fixed.
 395          */
 396         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 397 #endif
 398 #ifdef CONFIG_SYS_SDRAM_BASE
 399         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 400 #endif
 401         gd->ram_top += get_effective_memsize();
 402         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 403         gd->relocaddr = gd->ram_top;
 404         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 405 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 406         /*
 407          * We need to make sure the location we intend to put secondary core
 408          * boot code is reserved and not used by any part of u-boot
 409          */
 410         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 411                 gd->relocaddr = determine_mp_bootpg(NULL);
 412                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 413         }
 414 #endif
 415         return 0;
 416 }
 417
 418 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 419 static int reserve_logbuffer(void)
 420 {
 421         /* reserve kernel log buffer */
 422         gd->relocaddr -= LOGBUFF_RESERVE;
 423         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 424                 gd->relocaddr);
 425         return 0;
 426 }
 427 #endif
 428
 429 #ifdef CONFIG_PRAM
 430 /* reserve protected RAM */
 431 static int reserve_pram(void)
 432 {
 433         ulong reg;
 434
 435         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 436         gd->relocaddr -= (reg << 10);           /* size is in kB */
 437         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 438               gd->relocaddr);
 439         return 0;
 440 }
 441 #endif /* CONFIG_PRAM */
 442
 443 /* Round memory pointer down to next 4 kB limit */
 444 static int reserve_round_4k(void)
 445 {
 446         gd->relocaddr &= ~(4096 - 1);
 447         return 0;
 448 }
 449
 450 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 451                 defined(CONFIG_ARM)
 452 static int reserve_mmu(void)
 453 {
 454         /* reserve TLB table */
 455         gd->arch.tlb_size = PGTABLE_SIZE;
 456         gd->relocaddr -= gd->arch.tlb_size;
 457
 458         /* round down to next 64 kB limit */
 459         gd->relocaddr &= ~(0x10000 - 1);
 460
 461         gd->arch.tlb_addr = gd->relocaddr;
 462         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 463               gd->arch.tlb_addr + gd->arch.tlb_size);
 464         return 0;
 465 }
 466 #endif
 467
 468 #ifdef CONFIG_LCD
 469 static int reserve_lcd(void)
 470 {
 471 #ifdef CONFIG_FB_ADDR
 472         gd->fb_base = CONFIG_FB_ADDR;
 473 #else
 474         /* reserve memory for LCD display (always full pages) */
 475         gd->relocaddr = lcd_setmem(gd->relocaddr);
 476         gd->fb_base = gd->relocaddr;
 477 #endif /* CONFIG_FB_ADDR */
 478         return 0;
 479 }
 480 #endif /* CONFIG_LCD */
 481
 482 static int reserve_trace(void)
 483 {
 484 #ifdef CONFIG_TRACE
 485         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 486         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 487         debug("Reserving %dk for trace data at: %08lx\n",
 488               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 489 #endif
 490
 491         return 0;
 492 }
 493
 494 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 495                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 496                 !defined(CONFIG_BLACKFIN)
 497 static int reserve_video(void)
 498 {
 499         /* reserve memory for video display (always full pages) */
 500         gd->relocaddr = video_setmem(gd->relocaddr);
 501         gd->fb_base = gd->relocaddr;
 502
 503         return 0;
 504 }
 505 #endif
 506
 507 static int reserve_uboot(void)
 508 {
 509         /*
 510          * reserve memory for U-Boot code, data & bss
 511          * round down to next 4 kB limit
 512          */
 513         gd->relocaddr -= gd->mon_len;
 514         gd->relocaddr &= ~(4096 - 1);
 515 #ifdef CONFIG_E500
 516         /* round down to next 64 kB limit so that IVPR stays aligned */
 517         gd->relocaddr &= ~(65536 - 1);
 518 #endif
 519
 520         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 521               gd->relocaddr);
 522
 523         gd->start_addr_sp = gd->relocaddr;
 524
 525         return 0;
 526 }
 527
 528 #ifndef CONFIG_SPL_BUILD
 529 /* reserve memory for malloc() area */
 530 static int reserve_malloc(void)
 531 {
 532         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 533         debug("Reserving %dk for malloc() at: %08lx\n",
 534                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 535         return 0;
 536 }
 537
 538 /* (permanently) allocate a Board Info struct */
 539 static int reserve_board(void)
 540 {
 541         if (!gd->bd) {
 542                 gd->start_addr_sp -= sizeof(bd_t);
 543                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 544                 memset(gd->bd, '\0', sizeof(bd_t));
 545                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 546                       sizeof(bd_t), gd->start_addr_sp);
 547         }
 548         return 0;
 549 }
 550 #endif
 551
 552 static int setup_machine(void)
 553 {
 554 #ifdef CONFIG_MACH_TYPE
 555         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 556 #endif
 557         return 0;
 558 }
 559
 560 static int reserve_global_data(void)
 561 {
 562         gd->start_addr_sp -= sizeof(gd_t);
 563         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 564         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 565                         sizeof(gd_t), gd->start_addr_sp);
 566         return 0;
 567 }
 568
 569 static int reserve_fdt(void)
 570 {
 571         /*
 572          * If the device tree is sitting immediate above our image then we
 573          * must relocate it. If it is embedded in the data section, then it
 574          * will be relocated with other data.
 575          */
 576         if (gd->fdt_blob) {
 577                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 578
 579                 gd->start_addr_sp -= gd->fdt_size;
 580                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 581                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 582                       gd->fdt_size, gd->start_addr_sp);
 583         }
 584
 585         return 0;
 586 }
 587
 588 int arch_reserve_stacks(void)
 589 {
 590         return 0;
 591 }
 592
 593 static int reserve_stacks(void)
 594 {
 595         /* make stack pointer 16-byte aligned */
 596         gd->start_addr_sp -= 16;
 597         gd->start_addr_sp &= ~0xf;
 598
 599         /*
 600          * let the architecture specific code tailor gd->start_addr_sp and
 601          * gd->irq_sp
 602          */
 603         return arch_reserve_stacks();
 604 }
 605
 606 static int display_new_sp(void)
 607 {
 608         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 609
 610         return 0;
 611 }
 612
 613 #ifdef CONFIG_PPC
 614 static int setup_board_part1(void)
 615 {
 616         bd_t *bd = gd->bd;
 617
 618         /*
 619          * Save local variables to board info struct
 620          */
 621
 622         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 623         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 624
 625 #ifdef CONFIG_SYS_SRAM_BASE
 626         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 627         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 628 #endif
 629
 630 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 631                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 632         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 633 #endif
 634 #if defined(CONFIG_MPC5xxx)
 635         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 636 #endif
 637 #if defined(CONFIG_MPC83xx)
 638         bd->bi_immrbar = CONFIG_SYS_IMMR;
 639 #endif
 640
 641         return 0;
 642 }
 643
 644 static int setup_board_part2(void)
 645 {
 646         bd_t *bd = gd->bd;
 647
 648         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 649         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 650 #if defined(CONFIG_CPM2)
 651         bd->bi_cpmfreq = gd->arch.cpm_clk;
 652         bd->bi_brgfreq = gd->arch.brg_clk;
 653         bd->bi_sccfreq = gd->arch.scc_clk;
 654         bd->bi_vco = gd->arch.vco_out;
 655 #endif /* CONFIG_CPM2 */
 656 #if defined(CONFIG_MPC512X)
 657         bd->bi_ipsfreq = gd->arch.ips_clk;
 658 #endif /* CONFIG_MPC512X */
 659 #if defined(CONFIG_MPC5xxx)
 660         bd->bi_ipbfreq = gd->arch.ipb_clk;
 661         bd->bi_pcifreq = gd->pci_clk;
 662 #endif /* CONFIG_MPC5xxx */
 663
 664         return 0;
 665 }
 666 #endif
 667
 668 #ifdef CONFIG_SYS_EXTBDINFO
 669 static int setup_board_extra(void)
 670 {
 671         bd_t *bd = gd->bd;
 672
 673         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 674         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 675                 sizeof(bd->bi_r_version));
 676
 677         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 678         bd->bi_plb_busfreq = gd->bus_clk;
 679 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 680                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 681                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 682         bd->bi_pci_busfreq = get_PCI_freq();
 683         bd->bi_opbfreq = get_OPB_freq();
 684 #elif defined(CONFIG_XILINX_405)
 685         bd->bi_pci_busfreq = get_PCI_freq();
 686 #endif
 687
 688         return 0;
 689 }
 690 #endif
 691
 692 #ifdef CONFIG_POST
 693 static int init_post(void)
 694 {
 695         post_bootmode_init();
 696         post_run(NULL, POST_ROM | post_bootmode_get(0));
 697
 698         return 0;
 699 }
 700 #endif
 701
 702 static int setup_dram_config(void)
 703 {
 704         /* Ram is board specific, so move it to board code ... */
 705         dram_init_banksize();
 706
 707         return 0;
 708 }
 709
 710 static int reloc_fdt(void)
 711 {
 712         if (gd->new_fdt) {
 713                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 714                 gd->fdt_blob = gd->new_fdt;
 715         }
 716
 717         return 0;
 718 }
 719
 720 static int setup_reloc(void)
 721 {
 722 #ifdef CONFIG_SYS_TEXT_BASE
 723         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 724 #endif
 725         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 726
 727         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 728         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 729               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 730               gd->start_addr_sp);
 731
 732         return 0;
 733 }
 734
 735 /* ARM calls relocate_code from its crt0.S */
 736 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 737
 738 static int jump_to_copy(void)
 739 {
 740         /*
 741          * x86 is special, but in a nice way. It uses a trampoline which
 742          * enables the dcache if possible.
 743          *
 744          * For now, other archs use relocate_code(), which is implemented
 745          * similarly for all archs. When we do generic relocation, hopefully
 746          * we can make all archs enable the dcache prior to relocation.
 747          */
 748 #ifdef CONFIG_X86
 749         /*
 750          * SDRAM and console are now initialised. The final stack can now
 751          * be setup in SDRAM. Code execution will continue in Flash, but
 752          * with the stack in SDRAM and Global Data in temporary memory
 753          * (CPU cache)
 754          */
 755         board_init_f_r_trampoline(gd->start_addr_sp);
 756 #else
 757         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 758 #endif
 759
 760         return 0;
 761 }
 762 #endif
 763
 764 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 765 static int mark_bootstage(void)
 766 {
 767         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 768
 769         return 0;
 770 }
 771
 772 static int initf_malloc(void)
 773 {
 774 #ifdef CONFIG_SYS_MALLOC_F_LEN
 775         assert(gd->malloc_base);        /* Set up by crt0.S */
 776         gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
 777         gd->malloc_ptr = 0;
 778 #endif
 779
 780         return 0;
 781 }
 782
 783 static int initf_dm(void)
 784 {
 785 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 786         int ret;
 787
 788         ret = dm_init_and_scan(true);
 789         if (ret)
 790                 return ret;
 791 #endif
 792
 793         return 0;
 794 }
 795
 796 /* Architecture-specific memory reservation */
 797 __weak int reserve_arch(void)
 798 {
 799         return 0;
 800 }
 801
 802 static init_fnc_t init_sequence_f[] = {
 803 #ifdef CONFIG_SANDBOX
 804         setup_ram_buf,
 805 #endif
 806         setup_mon_len,
 807         setup_fdt,
 808 #ifdef CONFIG_TRACE
 809         trace_early_init,
 810 #endif
 811         initf_malloc,
 812 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 813         /* TODO: can this go into arch_cpu_init()? */
 814         probecpu,
 815 #endif
 816         arch_cpu_init,          /* basic arch cpu dependent setup */
 817         mark_bootstage,
 818 #ifdef CONFIG_OF_CONTROL
 819         fdtdec_check_fdt,
 820 #endif
 821         initf_dm,
 822 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 823         board_early_init_f,
 824 #endif
 825         /* TODO: can any of this go into arch_cpu_init()? */
 826 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 827         get_clocks,             /* get CPU and bus clocks (etc.) */
 828 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 829                 && !defined(CONFIG_TQM885D)
 830         adjust_sdram_tbs_8xx,
 831 #endif
 832         /* TODO: can we rename this to timer_init()? */
 833         init_timebase,
 834 #endif
 835 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
 836         timer_init,             /* initialize timer */
 837 #endif
 838 #ifdef CONFIG_SYS_ALLOC_DPRAM
 839 #if !defined(CONFIG_CPM2)
 840         dpram_init,
 841 #endif
 842 #endif
 843 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 844         board_postclk_init,
 845 #endif
 846 #ifdef CONFIG_FSL_ESDHC
 847         get_clocks,
 848 #endif
 849         env_init,               /* initialize environment */
 850 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 851         /* get CPU and bus clocks according to the environment variable */
 852         get_clocks_866,
 853         /* adjust sdram refresh rate according to the new clock */
 854         sdram_adjust_866,
 855         init_timebase,
 856 #endif
 857         init_baud_rate,         /* initialze baudrate settings */
 858         serial_init,            /* serial communications setup */
 859         console_init_f,         /* stage 1 init of console */
 860 #ifdef CONFIG_SANDBOX
 861         sandbox_early_getopt_check,
 862 #endif
 863 #ifdef CONFIG_OF_CONTROL
 864         fdtdec_prepare_fdt,
 865 #endif
 866         display_options,        /* say that we are here */
 867         display_text_info,      /* show debugging info if required */
 868 #if defined(CONFIG_MPC8260)
 869         prt_8260_rsr,
 870         prt_8260_clks,
 871 #endif /* CONFIG_MPC8260 */
 872 #if defined(CONFIG_MPC83xx)
 873         prt_83xx_rsr,
 874 #endif
 875 #ifdef CONFIG_PPC
 876         checkcpu,
 877 #endif
 878         print_cpuinfo,          /* display cpu info (and speed) */
 879 #if defined(CONFIG_MPC5xxx)
 880         prt_mpc5xxx_clks,
 881 #endif /* CONFIG_MPC5xxx */
 882 #if defined(CONFIG_DISPLAY_BOARDINFO)
 883         show_board_info,
 884 #endif
 885         INIT_FUNC_WATCHDOG_INIT
 886 #if defined(CONFIG_MISC_INIT_F)
 887         misc_init_f,
 888 #endif
 889         INIT_FUNC_WATCHDOG_RESET
 890 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 891         init_func_i2c,
 892 #endif
 893 #if defined(CONFIG_HARD_SPI)
 894         init_func_spi,
 895 #endif
 896         announce_dram_init,
 897         /* TODO: unify all these dram functions? */
 898 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 899         dram_init,              /* configure available RAM banks */
 900 #endif
 901 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
 902         init_func_ram,
 903 #endif
 904 #ifdef CONFIG_POST
 905         post_init_f,
 906 #endif
 907         INIT_FUNC_WATCHDOG_RESET
 908 #if defined(CONFIG_SYS_DRAM_TEST)
 909         testdram,
 910 #endif /* CONFIG_SYS_DRAM_TEST */
 911         INIT_FUNC_WATCHDOG_RESET
 912
 913 #ifdef CONFIG_POST
 914         init_post,
 915 #endif
 916         INIT_FUNC_WATCHDOG_RESET
 917         /*
 918          * Now that we have DRAM mapped and working, we can
 919          * relocate the code and continue running from DRAM.
 920          *
 921          * Reserve memory at end of RAM for (top down in that order):
 922          *  - area that won't get touched by U-Boot and Linux (optional)
 923          *  - kernel log buffer
 924          *  - protected RAM
 925          *  - LCD framebuffer
 926          *  - monitor code
 927          *  - board info struct
 928          */
 929         setup_dest_addr,
 930 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 931         /* Blackfin u-boot monitor should be on top of the ram */
 932         reserve_uboot,
 933 #endif
 934 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 935         reserve_logbuffer,
 936 #endif
 937 #ifdef CONFIG_PRAM
 938         reserve_pram,
 939 #endif
 940         reserve_round_4k,
 941 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 942                 defined(CONFIG_ARM)
 943         reserve_mmu,
 944 #endif
 945 #ifdef CONFIG_LCD
 946         reserve_lcd,
 947 #endif
 948         reserve_trace,
 949         /* TODO: Why the dependency on CONFIG_8xx? */
 950 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 951                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 952                 !defined(CONFIG_BLACKFIN)
 953         reserve_video,
 954 #endif
 955 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
 956         reserve_uboot,
 957 #endif
 958 #ifndef CONFIG_SPL_BUILD
 959         reserve_malloc,
 960         reserve_board,
 961 #endif
 962         setup_machine,
 963         reserve_global_data,
 964         reserve_fdt,
 965         reserve_arch,
 966         reserve_stacks,
 967         setup_dram_config,
 968         show_dram_config,
 969 #ifdef CONFIG_PPC
 970         setup_board_part1,
 971         INIT_FUNC_WATCHDOG_RESET
 972         setup_board_part2,
 973 #endif
 974         display_new_sp,
 975 #ifdef CONFIG_SYS_EXTBDINFO
 976         setup_board_extra,
 977 #endif
 978         INIT_FUNC_WATCHDOG_RESET
 979         reloc_fdt,
 980         setup_reloc,
 981 #ifdef CONFIG_X86
 982         copy_uboot_to_ram,
 983         clear_bss,
 984         do_elf_reloc_fixups,
 985 #endif
 986 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 987         jump_to_copy,
 988 #endif
 989         NULL,
 990 };
 991
 992 void board_init_f(ulong boot_flags)
 993 {
 994 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
 995         /*
 996          * For some archtectures, global data is initialized and used before
 997          * calling this function. The data should be preserved. For others,
 998          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
 999          * here to host global data until relocation.
1000          */
1001         gd_t data;
1002
1003         gd = &data;
1004
1005         /*
1006          * Clear global data before it is accessed at debug print
1007          * in initcall_run_list. Otherwise the debug print probably
1008          * get the wrong vaule of gd->have_console.
1009          */
1010         zero_global_data();
1011 #endif
1012
1013         gd->flags = boot_flags;
1014         gd->have_console = 0;
1015
1016         if (initcall_run_list(init_sequence_f))
1017                 hang();
1018
1019 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1020         /* NOTREACHED - jump_to_copy() does not return */
1021         hang();
1022 #endif
1023 }
1024
1025 #ifdef CONFIG_X86
1026 /*
1027  * For now this code is only used on x86.
1028  *
1029  * init_sequence_f_r is the list of init functions which are run when
1030  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1031  * The following limitations must be considered when implementing an
1032  * '_f_r' function:
1033  *  - 'static' variables are read-only
1034  *  - Global Data (gd->xxx) is read/write
1035  *
1036  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1037  * supported).  It _should_, if possible, copy global data to RAM and
1038  * initialise the CPU caches (to speed up the relocation process)
1039  *
1040  * NOTE: At present only x86 uses this route, but it is intended that
1041  * all archs will move to this when generic relocation is implemented.
1042  */
1043 static init_fnc_t init_sequence_f_r[] = {
1044         init_cache_f_r,
1045
1046         NULL,
1047 };
1048
1049 void board_init_f_r(void)
1050 {
1051         if (initcall_run_list(init_sequence_f_r))
1052                 hang();
1053
1054         /*
1055          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1056          * Transfer execution from Flash to RAM by calculating the address
1057          * of the in-RAM copy of board_init_r() and calling it
1058          */
1059         (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1060
1061         /* NOTREACHED - board_init_r() does not return */
1062         hang();
1063 }
1064 #else
1065 ulong board_init_f_mem(ulong top)
1066 {
1067         /* Leave space for the stack we are running with now */
1068         top -= 0x40;
1069
1070         top -= sizeof(struct global_data);
1071         top = ALIGN(top, 16);
1072         gd = (struct global_data *)top;
1073         memset((void *)gd, '\0', sizeof(*gd));
1074
1075 #ifdef CONFIG_SYS_MALLOC_F_LEN
1076         top -= CONFIG_SYS_MALLOC_F_LEN;
1077         gd->malloc_base = top;
1078 #endif
1079
1080         return top;
1081 }
1082 #endif /* CONFIG_X86 */