common/board_f.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2011 The Chromium OS Authors.
   4  * (C) Copyright 2002-2006
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * (C) Copyright 2002
   8  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   9  * Marius Groeger <mgroeger@sysgo.de>
  10  */
  11
  12 #include <common.h>
  13 #include <bloblist.h>
  14 #include <clock_legacy.h>
  15 #include <console.h>
  16 #include <cpu.h>
  17 #include <cpu_func.h>
  18 #include <dm.h>
  19 #include <env.h>
  20 #include <env_internal.h>
  21 #include <fdtdec.h>
  22 #include <fs.h>
  23 #include <hang.h>
  24 #include <i2c.h>
  25 #include <init.h>
  26 #include <initcall.h>
  27 #include <lcd.h>
  28 #include <malloc.h>
  29 #include <mapmem.h>
  30 #include <os.h>
  31 #include <post.h>
  32 #include <relocate.h>
  33 #include <serial.h>
  34 #ifdef CONFIG_SPL
  35 #include <spl.h>
  36 #endif
  37 #include <status_led.h>
  38 #include <sysreset.h>
  39 #include <timer.h>
  40 #include <trace.h>
  41 #include <video.h>
  42 #include <watchdog.h>
  43 #ifdef CONFIG_MACH_TYPE
  44 #include <asm/mach-types.h>
  45 #endif
  46 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  47 #include <asm/mp.h>
  48 #endif
  49 #include <asm/io.h>
  50 #include <asm/sections.h>
  51 #include <dm/root.h>
  52 #include <linux/errno.h>
  53
  54 /*
  55  * Pointer to initial global data area
  56  *
  57  * Here we initialize it if needed.
  58  */
  59 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  60 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  61 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  62 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  63 #else
  64 DECLARE_GLOBAL_DATA_PTR;
  65 #endif
  66
  67 /*
  68  * TODO(sjg@chromium.org): IMO this code should be
  69  * refactored to a single function, something like:
  70  *
  71  * void led_set_state(enum led_colour_t colour, int on);
  72  */
  73 /************************************************************************
  74  * Coloured LED functionality
  75  ************************************************************************
  76  * May be supplied by boards if desired
  77  */
  78 __weak void coloured_LED_init(void) {}
  79 __weak void red_led_on(void) {}
  80 __weak void red_led_off(void) {}
  81 __weak void green_led_on(void) {}
  82 __weak void green_led_off(void) {}
  83 __weak void yellow_led_on(void) {}
  84 __weak void yellow_led_off(void) {}
  85 __weak void blue_led_on(void) {}
  86 __weak void blue_led_off(void) {}
  87
  88 /*
  89  * Why is gd allocated a register? Prior to reloc it might be better to
  90  * just pass it around to each function in this file?
  91  *
  92  * After reloc one could argue that it is hardly used and doesn't need
  93  * to be in a register. Or if it is it should perhaps hold pointers to all
  94  * global data for all modules, so that post-reloc we can avoid the massive
  95  * literal pool we get on ARM. Or perhaps just encourage each module to use
  96  * a structure...
  97  */
  98
  99 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 100 static int init_func_watchdog_init(void)
 101 {
 102 # if defined(CONFIG_HW_WATCHDOG) && \
 103         (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 104         defined(CONFIG_SH) || \
 105         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
 106         defined(CONFIG_IMX_WATCHDOG))
 107         hw_watchdog_init();
 108         puts("       Watchdog enabled\n");
 109 # endif
 110         WATCHDOG_RESET();
 111
 112         return 0;
 113 }
 114
 115 int init_func_watchdog_reset(void)
 116 {
 117         WATCHDOG_RESET();
 118
 119         return 0;
 120 }
 121 #endif /* CONFIG_WATCHDOG */
 122
 123 __weak void board_add_ram_info(int use_default)
 124 {
 125         /* please define platform specific board_add_ram_info() */
 126 }
 127
 128 static int init_baud_rate(void)
 129 {
 130         gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
 131         return 0;
 132 }
 133
 134 static int display_text_info(void)
 135 {
 136 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 137         ulong bss_start, bss_end, text_base;
 138
 139         bss_start = (ulong)&__bss_start;
 140         bss_end = (ulong)&__bss_end;
 141
 142 #ifdef CONFIG_SYS_TEXT_BASE
 143         text_base = CONFIG_SYS_TEXT_BASE;
 144 #else
 145         text_base = CONFIG_SYS_MONITOR_BASE;
 146 #endif
 147
 148         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 149               text_base, bss_start, bss_end);
 150 #endif
 151
 152         return 0;
 153 }
 154
 155 #ifdef CONFIG_SYSRESET
 156 static int print_resetinfo(void)
 157 {
 158         struct udevice *dev;
 159         char status[256];
 160         int ret;
 161
 162         ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
 163         if (ret) {
 164                 debug("%s: No sysreset device found (error: %d)\n",
 165                       __func__, ret);
 166                 /* Not all boards have sysreset drivers available during early
 167                  * boot, so don't fail if one can't be found.
 168                  */
 169                 return 0;
 170         }
 171
 172         if (!sysreset_get_status(dev, status, sizeof(status)))
 173                 printf("%s", status);
 174
 175         return 0;
 176 }
 177 #endif
 178
 179 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
 180 static int print_cpuinfo(void)
 181 {
 182         struct udevice *dev;
 183         char desc[512];
 184         int ret;
 185
 186         dev = cpu_get_current_dev();
 187         if (!dev) {
 188                 debug("%s: Could not get CPU device\n",
 189                       __func__);
 190                 return -ENODEV;
 191         }
 192
 193         ret = cpu_get_desc(dev, desc, sizeof(desc));
 194         if (ret) {
 195                 debug("%s: Could not get CPU description (err = %d)\n",
 196                       dev->name, ret);
 197                 return ret;
 198         }
 199
 200         printf("CPU:   %s\n", desc);
 201
 202         return 0;
 203 }
 204 #endif
 205
 206 static int announce_dram_init(void)
 207 {
 208         puts("DRAM:  ");
 209         return 0;
 210 }
 211
 212 static int show_dram_config(void)
 213 {
 214         unsigned long long size;
 215
 216 #ifdef CONFIG_NR_DRAM_BANKS
 217         int i;
 218
 219         debug("\nRAM Configuration:\n");
 220         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 221                 size += gd->bd->bi_dram[i].size;
 222                 debug("Bank #%d: %llx ", i,
 223                       (unsigned long long)(gd->bd->bi_dram[i].start));
 224 #ifdef DEBUG
 225                 print_size(gd->bd->bi_dram[i].size, "\n");
 226 #endif
 227         }
 228         debug("\nDRAM:  ");
 229 #else
 230         size = gd->ram_size;
 231 #endif
 232
 233         print_size(size, "");
 234         board_add_ram_info(0);
 235         putc('\n');
 236
 237         return 0;
 238 }
 239
 240 __weak int dram_init_banksize(void)
 241 {
 242 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 243         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 244         gd->bd->bi_dram[0].size = get_effective_memsize();
 245 #endif
 246
 247         return 0;
 248 }
 249
 250 #if defined(CONFIG_SYS_I2C)
 251 static int init_func_i2c(void)
 252 {
 253         puts("I2C:   ");
 254 #ifdef CONFIG_SYS_I2C
 255         i2c_init_all();
 256 #else
 257         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 258 #endif
 259         puts("ready\n");
 260         return 0;
 261 }
 262 #endif
 263
 264 #if defined(CONFIG_VID)
 265 __weak int init_func_vid(void)
 266 {
 267         return 0;
 268 }
 269 #endif
 270
 271 static int setup_mon_len(void)
 272 {
 273 #if defined(__ARM__) || defined(__MICROBLAZE__)
 274         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 275 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 276         gd->mon_len = (ulong)&_end - (ulong)_init;
 277 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 278         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 279 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
 280         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 281 #elif defined(CONFIG_SYS_MONITOR_BASE)
 282         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 283         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 284 #endif
 285         return 0;
 286 }
 287
 288 static int setup_spl_handoff(void)
 289 {
 290 #if CONFIG_IS_ENABLED(HANDOFF)
 291         gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
 292                                         sizeof(struct spl_handoff));
 293         debug("Found SPL hand-off info %p\n", gd->spl_handoff);
 294 #endif
 295
 296         return 0;
 297 }
 298
 299 __weak int arch_cpu_init(void)
 300 {
 301         return 0;
 302 }
 303
 304 __weak int mach_cpu_init(void)
 305 {
 306         return 0;
 307 }
 308
 309 /* Get the top of usable RAM */
 310 __weak ulong board_get_usable_ram_top(ulong total_size)
 311 {
 312 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
 313         /*
 314          * Detect whether we have so much RAM that it goes past the end of our
 315          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 316          */
 317         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 318                 /*
 319                  * Will wrap back to top of 32-bit space when reservations
 320                  * are made.
 321                  */
 322                 return 0;
 323 #endif
 324         return gd->ram_top;
 325 }
 326
 327 static int setup_dest_addr(void)
 328 {
 329         debug("Monitor len: %08lX\n", gd->mon_len);
 330         /*
 331          * Ram is setup, size stored in gd !!
 332          */
 333         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 334 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 335         /*
 336          * Subtract specified amount of memory to hide so that it won't
 337          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 338          * the Linux kernel should now get passed the now "corrected"
 339          * memory size and won't touch it either. This should work
 340          * for arch/ppc and arch/powerpc. Only Linux board ports in
 341          * arch/powerpc with bootwrapper support, that recalculate the
 342          * memory size from the SDRAM controller setup will have to
 343          * get fixed.
 344          */
 345         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 346 #endif
 347 #ifdef CONFIG_SYS_SDRAM_BASE
 348         gd->ram_base = CONFIG_SYS_SDRAM_BASE;
 349 #endif
 350         gd->ram_top = gd->ram_base + get_effective_memsize();
 351         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 352         gd->relocaddr = gd->ram_top;
 353         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 355         /*
 356          * We need to make sure the location we intend to put secondary core
 357          * boot code is reserved and not used by any part of u-boot
 358          */
 359         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 360                 gd->relocaddr = determine_mp_bootpg(NULL);
 361                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 362         }
 363 #endif
 364         return 0;
 365 }
 366
 367 #ifdef CONFIG_PRAM
 368 /* reserve protected RAM */
 369 static int reserve_pram(void)
 370 {
 371         ulong reg;
 372
 373         reg = env_get_ulong("pram", 10, CONFIG_PRAM);
 374         gd->relocaddr -= (reg << 10);           /* size is in kB */
 375         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 376               gd->relocaddr);
 377         return 0;
 378 }
 379 #endif /* CONFIG_PRAM */
 380
 381 /* Round memory pointer down to next 4 kB limit */
 382 static int reserve_round_4k(void)
 383 {
 384         gd->relocaddr &= ~(4096 - 1);
 385         return 0;
 386 }
 387
 388 __weak int arch_reserve_mmu(void)
 389 {
 390         return 0;
 391 }
 392
 393 static int reserve_video(void)
 394 {
 395 #ifdef CONFIG_DM_VIDEO
 396         ulong addr;
 397         int ret;
 398
 399         addr = gd->relocaddr;
 400         ret = video_reserve(&addr);
 401         if (ret)
 402                 return ret;
 403         gd->relocaddr = addr;
 404 #elif defined(CONFIG_LCD)
 405 #  ifdef CONFIG_FB_ADDR
 406         gd->fb_base = CONFIG_FB_ADDR;
 407 #  else
 408         /* reserve memory for LCD display (always full pages) */
 409         gd->relocaddr = lcd_setmem(gd->relocaddr);
 410         gd->fb_base = gd->relocaddr;
 411 #  endif /* CONFIG_FB_ADDR */
 412 #endif
 413
 414         return 0;
 415 }
 416
 417 static int reserve_trace(void)
 418 {
 419 #ifdef CONFIG_TRACE
 420         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 421         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 422         debug("Reserving %luk for trace data at: %08lx\n",
 423               (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 424 #endif
 425
 426         return 0;
 427 }
 428
 429 static int reserve_uboot(void)
 430 {
 431         if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
 432                 /*
 433                  * reserve memory for U-Boot code, data & bss
 434                  * round down to next 4 kB limit
 435                  */
 436                 gd->relocaddr -= gd->mon_len;
 437                 gd->relocaddr &= ~(4096 - 1);
 438         #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
 439                 /* round down to next 64 kB limit so that IVPR stays aligned */
 440                 gd->relocaddr &= ~(65536 - 1);
 441         #endif
 442
 443                 debug("Reserving %ldk for U-Boot at: %08lx\n",
 444                       gd->mon_len >> 10, gd->relocaddr);
 445         }
 446
 447         gd->start_addr_sp = gd->relocaddr;
 448
 449         return 0;
 450 }
 451
 452 /*
 453  * reserve after start_addr_sp the requested size and make the stack pointer
 454  * 16-byte aligned, this alignment is needed for cast on the reserved memory
 455  * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
 456  *     = ARMv8 Instruction Set Overview: quad word, 16 bytes
 457  */
 458 static unsigned long reserve_stack_aligned(size_t size)
 459 {
 460         return ALIGN_DOWN(gd->start_addr_sp - size, 16);
 461 }
 462
 463 #ifdef CONFIG_SYS_NONCACHED_MEMORY
 464 static int reserve_noncached(void)
 465 {
 466         /*
 467          * The value of gd->start_addr_sp must match the value of malloc_start
 468          * calculated in boatrd_f.c:initr_malloc(), which is passed to
 469          * board_r.c:mem_malloc_init() and then used by
 470          * cache.c:noncached_init()
 471          *
 472          * These calculations must match the code in cache.c:noncached_init()
 473          */
 474         gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
 475                 MMU_SECTION_SIZE;
 476         gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
 477                                    MMU_SECTION_SIZE);
 478         debug("Reserving %dM for noncached_alloc() at: %08lx\n",
 479               CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
 480
 481         return 0;
 482 }
 483 #endif
 484
 485 /* reserve memory for malloc() area */
 486 static int reserve_malloc(void)
 487 {
 488         gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
 489         debug("Reserving %dk for malloc() at: %08lx\n",
 490               TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 491 #ifdef CONFIG_SYS_NONCACHED_MEMORY
 492         reserve_noncached();
 493 #endif
 494
 495         return 0;
 496 }
 497
 498 /* (permanently) allocate a Board Info struct */
 499 static int reserve_board(void)
 500 {
 501         if (!gd->bd) {
 502                 gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
 503                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 504                 memset(gd->bd, '\0', sizeof(bd_t));
 505                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 506                       sizeof(bd_t), gd->start_addr_sp);
 507         }
 508         return 0;
 509 }
 510
 511 static int setup_machine(void)
 512 {
 513 #ifdef CONFIG_MACH_TYPE
 514         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 515 #endif
 516         return 0;
 517 }
 518
 519 static int reserve_global_data(void)
 520 {
 521         gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
 522         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 523         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 524               sizeof(gd_t), gd->start_addr_sp);
 525         return 0;
 526 }
 527
 528 static int reserve_fdt(void)
 529 {
 530 #ifndef CONFIG_OF_EMBED
 531         /*
 532          * If the device tree is sitting immediately above our image then we
 533          * must relocate it. If it is embedded in the data section, then it
 534          * will be relocated with other data.
 535          */
 536         if (gd->fdt_blob) {
 537                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 538
 539                 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
 540                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 541                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 542                       gd->fdt_size, gd->start_addr_sp);
 543         }
 544 #endif
 545
 546         return 0;
 547 }
 548
 549 static int reserve_bootstage(void)
 550 {
 551 #ifdef CONFIG_BOOTSTAGE
 552         int size = bootstage_get_size();
 553
 554         gd->start_addr_sp = reserve_stack_aligned(size);
 555         gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
 556         debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
 557               gd->start_addr_sp);
 558 #endif
 559
 560         return 0;
 561 }
 562
 563 __weak int arch_reserve_stacks(void)
 564 {
 565         return 0;
 566 }
 567
 568 static int reserve_stacks(void)
 569 {
 570         /* make stack pointer 16-byte aligned */
 571         gd->start_addr_sp = reserve_stack_aligned(16);
 572
 573         /*
 574          * let the architecture-specific code tailor gd->start_addr_sp and
 575          * gd->irq_sp
 576          */
 577         return arch_reserve_stacks();
 578 }
 579
 580 static int reserve_bloblist(void)
 581 {
 582 #ifdef CONFIG_BLOBLIST
 583         gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
 584         gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
 585 #endif
 586
 587         return 0;
 588 }
 589
 590 static int display_new_sp(void)
 591 {
 592         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 593
 594         return 0;
 595 }
 596
 597 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 598         defined(CONFIG_SH)
 599 static int setup_board_part1(void)
 600 {
 601         bd_t *bd = gd->bd;
 602
 603         /*
 604          * Save local variables to board info struct
 605          */
 606         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 607         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 608
 609 #ifdef CONFIG_SYS_SRAM_BASE
 610         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 611         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 612 #endif
 613
 614 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 615         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 616 #endif
 617 #if defined(CONFIG_M68K)
 618         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 619 #endif
 620 #if defined(CONFIG_MPC83xx)
 621         bd->bi_immrbar = CONFIG_SYS_IMMR;
 622 #endif
 623
 624         return 0;
 625 }
 626 #endif
 627
 628 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 629 static int setup_board_part2(void)
 630 {
 631         bd_t *bd = gd->bd;
 632
 633         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 634         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 635 #if defined(CONFIG_CPM2)
 636         bd->bi_cpmfreq = gd->arch.cpm_clk;
 637         bd->bi_brgfreq = gd->arch.brg_clk;
 638         bd->bi_sccfreq = gd->arch.scc_clk;
 639         bd->bi_vco = gd->arch.vco_out;
 640 #endif /* CONFIG_CPM2 */
 641 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 642         bd->bi_pcifreq = gd->pci_clk;
 643 #endif
 644 #if defined(CONFIG_EXTRA_CLOCK)
 645         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 646         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 647         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 648 #endif
 649
 650         return 0;
 651 }
 652 #endif
 653
 654 #ifdef CONFIG_POST
 655 static int init_post(void)
 656 {
 657         post_bootmode_init();
 658         post_run(NULL, POST_ROM | post_bootmode_get(0));
 659
 660         return 0;
 661 }
 662 #endif
 663
 664 static int reloc_fdt(void)
 665 {
 666 #ifndef CONFIG_OF_EMBED
 667         if (gd->flags & GD_FLG_SKIP_RELOC)
 668                 return 0;
 669         if (gd->new_fdt) {
 670                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 671                 gd->fdt_blob = gd->new_fdt;
 672         }
 673 #endif
 674
 675         return 0;
 676 }
 677
 678 static int reloc_bootstage(void)
 679 {
 680 #ifdef CONFIG_BOOTSTAGE
 681         if (gd->flags & GD_FLG_SKIP_RELOC)
 682                 return 0;
 683         if (gd->new_bootstage) {
 684                 int size = bootstage_get_size();
 685
 686                 debug("Copying bootstage from %p to %p, size %x\n",
 687                       gd->bootstage, gd->new_bootstage, size);
 688                 memcpy(gd->new_bootstage, gd->bootstage, size);
 689                 gd->bootstage = gd->new_bootstage;
 690                 bootstage_relocate();
 691         }
 692 #endif
 693
 694         return 0;
 695 }
 696
 697 static int reloc_bloblist(void)
 698 {
 699 #ifdef CONFIG_BLOBLIST
 700         if (gd->flags & GD_FLG_SKIP_RELOC)
 701                 return 0;
 702         if (gd->new_bloblist) {
 703                 int size = CONFIG_BLOBLIST_SIZE;
 704
 705                 debug("Copying bloblist from %p to %p, size %x\n",
 706                       gd->bloblist, gd->new_bloblist, size);
 707                 memcpy(gd->new_bloblist, gd->bloblist, size);
 708                 gd->bloblist = gd->new_bloblist;
 709         }
 710 #endif
 711
 712         return 0;
 713 }
 714
 715 static int setup_reloc(void)
 716 {
 717         if (gd->flags & GD_FLG_SKIP_RELOC) {
 718                 debug("Skipping relocation due to flag\n");
 719                 return 0;
 720         }
 721
 722 #ifdef CONFIG_SYS_TEXT_BASE
 723 #ifdef ARM
 724         gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
 725 #elif defined(CONFIG_M68K)
 726         /*
 727          * On all ColdFire arch cpu, monitor code starts always
 728          * just after the default vector table location, so at 0x400
 729          */
 730         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 731 #elif !defined(CONFIG_SANDBOX)
 732         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 733 #endif
 734 #endif
 735         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 736
 737         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 738         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 739               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 740               gd->start_addr_sp);
 741
 742         return 0;
 743 }
 744
 745 #ifdef CONFIG_OF_BOARD_FIXUP
 746 static int fix_fdt(void)
 747 {
 748         return board_fix_fdt((void *)gd->fdt_blob);
 749 }
 750 #endif
 751
 752 /* ARM calls relocate_code from its crt0.S */
 753 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 754                 !CONFIG_IS_ENABLED(X86_64)
 755
 756 static int jump_to_copy(void)
 757 {
 758         if (gd->flags & GD_FLG_SKIP_RELOC)
 759                 return 0;
 760         /*
 761          * x86 is special, but in a nice way. It uses a trampoline which
 762          * enables the dcache if possible.
 763          *
 764          * For now, other archs use relocate_code(), which is implemented
 765          * similarly for all archs. When we do generic relocation, hopefully
 766          * we can make all archs enable the dcache prior to relocation.
 767          */
 768 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 769         /*
 770          * SDRAM and console are now initialised. The final stack can now
 771          * be setup in SDRAM. Code execution will continue in Flash, but
 772          * with the stack in SDRAM and Global Data in temporary memory
 773          * (CPU cache)
 774          */
 775         arch_setup_gd(gd->new_gd);
 776         board_init_f_r_trampoline(gd->start_addr_sp);
 777 #else
 778         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 779 #endif
 780
 781         return 0;
 782 }
 783 #endif
 784
 785 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 786 static int initf_bootstage(void)
 787 {
 788         bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
 789                         IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 790         int ret;
 791
 792         ret = bootstage_init(!from_spl);
 793         if (ret)
 794                 return ret;
 795         if (from_spl) {
 796                 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
 797                                                CONFIG_BOOTSTAGE_STASH_SIZE);
 798
 799                 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
 800                 if (ret && ret != -ENOENT) {
 801                         debug("Failed to unstash bootstage: err=%d\n", ret);
 802                         return ret;
 803                 }
 804         }
 805
 806         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 807
 808         return 0;
 809 }
 810
 811 static int initf_console_record(void)
 812 {
 813 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 814         return console_record_init();
 815 #else
 816         return 0;
 817 #endif
 818 }
 819
 820 static int initf_dm(void)
 821 {
 822 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 823         int ret;
 824
 825         bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
 826         ret = dm_init_and_scan(true);
 827         bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
 828         if (ret)
 829                 return ret;
 830 #endif
 831 #ifdef CONFIG_TIMER_EARLY
 832         ret = dm_timer_init();
 833         if (ret)
 834                 return ret;
 835 #endif
 836
 837         return 0;
 838 }
 839
 840 /* Architecture-specific memory reservation */
 841 __weak int reserve_arch(void)
 842 {
 843         return 0;
 844 }
 845
 846 __weak int arch_cpu_init_dm(void)
 847 {
 848         return 0;
 849 }
 850
 851 __weak int checkcpu(void)
 852 {
 853         return 0;
 854 }
 855
 856 __weak int clear_bss(void)
 857 {
 858         return 0;
 859 }
 860
 861 static const init_fnc_t init_sequence_f[] = {
 862         setup_mon_len,
 863 #ifdef CONFIG_OF_CONTROL
 864         fdtdec_setup,
 865 #endif
 866 #ifdef CONFIG_TRACE_EARLY
 867         trace_early_init,
 868 #endif
 869         initf_malloc,
 870         log_init,
 871         initf_bootstage,        /* uses its own timer, so does not need DM */
 872 #ifdef CONFIG_BLOBLIST
 873         bloblist_init,
 874 #endif
 875         setup_spl_handoff,
 876         initf_console_record,
 877 #if defined(CONFIG_HAVE_FSP)
 878         arch_fsp_init,
 879 #endif
 880         arch_cpu_init,          /* basic arch cpu dependent setup */
 881         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 882         initf_dm,
 883         arch_cpu_init_dm,
 884 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 885         board_early_init_f,
 886 #endif
 887 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 888         /* get CPU and bus clocks according to the environment variable */
 889         get_clocks,             /* get CPU and bus clocks (etc.) */
 890 #endif
 891 #if !defined(CONFIG_M68K)
 892         timer_init,             /* initialize timer */
 893 #endif
 894 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 895         board_postclk_init,
 896 #endif
 897         env_init,               /* initialize environment */
 898         init_baud_rate,         /* initialze baudrate settings */
 899         serial_init,            /* serial communications setup */
 900         console_init_f,         /* stage 1 init of console */
 901         display_options,        /* say that we are here */
 902         display_text_info,      /* show debugging info if required */
 903         checkcpu,
 904 #if defined(CONFIG_SYSRESET)
 905         print_resetinfo,
 906 #endif
 907 #if defined(CONFIG_DISPLAY_CPUINFO)
 908         print_cpuinfo,          /* display cpu info (and speed) */
 909 #endif
 910 #if defined(CONFIG_DTB_RESELECT)
 911         embedded_dtb_select,
 912 #endif
 913 #if defined(CONFIG_DISPLAY_BOARDINFO)
 914         show_board_info,
 915 #endif
 916         INIT_FUNC_WATCHDOG_INIT
 917 #if defined(CONFIG_MISC_INIT_F)
 918         misc_init_f,
 919 #endif
 920         INIT_FUNC_WATCHDOG_RESET
 921 #if defined(CONFIG_SYS_I2C)
 922         init_func_i2c,
 923 #endif
 924 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
 925         init_func_vid,
 926 #endif
 927         announce_dram_init,
 928         dram_init,              /* configure available RAM banks */
 929 #ifdef CONFIG_POST
 930         post_init_f,
 931 #endif
 932         INIT_FUNC_WATCHDOG_RESET
 933 #if defined(CONFIG_SYS_DRAM_TEST)
 934         testdram,
 935 #endif /* CONFIG_SYS_DRAM_TEST */
 936         INIT_FUNC_WATCHDOG_RESET
 937
 938 #ifdef CONFIG_POST
 939         init_post,
 940 #endif
 941         INIT_FUNC_WATCHDOG_RESET
 942         /*
 943          * Now that we have DRAM mapped and working, we can
 944          * relocate the code and continue running from DRAM.
 945          *
 946          * Reserve memory at end of RAM for (top down in that order):
 947          *  - area that won't get touched by U-Boot and Linux (optional)
 948          *  - kernel log buffer
 949          *  - protected RAM
 950          *  - LCD framebuffer
 951          *  - monitor code
 952          *  - board info struct
 953          */
 954         setup_dest_addr,
 955 #ifdef CONFIG_PRAM
 956         reserve_pram,
 957 #endif
 958         reserve_round_4k,
 959         arch_reserve_mmu,
 960         reserve_video,
 961         reserve_trace,
 962         reserve_uboot,
 963         reserve_malloc,
 964         reserve_board,
 965         setup_machine,
 966         reserve_global_data,
 967         reserve_fdt,
 968         reserve_bootstage,
 969         reserve_bloblist,
 970         reserve_arch,
 971         reserve_stacks,
 972         dram_init_banksize,
 973         show_dram_config,
 974 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 975         defined(CONFIG_SH)
 976         setup_board_part1,
 977 #endif
 978 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 979         INIT_FUNC_WATCHDOG_RESET
 980         setup_board_part2,
 981 #endif
 982         display_new_sp,
 983 #ifdef CONFIG_OF_BOARD_FIXUP
 984         fix_fdt,
 985 #endif
 986         INIT_FUNC_WATCHDOG_RESET
 987         reloc_fdt,
 988         reloc_bootstage,
 989         reloc_bloblist,
 990         setup_reloc,
 991 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 992         copy_uboot_to_ram,
 993         do_elf_reloc_fixups,
 994 #endif
 995         clear_bss,
 996 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 997                 !CONFIG_IS_ENABLED(X86_64)
 998         jump_to_copy,
 999 #endif
1000         NULL,
1001 };
1002
1003 void board_init_f(ulong boot_flags)
1004 {
1005         gd->flags = boot_flags;
1006         gd->have_console = 0;
1007
1008         if (initcall_run_list(init_sequence_f))
1009                 hang();
1010
1011 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1012                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1013                 !defined(CONFIG_ARC)
1014         /* NOTREACHED - jump_to_copy() does not return */
1015         hang();
1016 #endif
1017 }
1018
1019 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1020 /*
1021  * For now this code is only used on x86.
1022  *
1023  * init_sequence_f_r is the list of init functions which are run when
1024  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1025  * The following limitations must be considered when implementing an
1026  * '_f_r' function:
1027  *  - 'static' variables are read-only
1028  *  - Global Data (gd->xxx) is read/write
1029  *
1030  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1031  * supported).  It _should_, if possible, copy global data to RAM and
1032  * initialise the CPU caches (to speed up the relocation process)
1033  *
1034  * NOTE: At present only x86 uses this route, but it is intended that
1035  * all archs will move to this when generic relocation is implemented.
1036  */
1037 static const init_fnc_t init_sequence_f_r[] = {
1038 #if !CONFIG_IS_ENABLED(X86_64)
1039         init_cache_f_r,
1040 #endif
1041
1042         NULL,
1043 };
1044
1045 void board_init_f_r(void)
1046 {
1047         if (initcall_run_list(init_sequence_f_r))
1048                 hang();
1049
1050         /*
1051          * The pre-relocation drivers may be using memory that has now gone
1052          * away. Mark serial as unavailable - this will fall back to the debug
1053          * UART if available.
1054          *
1055          * Do the same with log drivers since the memory may not be available.
1056          */
1057         gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1058 #ifdef CONFIG_TIMER
1059         gd->timer = NULL;
1060 #endif
1061
1062         /*
1063          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1064          * Transfer execution from Flash to RAM by calculating the address
1065          * of the in-RAM copy of board_init_r() and calling it
1066          */
1067         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1068
1069         /* NOTREACHED - board_init_r() does not return */
1070         hang();
1071 }
1072 #endif /* CONFIG_X86 */