common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <console.h>
  17 #include <environment.h>
  18 #include <dm.h>
  19 #include <fdtdec.h>
  20 #include <fs.h>
  21 #if defined(CONFIG_CMD_IDE)
  22 #include <ide.h>
  23 #endif
  24 #include <i2c.h>
  25 #include <initcall.h>
  26 #include <logbuff.h>
  27 #include <malloc.h>
  28 #include <mapmem.h>
  29
  30 /* TODO: Can we move these into arch/ headers? */
  31 #ifdef CONFIG_8xx
  32 #include <mpc8xx.h>
  33 #endif
  34 #ifdef CONFIG_5xx
  35 #include <mpc5xx.h>
  36 #endif
  37 #ifdef CONFIG_MPC5xxx
  38 #include <mpc5xxx.h>
  39 #endif
  40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  41 #include <asm/mp.h>
  42 #endif
  43
  44 #include <os.h>
  45 #include <post.h>
  46 #include <spi.h>
  47 #include <status_led.h>
  48 #include <trace.h>
  49 #include <video.h>
  50 #include <watchdog.h>
  51 #include <asm/errno.h>
  52 #include <asm/io.h>
  53 #include <asm/sections.h>
  54 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  55 #include <asm/init_helpers.h>
  56 #include <asm/relocate.h>
  57 #endif
  58 #ifdef CONFIG_SANDBOX
  59 #include <asm/state.h>
  60 #endif
  61 #include <dm/root.h>
  62 #include <linux/compiler.h>
  63
  64 /*
  65  * Pointer to initial global data area
  66  *
  67  * Here we initialize it if needed.
  68  */
  69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  70 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  71 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  73 #else
  74 DECLARE_GLOBAL_DATA_PTR;
  75 #endif
  76
  77 /*
  78  * TODO(sjg@chromium.org): IMO this code should be
  79  * refactored to a single function, something like:
  80  *
  81  * void led_set_state(enum led_colour_t colour, int on);
  82  */
  83 /************************************************************************
  84  * Coloured LED functionality
  85  ************************************************************************
  86  * May be supplied by boards if desired
  87  */
  88 __weak void coloured_LED_init(void) {}
  89 __weak void red_led_on(void) {}
  90 __weak void red_led_off(void) {}
  91 __weak void green_led_on(void) {}
  92 __weak void green_led_off(void) {}
  93 __weak void yellow_led_on(void) {}
  94 __weak void yellow_led_off(void) {}
  95 __weak void blue_led_on(void) {}
  96 __weak void blue_led_off(void) {}
  97
  98 /*
  99  * Why is gd allocated a register? Prior to reloc it might be better to
 100  * just pass it around to each function in this file?
 101  *
 102  * After reloc one could argue that it is hardly used and doesn't need
 103  * to be in a register. Or if it is it should perhaps hold pointers to all
 104  * global data for all modules, so that post-reloc we can avoid the massive
 105  * literal pool we get on ARM. Or perhaps just encourage each module to use
 106  * a structure...
 107  */
 108
 109 /*
 110  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 111  */
 112
 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 114 static int init_func_watchdog_init(void)
 115 {
 116 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 117         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 118         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 119         defined(CONFIG_IMX_WATCHDOG))
 120         hw_watchdog_init();
 121 # endif
 122         puts("       Watchdog enabled\n");
 123         WATCHDOG_RESET();
 124
 125         return 0;
 126 }
 127
 128 int init_func_watchdog_reset(void)
 129 {
 130         WATCHDOG_RESET();
 131
 132         return 0;
 133 }
 134 #endif /* CONFIG_WATCHDOG */
 135
 136 __weak void board_add_ram_info(int use_default)
 137 {
 138         /* please define platform specific board_add_ram_info() */
 139 }
 140
 141 static int init_baud_rate(void)
 142 {
 143         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 144         return 0;
 145 }
 146
 147 static int display_text_info(void)
 148 {
 149 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 150         ulong bss_start, bss_end, text_base;
 151
 152         bss_start = (ulong)&__bss_start;
 153         bss_end = (ulong)&__bss_end;
 154
 155 #ifdef CONFIG_SYS_TEXT_BASE
 156         text_base = CONFIG_SYS_TEXT_BASE;
 157 #else
 158         text_base = CONFIG_SYS_MONITOR_BASE;
 159 #endif
 160
 161         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 162                 text_base, bss_start, bss_end);
 163 #endif
 164
 165 #ifdef CONFIG_USE_IRQ
 166         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 167         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 168 #endif
 169
 170         return 0;
 171 }
 172
 173 static int announce_dram_init(void)
 174 {
 175         puts("DRAM:  ");
 176         return 0;
 177 }
 178
 179 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 180 static int init_func_ram(void)
 181 {
 182 #ifdef  CONFIG_BOARD_TYPES
 183         int board_type = gd->board_type;
 184 #else
 185         int board_type = 0;     /* use dummy arg */
 186 #endif
 187
 188         gd->ram_size = initdram(board_type);
 189
 190         if (gd->ram_size > 0)
 191                 return 0;
 192
 193         puts("*** failed ***\n");
 194         return 1;
 195 }
 196 #endif
 197
 198 static int show_dram_config(void)
 199 {
 200         unsigned long long size;
 201
 202 #ifdef CONFIG_NR_DRAM_BANKS
 203         int i;
 204
 205         debug("\nRAM Configuration:\n");
 206         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 207                 size += gd->bd->bi_dram[i].size;
 208                 debug("Bank #%d: %llx ", i,
 209                       (unsigned long long)(gd->bd->bi_dram[i].start));
 210 #ifdef DEBUG
 211                 print_size(gd->bd->bi_dram[i].size, "\n");
 212 #endif
 213         }
 214         debug("\nDRAM:  ");
 215 #else
 216         size = gd->ram_size;
 217 #endif
 218
 219         print_size(size, "");
 220         board_add_ram_info(0);
 221         putc('\n');
 222
 223         return 0;
 224 }
 225
 226 __weak void dram_init_banksize(void)
 227 {
 228 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 229         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 230         gd->bd->bi_dram[0].size = get_effective_memsize();
 231 #endif
 232 }
 233
 234 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 235 static int init_func_i2c(void)
 236 {
 237         puts("I2C:   ");
 238 #ifdef CONFIG_SYS_I2C
 239         i2c_init_all();
 240 #else
 241         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 242 #endif
 243         puts("ready\n");
 244         return 0;
 245 }
 246 #endif
 247
 248 #if defined(CONFIG_HARD_SPI)
 249 static int init_func_spi(void)
 250 {
 251         puts("SPI:   ");
 252         spi_init();
 253         puts("ready\n");
 254         return 0;
 255 }
 256 #endif
 257
 258 __maybe_unused
 259 static int zero_global_data(void)
 260 {
 261         memset((void *)gd, '\0', sizeof(gd_t));
 262
 263         return 0;
 264 }
 265
 266 static int setup_mon_len(void)
 267 {
 268 #if defined(__ARM__) || defined(__MICROBLAZE__)
 269         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 270 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 271         gd->mon_len = (ulong)&_end - (ulong)_init;
 272 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 273         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 274 #elif defined(CONFIG_NDS32)
 275         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 276 #else
 277         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 278         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 279 #endif
 280         return 0;
 281 }
 282
 283 __weak int arch_cpu_init(void)
 284 {
 285         return 0;
 286 }
 287
 288 #ifdef CONFIG_SANDBOX
 289 static int setup_ram_buf(void)
 290 {
 291         struct sandbox_state *state = state_get_current();
 292
 293         gd->arch.ram_buf = state->ram_buf;
 294         gd->ram_size = state->ram_size;
 295
 296         return 0;
 297 }
 298 #endif
 299
 300 /* Get the top of usable RAM */
 301 __weak ulong board_get_usable_ram_top(ulong total_size)
 302 {
 303 #ifdef CONFIG_SYS_SDRAM_BASE
 304         /*
 305          * Detect whether we have so much RAM that it goes past the end of our
 306          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 307          */
 308         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 309                 /*
 310                  * Will wrap back to top of 32-bit space when reservations
 311                  * are made.
 312                  */
 313                 return 0;
 314 #endif
 315         return gd->ram_top;
 316 }
 317
 318 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
 319 {
 320 #ifdef CONFIG_SYS_MEM_TOP_HIDE
 321         return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
 322 #else
 323         return ram_size;
 324 #endif
 325 }
 326
 327 static int setup_dest_addr(void)
 328 {
 329         debug("Monitor len: %08lX\n", gd->mon_len);
 330         /*
 331          * Ram is setup, size stored in gd !!
 332          */
 333         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 334 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 335         /* Reserve memory for secure MMU tables, and/or security monitor */
 336         gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
 337         /*
 338          * Record secure memory location. Need recalcuate if memory splits
 339          * into banks, or the ram base is not zero.
 340          */
 341         gd->secure_ram = gd->ram_size;
 342 #endif
 343         /*
 344          * Subtract specified amount of memory to hide so that it won't
 345          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 346          * the Linux kernel should now get passed the now "corrected"
 347          * memory size and won't touch it either. This has been used
 348          * by arch/powerpc exclusively. Now ARMv8 takes advantage of
 349          * thie mechanism. If memory is split into banks, addresses
 350          * need to be calculated.
 351          */
 352         gd->ram_size = board_reserve_ram_top(gd->ram_size);
 353
 354 #ifdef CONFIG_SYS_SDRAM_BASE
 355         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 356 #endif
 357         gd->ram_top += get_effective_memsize();
 358         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 359         gd->relocaddr = gd->ram_top;
 360         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 361 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 362         /*
 363          * We need to make sure the location we intend to put secondary core
 364          * boot code is reserved and not used by any part of u-boot
 365          */
 366         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 367                 gd->relocaddr = determine_mp_bootpg(NULL);
 368                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 369         }
 370 #endif
 371         return 0;
 372 }
 373
 374 #if defined(CONFIG_SPARC)
 375 static int reserve_prom(void)
 376 {
 377         /* defined in arch/sparc/cpu/leon?/prom.c */
 378         extern void *__prom_start_reloc;
 379         int size = 8192; /* page table = 2k, prom = 6k */
 380         gd->relocaddr -= size;
 381         __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
 382         debug("Reserving %dk for PROM and page table at %08lx\n", size,
 383                 gd->relocaddr);
 384         return 0;
 385 }
 386 #endif
 387
 388 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 389 static int reserve_logbuffer(void)
 390 {
 391         /* reserve kernel log buffer */
 392         gd->relocaddr -= LOGBUFF_RESERVE;
 393         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 394                 gd->relocaddr);
 395         return 0;
 396 }
 397 #endif
 398
 399 #ifdef CONFIG_PRAM
 400 /* reserve protected RAM */
 401 static int reserve_pram(void)
 402 {
 403         ulong reg;
 404
 405         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 406         gd->relocaddr -= (reg << 10);           /* size is in kB */
 407         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 408               gd->relocaddr);
 409         return 0;
 410 }
 411 #endif /* CONFIG_PRAM */
 412
 413 /* Round memory pointer down to next 4 kB limit */
 414 static int reserve_round_4k(void)
 415 {
 416         gd->relocaddr &= ~(4096 - 1);
 417         return 0;
 418 }
 419
 420 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 421                 defined(CONFIG_ARM)
 422 static int reserve_mmu(void)
 423 {
 424         /* reserve TLB table */
 425         gd->arch.tlb_size = PGTABLE_SIZE;
 426         gd->relocaddr -= gd->arch.tlb_size;
 427
 428         /* round down to next 64 kB limit */
 429         gd->relocaddr &= ~(0x10000 - 1);
 430
 431         gd->arch.tlb_addr = gd->relocaddr;
 432         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 433               gd->arch.tlb_addr + gd->arch.tlb_size);
 434         return 0;
 435 }
 436 #endif
 437
 438 #ifdef CONFIG_DM_VIDEO
 439 static int reserve_video(void)
 440 {
 441         ulong addr;
 442         int ret;
 443
 444         addr = gd->relocaddr;
 445         ret = video_reserve(&addr);
 446         if (ret)
 447                 return ret;
 448         gd->relocaddr = addr;
 449
 450         return 0;
 451 }
 452 #else
 453
 454 # ifdef CONFIG_LCD
 455 static int reserve_lcd(void)
 456 {
 457 #  ifdef CONFIG_FB_ADDR
 458         gd->fb_base = CONFIG_FB_ADDR;
 459 #  else
 460         /* reserve memory for LCD display (always full pages) */
 461         gd->relocaddr = lcd_setmem(gd->relocaddr);
 462         gd->fb_base = gd->relocaddr;
 463 #  endif /* CONFIG_FB_ADDR */
 464
 465         return 0;
 466 }
 467 # endif /* CONFIG_LCD */
 468
 469 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 470                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 471                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 472 static int reserve_legacy_video(void)
 473 {
 474         /* reserve memory for video display (always full pages) */
 475         gd->relocaddr = video_setmem(gd->relocaddr);
 476         gd->fb_base = gd->relocaddr;
 477
 478         return 0;
 479 }
 480 # endif
 481 #endif /* !CONFIG_DM_VIDEO */
 482
 483 static int reserve_trace(void)
 484 {
 485 #ifdef CONFIG_TRACE
 486         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 487         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 488         debug("Reserving %dk for trace data at: %08lx\n",
 489               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 490 #endif
 491
 492         return 0;
 493 }
 494
 495 static int reserve_uboot(void)
 496 {
 497         /*
 498          * reserve memory for U-Boot code, data & bss
 499          * round down to next 4 kB limit
 500          */
 501         gd->relocaddr -= gd->mon_len;
 502         gd->relocaddr &= ~(4096 - 1);
 503 #ifdef CONFIG_E500
 504         /* round down to next 64 kB limit so that IVPR stays aligned */
 505         gd->relocaddr &= ~(65536 - 1);
 506 #endif
 507
 508         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 509               gd->relocaddr);
 510
 511         gd->start_addr_sp = gd->relocaddr;
 512
 513         return 0;
 514 }
 515
 516 #ifndef CONFIG_SPL_BUILD
 517 /* reserve memory for malloc() area */
 518 static int reserve_malloc(void)
 519 {
 520         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 521         debug("Reserving %dk for malloc() at: %08lx\n",
 522                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 523         return 0;
 524 }
 525
 526 /* (permanently) allocate a Board Info struct */
 527 static int reserve_board(void)
 528 {
 529         if (!gd->bd) {
 530                 gd->start_addr_sp -= sizeof(bd_t);
 531                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 532                 memset(gd->bd, '\0', sizeof(bd_t));
 533                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 534                       sizeof(bd_t), gd->start_addr_sp);
 535         }
 536         return 0;
 537 }
 538 #endif
 539
 540 static int setup_machine(void)
 541 {
 542 #ifdef CONFIG_MACH_TYPE
 543         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 544 #endif
 545         return 0;
 546 }
 547
 548 static int reserve_global_data(void)
 549 {
 550         gd->start_addr_sp -= sizeof(gd_t);
 551         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 552         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 553                         sizeof(gd_t), gd->start_addr_sp);
 554         return 0;
 555 }
 556
 557 static int reserve_fdt(void)
 558 {
 559 #ifndef CONFIG_OF_EMBED
 560         /*
 561          * If the device tree is sitting immediately above our image then we
 562          * must relocate it. If it is embedded in the data section, then it
 563          * will be relocated with other data.
 564          */
 565         if (gd->fdt_blob) {
 566                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 567
 568                 gd->start_addr_sp -= gd->fdt_size;
 569                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 570                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 571                       gd->fdt_size, gd->start_addr_sp);
 572         }
 573 #endif
 574
 575         return 0;
 576 }
 577
 578 int arch_reserve_stacks(void)
 579 {
 580         return 0;
 581 }
 582
 583 static int reserve_stacks(void)
 584 {
 585         /* make stack pointer 16-byte aligned */
 586         gd->start_addr_sp -= 16;
 587         gd->start_addr_sp &= ~0xf;
 588
 589         /*
 590          * let the architecture-specific code tailor gd->start_addr_sp and
 591          * gd->irq_sp
 592          */
 593         return arch_reserve_stacks();
 594 }
 595
 596 static int display_new_sp(void)
 597 {
 598         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 599
 600         return 0;
 601 }
 602
 603 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
 604 static int setup_board_part1(void)
 605 {
 606         bd_t *bd = gd->bd;
 607
 608         /*
 609          * Save local variables to board info struct
 610          */
 611         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 612         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 613
 614 #ifdef CONFIG_SYS_SRAM_BASE
 615         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 616         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 617 #endif
 618
 619 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 620                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 621         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 622 #endif
 623 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 624         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 625 #endif
 626 #if defined(CONFIG_MPC83xx)
 627         bd->bi_immrbar = CONFIG_SYS_IMMR;
 628 #endif
 629
 630         return 0;
 631 }
 632 #endif
 633
 634 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 635 static int setup_board_part2(void)
 636 {
 637         bd_t *bd = gd->bd;
 638
 639         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 640         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 641 #if defined(CONFIG_CPM2)
 642         bd->bi_cpmfreq = gd->arch.cpm_clk;
 643         bd->bi_brgfreq = gd->arch.brg_clk;
 644         bd->bi_sccfreq = gd->arch.scc_clk;
 645         bd->bi_vco = gd->arch.vco_out;
 646 #endif /* CONFIG_CPM2 */
 647 #if defined(CONFIG_MPC512X)
 648         bd->bi_ipsfreq = gd->arch.ips_clk;
 649 #endif /* CONFIG_MPC512X */
 650 #if defined(CONFIG_MPC5xxx)
 651         bd->bi_ipbfreq = gd->arch.ipb_clk;
 652         bd->bi_pcifreq = gd->pci_clk;
 653 #endif /* CONFIG_MPC5xxx */
 654 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 655         bd->bi_pcifreq = gd->pci_clk;
 656 #endif
 657 #if defined(CONFIG_EXTRA_CLOCK)
 658         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 659         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 660         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 661 #endif
 662
 663         return 0;
 664 }
 665 #endif
 666
 667 #ifdef CONFIG_SYS_EXTBDINFO
 668 static int setup_board_extra(void)
 669 {
 670         bd_t *bd = gd->bd;
 671
 672         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 673         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 674                 sizeof(bd->bi_r_version));
 675
 676         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 677         bd->bi_plb_busfreq = gd->bus_clk;
 678 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 679                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 680                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 681         bd->bi_pci_busfreq = get_PCI_freq();
 682         bd->bi_opbfreq = get_OPB_freq();
 683 #elif defined(CONFIG_XILINX_405)
 684         bd->bi_pci_busfreq = get_PCI_freq();
 685 #endif
 686
 687         return 0;
 688 }
 689 #endif
 690
 691 #ifdef CONFIG_POST
 692 static int init_post(void)
 693 {
 694         post_bootmode_init();
 695         post_run(NULL, POST_ROM | post_bootmode_get(0));
 696
 697         return 0;
 698 }
 699 #endif
 700
 701 static int setup_dram_config(void)
 702 {
 703         /* Ram is board specific, so move it to board code ... */
 704         dram_init_banksize();
 705
 706         return 0;
 707 }
 708
 709 static int reloc_fdt(void)
 710 {
 711 #ifndef CONFIG_OF_EMBED
 712         if (gd->flags & GD_FLG_SKIP_RELOC)
 713                 return 0;
 714         if (gd->new_fdt) {
 715                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 716                 gd->fdt_blob = gd->new_fdt;
 717         }
 718 #endif
 719
 720         return 0;
 721 }
 722
 723 static int setup_reloc(void)
 724 {
 725         if (gd->flags & GD_FLG_SKIP_RELOC) {
 726                 debug("Skipping relocation due to flag\n");
 727                 return 0;
 728         }
 729
 730 #ifdef CONFIG_SYS_TEXT_BASE
 731         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 732 #ifdef CONFIG_M68K
 733         /*
 734          * On all ColdFire arch cpu, monitor code starts always
 735          * just after the default vector table location, so at 0x400
 736          */
 737         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 738 #endif
 739 #endif
 740         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 741
 742         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 743         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 744               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 745               gd->start_addr_sp);
 746
 747         return 0;
 748 }
 749
 750 /* ARM calls relocate_code from its crt0.S */
 751 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 752
 753 static int jump_to_copy(void)
 754 {
 755         if (gd->flags & GD_FLG_SKIP_RELOC)
 756                 return 0;
 757         /*
 758          * x86 is special, but in a nice way. It uses a trampoline which
 759          * enables the dcache if possible.
 760          *
 761          * For now, other archs use relocate_code(), which is implemented
 762          * similarly for all archs. When we do generic relocation, hopefully
 763          * we can make all archs enable the dcache prior to relocation.
 764          */
 765 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 766         /*
 767          * SDRAM and console are now initialised. The final stack can now
 768          * be setup in SDRAM. Code execution will continue in Flash, but
 769          * with the stack in SDRAM and Global Data in temporary memory
 770          * (CPU cache)
 771          */
 772         arch_setup_gd(gd->new_gd);
 773         board_init_f_r_trampoline(gd->start_addr_sp);
 774 #else
 775         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 776 #endif
 777
 778         return 0;
 779 }
 780 #endif
 781
 782 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 783 static int mark_bootstage(void)
 784 {
 785         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 786
 787         return 0;
 788 }
 789
 790 static int initf_console_record(void)
 791 {
 792 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 793         return console_record_init();
 794 #else
 795         return 0;
 796 #endif
 797 }
 798
 799 static int initf_dm(void)
 800 {
 801 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 802         int ret;
 803
 804         ret = dm_init_and_scan(true);
 805         if (ret)
 806                 return ret;
 807 #endif
 808
 809         return 0;
 810 }
 811
 812 /* Architecture-specific memory reservation */
 813 __weak int reserve_arch(void)
 814 {
 815         return 0;
 816 }
 817
 818 __weak int arch_cpu_init_dm(void)
 819 {
 820         return 0;
 821 }
 822
 823 static init_fnc_t init_sequence_f[] = {
 824 #ifdef CONFIG_SANDBOX
 825         setup_ram_buf,
 826 #endif
 827         setup_mon_len,
 828 #ifdef CONFIG_OF_CONTROL
 829         fdtdec_setup,
 830 #endif
 831 #ifdef CONFIG_TRACE
 832         trace_early_init,
 833 #endif
 834         initf_malloc,
 835         initf_console_record,
 836 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 837         /* TODO: can this go into arch_cpu_init()? */
 838         probecpu,
 839 #endif
 840 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 841         x86_fsp_init,
 842 #endif
 843         arch_cpu_init,          /* basic arch cpu dependent setup */
 844         initf_dm,
 845         arch_cpu_init_dm,
 846         mark_bootstage,         /* need timer, go after init dm */
 847 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 848         board_early_init_f,
 849 #endif
 850         /* TODO: can any of this go into arch_cpu_init()? */
 851 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 852         get_clocks,             /* get CPU and bus clocks (etc.) */
 853 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 854                 && !defined(CONFIG_TQM885D)
 855         adjust_sdram_tbs_8xx,
 856 #endif
 857         /* TODO: can we rename this to timer_init()? */
 858         init_timebase,
 859 #endif
 860 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
 861                 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
 862                 defined(CONFIG_SPARC)
 863         timer_init,             /* initialize timer */
 864 #endif
 865 #ifdef CONFIG_SYS_ALLOC_DPRAM
 866 #if !defined(CONFIG_CPM2)
 867         dpram_init,
 868 #endif
 869 #endif
 870 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 871         board_postclk_init,
 872 #endif
 873 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 874         get_clocks,
 875 #endif
 876         env_init,               /* initialize environment */
 877 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 878         /* get CPU and bus clocks according to the environment variable */
 879         get_clocks_866,
 880         /* adjust sdram refresh rate according to the new clock */
 881         sdram_adjust_866,
 882         init_timebase,
 883 #endif
 884         init_baud_rate,         /* initialze baudrate settings */
 885         serial_init,            /* serial communications setup */
 886         console_init_f,         /* stage 1 init of console */
 887 #ifdef CONFIG_SANDBOX
 888         sandbox_early_getopt_check,
 889 #endif
 890 #ifdef CONFIG_OF_CONTROL
 891         fdtdec_prepare_fdt,
 892 #endif
 893         display_options,        /* say that we are here */
 894         display_text_info,      /* show debugging info if required */
 895 #if defined(CONFIG_MPC8260)
 896         prt_8260_rsr,
 897         prt_8260_clks,
 898 #endif /* CONFIG_MPC8260 */
 899 #if defined(CONFIG_MPC83xx)
 900         prt_83xx_rsr,
 901 #endif
 902 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 903         checkcpu,
 904 #endif
 905         print_cpuinfo,          /* display cpu info (and speed) */
 906 #if defined(CONFIG_MPC5xxx)
 907         prt_mpc5xxx_clks,
 908 #endif /* CONFIG_MPC5xxx */
 909 #if defined(CONFIG_DISPLAY_BOARDINFO)
 910         show_board_info,
 911 #endif
 912         INIT_FUNC_WATCHDOG_INIT
 913 #if defined(CONFIG_MISC_INIT_F)
 914         misc_init_f,
 915 #endif
 916         INIT_FUNC_WATCHDOG_RESET
 917 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 918         init_func_i2c,
 919 #endif
 920 #if defined(CONFIG_HARD_SPI)
 921         init_func_spi,
 922 #endif
 923         announce_dram_init,
 924         /* TODO: unify all these dram functions? */
 925 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 926                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 927         dram_init,              /* configure available RAM banks */
 928 #endif
 929 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 930         init_func_ram,
 931 #endif
 932 #ifdef CONFIG_POST
 933         post_init_f,
 934 #endif
 935         INIT_FUNC_WATCHDOG_RESET
 936 #if defined(CONFIG_SYS_DRAM_TEST)
 937         testdram,
 938 #endif /* CONFIG_SYS_DRAM_TEST */
 939         INIT_FUNC_WATCHDOG_RESET
 940
 941 #ifdef CONFIG_POST
 942         init_post,
 943 #endif
 944         INIT_FUNC_WATCHDOG_RESET
 945         /*
 946          * Now that we have DRAM mapped and working, we can
 947          * relocate the code and continue running from DRAM.
 948          *
 949          * Reserve memory at end of RAM for (top down in that order):
 950          *  - area that won't get touched by U-Boot and Linux (optional)
 951          *  - kernel log buffer
 952          *  - protected RAM
 953          *  - LCD framebuffer
 954          *  - monitor code
 955          *  - board info struct
 956          */
 957         setup_dest_addr,
 958 #if defined(CONFIG_BLACKFIN)
 959         /* Blackfin u-boot monitor should be on top of the ram */
 960         reserve_uboot,
 961 #endif
 962 #if defined(CONFIG_SPARC)
 963         reserve_prom,
 964 #endif
 965 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 966         reserve_logbuffer,
 967 #endif
 968 #ifdef CONFIG_PRAM
 969         reserve_pram,
 970 #endif
 971         reserve_round_4k,
 972 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 973                 defined(CONFIG_ARM)
 974         reserve_mmu,
 975 #endif
 976 #ifdef CONFIG_DM_VIDEO
 977         reserve_video,
 978 #else
 979 # ifdef CONFIG_LCD
 980         reserve_lcd,
 981 # endif
 982         /* TODO: Why the dependency on CONFIG_8xx? */
 983 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 984                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 985                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 986         reserve_legacy_video,
 987 # endif
 988 #endif /* CONFIG_DM_VIDEO */
 989         reserve_trace,
 990 #if !defined(CONFIG_BLACKFIN)
 991         reserve_uboot,
 992 #endif
 993 #ifndef CONFIG_SPL_BUILD
 994         reserve_malloc,
 995         reserve_board,
 996 #endif
 997         setup_machine,
 998         reserve_global_data,
 999         reserve_fdt,
1000         reserve_arch,
1001         reserve_stacks,
1002         setup_dram_config,
1003         show_dram_config,
1004 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1005         setup_board_part1,
1006 #endif
1007 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1008         INIT_FUNC_WATCHDOG_RESET
1009         setup_board_part2,
1010 #endif
1011         display_new_sp,
1012 #ifdef CONFIG_SYS_EXTBDINFO
1013         setup_board_extra,
1014 #endif
1015         INIT_FUNC_WATCHDOG_RESET
1016         reloc_fdt,
1017         setup_reloc,
1018 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1019         copy_uboot_to_ram,
1020         clear_bss,
1021         do_elf_reloc_fixups,
1022 #endif
1023 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1024         jump_to_copy,
1025 #endif
1026         NULL,
1027 };
1028
1029 void board_init_f(ulong boot_flags)
1030 {
1031 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1032         /*
1033          * For some archtectures, global data is initialized and used before
1034          * calling this function. The data should be preserved. For others,
1035          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1036          * here to host global data until relocation.
1037          */
1038         gd_t data;
1039
1040         gd = &data;
1041
1042         /*
1043          * Clear global data before it is accessed at debug print
1044          * in initcall_run_list. Otherwise the debug print probably
1045          * get the wrong vaule of gd->have_console.
1046          */
1047         zero_global_data();
1048 #endif
1049
1050         gd->flags = boot_flags;
1051         gd->have_console = 0;
1052
1053         if (initcall_run_list(init_sequence_f))
1054                 hang();
1055
1056 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1057                 !defined(CONFIG_EFI_APP)
1058         /* NOTREACHED - jump_to_copy() does not return */
1059         hang();
1060 #endif
1061 }
1062
1063 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1064 /*
1065  * For now this code is only used on x86.
1066  *
1067  * init_sequence_f_r is the list of init functions which are run when
1068  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1069  * The following limitations must be considered when implementing an
1070  * '_f_r' function:
1071  *  - 'static' variables are read-only
1072  *  - Global Data (gd->xxx) is read/write
1073  *
1074  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1075  * supported).  It _should_, if possible, copy global data to RAM and
1076  * initialise the CPU caches (to speed up the relocation process)
1077  *
1078  * NOTE: At present only x86 uses this route, but it is intended that
1079  * all archs will move to this when generic relocation is implemented.
1080  */
1081 static init_fnc_t init_sequence_f_r[] = {
1082         init_cache_f_r,
1083
1084         NULL,
1085 };
1086
1087 void board_init_f_r(void)
1088 {
1089         if (initcall_run_list(init_sequence_f_r))
1090                 hang();
1091
1092         /*
1093          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1094          * Transfer execution from Flash to RAM by calculating the address
1095          * of the in-RAM copy of board_init_r() and calling it
1096          */
1097         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1098
1099         /* NOTREACHED - board_init_r() does not return */
1100         hang();
1101 }
1102 #endif /* CONFIG_X86 */