2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <environment.h>
21 #include <init_helpers.h>
29 #include <status_led.h>
34 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
38 #include <asm/sections.h>
40 #include <linux/errno.h>
43 * Pointer to initial global data area
45 * Here we initialize it if needed.
47 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
48 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
49 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
50 DECLARE_GLOBAL_DATA_PTR
= (gd_t
*) (CONFIG_SYS_INIT_GD_ADDR
);
52 DECLARE_GLOBAL_DATA_PTR
;
56 * TODO(sjg@chromium.org): IMO this code should be
57 * refactored to a single function, something like:
59 * void led_set_state(enum led_colour_t colour, int on);
61 /************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
66 __weak
void coloured_LED_init(void) {}
67 __weak
void red_led_on(void) {}
68 __weak
void red_led_off(void) {}
69 __weak
void green_led_on(void) {}
70 __weak
void green_led_off(void) {}
71 __weak
void yellow_led_on(void) {}
72 __weak
void yellow_led_off(void) {}
73 __weak
void blue_led_on(void) {}
74 __weak
void blue_led_off(void) {}
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
87 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
88 static int init_func_watchdog_init(void)
90 # if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
92 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
93 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
94 defined(CONFIG_IMX_WATCHDOG))
96 puts(" Watchdog enabled\n");
103 int init_func_watchdog_reset(void)
109 #endif /* CONFIG_WATCHDOG */
111 __weak
void board_add_ram_info(int use_default
)
113 /* please define platform specific board_add_ram_info() */
116 static int init_baud_rate(void)
118 gd
->baudrate
= getenv_ulong("baudrate", 10, CONFIG_BAUDRATE
);
122 static int display_text_info(void)
124 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
125 ulong bss_start
, bss_end
, text_base
;
127 bss_start
= (ulong
)&__bss_start
;
128 bss_end
= (ulong
)&__bss_end
;
130 #ifdef CONFIG_SYS_TEXT_BASE
131 text_base
= CONFIG_SYS_TEXT_BASE
;
133 text_base
= CONFIG_SYS_MONITOR_BASE
;
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
137 text_base
, bss_start
, bss_end
);
143 static int announce_dram_init(void)
149 static int show_dram_config(void)
151 unsigned long long size
;
153 #ifdef CONFIG_NR_DRAM_BANKS
156 debug("\nRAM Configuration:\n");
157 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
158 size
+= gd
->bd
->bi_dram
[i
].size
;
159 debug("Bank #%d: %llx ", i
,
160 (unsigned long long)(gd
->bd
->bi_dram
[i
].start
));
162 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
170 print_size(size
, "");
171 board_add_ram_info(0);
177 __weak
int dram_init_banksize(void)
179 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
180 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
181 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
187 #if defined(CONFIG_SYS_I2C)
188 static int init_func_i2c(void)
191 #ifdef CONFIG_SYS_I2C
194 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
201 #if defined(CONFIG_HARD_SPI)
202 static int init_func_spi(void)
212 static int zero_global_data(void)
214 memset((void *)gd
, '\0', sizeof(gd_t
));
219 static int setup_mon_len(void)
221 #if defined(__ARM__) || defined(__MICROBLAZE__)
222 gd
->mon_len
= (ulong
)&__bss_end
- (ulong
)_start
;
223 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
224 gd
->mon_len
= (ulong
)&_end
- (ulong
)_init
;
225 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
226 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
227 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
228 gd
->mon_len
= (ulong
)(&__bss_end
) - (ulong
)(&_start
);
229 #elif defined(CONFIG_SYS_MONITOR_BASE)
230 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
231 gd
->mon_len
= (ulong
)&__bss_end
- CONFIG_SYS_MONITOR_BASE
;
236 __weak
int arch_cpu_init(void)
241 __weak
int mach_cpu_init(void)
246 /* Get the top of usable RAM */
247 __weak ulong
board_get_usable_ram_top(ulong total_size
)
249 #ifdef CONFIG_SYS_SDRAM_BASE
251 * Detect whether we have so much RAM that it goes past the end of our
252 * 32-bit address space. If so, clip the usable RAM so it doesn't.
254 if (gd
->ram_top
< CONFIG_SYS_SDRAM_BASE
)
256 * Will wrap back to top of 32-bit space when reservations
264 static int setup_dest_addr(void)
266 debug("Monitor len: %08lX\n", gd
->mon_len
);
268 * Ram is setup, size stored in gd !!
270 debug("Ram size: %08lX\n", (ulong
)gd
->ram_size
);
271 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
273 * Subtract specified amount of memory to hide so that it won't
274 * get "touched" at all by U-Boot. By fixing up gd->ram_size
275 * the Linux kernel should now get passed the now "corrected"
276 * memory size and won't touch it either. This should work
277 * for arch/ppc and arch/powerpc. Only Linux board ports in
278 * arch/powerpc with bootwrapper support, that recalculate the
279 * memory size from the SDRAM controller setup will have to
282 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
284 #ifdef CONFIG_SYS_SDRAM_BASE
285 gd
->ram_top
= CONFIG_SYS_SDRAM_BASE
;
287 gd
->ram_top
+= get_effective_memsize();
288 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
289 gd
->relocaddr
= gd
->ram_top
;
290 debug("Ram top: %08lX\n", (ulong
)gd
->ram_top
);
291 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
293 * We need to make sure the location we intend to put secondary core
294 * boot code is reserved and not used by any part of u-boot
296 if (gd
->relocaddr
> determine_mp_bootpg(NULL
)) {
297 gd
->relocaddr
= determine_mp_bootpg(NULL
);
298 debug("Reserving MP boot page to %08lx\n", gd
->relocaddr
);
304 #if defined(CONFIG_LOGBUFFER)
305 static int reserve_logbuffer(void)
307 #ifndef CONFIG_ALT_LB_ADDR
308 /* reserve kernel log buffer */
309 gd
->relocaddr
-= LOGBUFF_RESERVE
;
310 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN
,
319 /* reserve protected RAM */
320 static int reserve_pram(void)
324 reg
= getenv_ulong("pram", 10, CONFIG_PRAM
);
325 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
326 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
330 #endif /* CONFIG_PRAM */
332 /* Round memory pointer down to next 4 kB limit */
333 static int reserve_round_4k(void)
335 gd
->relocaddr
&= ~(4096 - 1);
340 static int reserve_mmu(void)
342 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
343 /* reserve TLB table */
344 gd
->arch
.tlb_size
= PGTABLE_SIZE
;
345 gd
->relocaddr
-= gd
->arch
.tlb_size
;
347 /* round down to next 64 kB limit */
348 gd
->relocaddr
&= ~(0x10000 - 1);
350 gd
->arch
.tlb_addr
= gd
->relocaddr
;
351 debug("TLB table from %08lx to %08lx\n", gd
->arch
.tlb_addr
,
352 gd
->arch
.tlb_addr
+ gd
->arch
.tlb_size
);
354 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
356 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
357 * with location within secure ram.
359 gd
->arch
.tlb_allocated
= gd
->arch
.tlb_addr
;
367 static int reserve_video(void)
369 #ifdef CONFIG_DM_VIDEO
373 addr
= gd
->relocaddr
;
374 ret
= video_reserve(&addr
);
377 gd
->relocaddr
= addr
;
378 #elif defined(CONFIG_LCD)
379 # ifdef CONFIG_FB_ADDR
380 gd
->fb_base
= CONFIG_FB_ADDR
;
382 /* reserve memory for LCD display (always full pages) */
383 gd
->relocaddr
= lcd_setmem(gd
->relocaddr
);
384 gd
->fb_base
= gd
->relocaddr
;
385 # endif /* CONFIG_FB_ADDR */
386 #elif defined(CONFIG_VIDEO) && \
387 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
388 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
389 !defined(CONFIG_M68K)
390 /* reserve memory for video display (always full pages) */
391 gd
->relocaddr
= video_setmem(gd
->relocaddr
);
392 gd
->fb_base
= gd
->relocaddr
;
398 static int reserve_trace(void)
401 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
402 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
403 debug("Reserving %dk for trace data at: %08lx\n",
404 CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
410 static int reserve_uboot(void)
413 * reserve memory for U-Boot code, data & bss
414 * round down to next 4 kB limit
416 gd
->relocaddr
-= gd
->mon_len
;
417 gd
->relocaddr
&= ~(4096 - 1);
419 /* round down to next 64 kB limit so that IVPR stays aligned */
420 gd
->relocaddr
&= ~(65536 - 1);
423 debug("Reserving %ldk for U-Boot at: %08lx\n", gd
->mon_len
>> 10,
426 gd
->start_addr_sp
= gd
->relocaddr
;
431 /* reserve memory for malloc() area */
432 static int reserve_malloc(void)
434 gd
->start_addr_sp
= gd
->start_addr_sp
- TOTAL_MALLOC_LEN
;
435 debug("Reserving %dk for malloc() at: %08lx\n",
436 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
440 /* (permanently) allocate a Board Info struct */
441 static int reserve_board(void)
444 gd
->start_addr_sp
-= sizeof(bd_t
);
445 gd
->bd
= (bd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(bd_t
));
446 memset(gd
->bd
, '\0', sizeof(bd_t
));
447 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
448 sizeof(bd_t
), gd
->start_addr_sp
);
453 static int setup_machine(void)
455 #ifdef CONFIG_MACH_TYPE
456 gd
->bd
->bi_arch_number
= CONFIG_MACH_TYPE
; /* board id for Linux */
461 static int reserve_global_data(void)
463 gd
->start_addr_sp
-= sizeof(gd_t
);
464 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
465 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
466 sizeof(gd_t
), gd
->start_addr_sp
);
470 static int reserve_fdt(void)
472 #ifndef CONFIG_OF_EMBED
474 * If the device tree is sitting immediately above our image then we
475 * must relocate it. If it is embedded in the data section, then it
476 * will be relocated with other data.
479 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
) + 0x1000, 32);
481 gd
->start_addr_sp
-= gd
->fdt_size
;
482 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
483 debug("Reserving %lu Bytes for FDT at: %08lx\n",
484 gd
->fdt_size
, gd
->start_addr_sp
);
491 int arch_reserve_stacks(void)
496 static int reserve_stacks(void)
498 /* make stack pointer 16-byte aligned */
499 gd
->start_addr_sp
-= 16;
500 gd
->start_addr_sp
&= ~0xf;
503 * let the architecture-specific code tailor gd->start_addr_sp and
506 return arch_reserve_stacks();
509 static int display_new_sp(void)
511 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
516 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
518 static int setup_board_part1(void)
523 * Save local variables to board info struct
525 bd
->bi_memstart
= CONFIG_SYS_SDRAM_BASE
; /* start of memory */
526 bd
->bi_memsize
= gd
->ram_size
; /* size in bytes */
528 #ifdef CONFIG_SYS_SRAM_BASE
529 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
530 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
533 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
534 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
535 bd
->bi_immr_base
= CONFIG_SYS_IMMR
; /* base of IMMR register */
537 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
538 bd
->bi_mbar_base
= CONFIG_SYS_MBAR
; /* base of internal registers */
540 #if defined(CONFIG_MPC83xx)
541 bd
->bi_immrbar
= CONFIG_SYS_IMMR
;
548 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
549 static int setup_board_part2(void)
553 bd
->bi_intfreq
= gd
->cpu_clk
; /* Internal Freq, in Hz */
554 bd
->bi_busfreq
= gd
->bus_clk
; /* Bus Freq, in Hz */
555 #if defined(CONFIG_CPM2)
556 bd
->bi_cpmfreq
= gd
->arch
.cpm_clk
;
557 bd
->bi_brgfreq
= gd
->arch
.brg_clk
;
558 bd
->bi_sccfreq
= gd
->arch
.scc_clk
;
559 bd
->bi_vco
= gd
->arch
.vco_out
;
560 #endif /* CONFIG_CPM2 */
561 #if defined(CONFIG_MPC512X)
562 bd
->bi_ipsfreq
= gd
->arch
.ips_clk
;
563 #endif /* CONFIG_MPC512X */
564 #if defined(CONFIG_MPC5xxx)
565 bd
->bi_ipbfreq
= gd
->arch
.ipb_clk
;
566 bd
->bi_pcifreq
= gd
->pci_clk
;
567 #endif /* CONFIG_MPC5xxx */
568 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
569 bd
->bi_pcifreq
= gd
->pci_clk
;
571 #if defined(CONFIG_EXTRA_CLOCK)
572 bd
->bi_inpfreq
= gd
->arch
.inp_clk
; /* input Freq in Hz */
573 bd
->bi_vcofreq
= gd
->arch
.vco_clk
; /* vco Freq in Hz */
574 bd
->bi_flbfreq
= gd
->arch
.flb_clk
; /* flexbus Freq in Hz */
582 static int init_post(void)
584 post_bootmode_init();
585 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
591 static int reloc_fdt(void)
593 #ifndef CONFIG_OF_EMBED
594 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
597 memcpy(gd
->new_fdt
, gd
->fdt_blob
, gd
->fdt_size
);
598 gd
->fdt_blob
= gd
->new_fdt
;
605 static int setup_reloc(void)
607 if (gd
->flags
& GD_FLG_SKIP_RELOC
) {
608 debug("Skipping relocation due to flag\n");
612 #ifdef CONFIG_SYS_TEXT_BASE
613 gd
->reloc_off
= gd
->relocaddr
- CONFIG_SYS_TEXT_BASE
;
616 * On all ColdFire arch cpu, monitor code starts always
617 * just after the default vector table location, so at 0x400
619 gd
->reloc_off
= gd
->relocaddr
- (CONFIG_SYS_TEXT_BASE
+ 0x400);
622 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
624 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
625 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
626 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
632 #ifdef CONFIG_OF_BOARD_FIXUP
633 static int fix_fdt(void)
635 return board_fix_fdt((void *)gd
->fdt_blob
);
639 /* ARM calls relocate_code from its crt0.S */
640 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
641 !CONFIG_IS_ENABLED(X86_64)
643 static int jump_to_copy(void)
645 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
648 * x86 is special, but in a nice way. It uses a trampoline which
649 * enables the dcache if possible.
651 * For now, other archs use relocate_code(), which is implemented
652 * similarly for all archs. When we do generic relocation, hopefully
653 * we can make all archs enable the dcache prior to relocation.
655 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
657 * SDRAM and console are now initialised. The final stack can now
658 * be setup in SDRAM. Code execution will continue in Flash, but
659 * with the stack in SDRAM and Global Data in temporary memory
662 arch_setup_gd(gd
->new_gd
);
663 board_init_f_r_trampoline(gd
->start_addr_sp
);
665 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
672 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
673 static int mark_bootstage(void)
675 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
680 static int initf_console_record(void)
682 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
683 return console_record_init();
689 static int initf_dm(void)
691 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
694 ret
= dm_init_and_scan(true);
698 #ifdef CONFIG_TIMER_EARLY
699 ret
= dm_timer_init();
707 /* Architecture-specific memory reservation */
708 __weak
int reserve_arch(void)
713 __weak
int arch_cpu_init_dm(void)
718 static const init_fnc_t init_sequence_f
[] = {
720 #ifdef CONFIG_OF_CONTROL
727 initf_console_record
,
728 #if defined(CONFIG_HAVE_FSP)
731 arch_cpu_init
, /* basic arch cpu dependent setup */
732 mach_cpu_init
, /* SoC/machine dependent CPU setup */
735 mark_bootstage
, /* need timer, go after init dm */
736 #if defined(CONFIG_BOARD_EARLY_INIT_F)
739 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
740 /* get CPU and bus clocks according to the environment variable */
741 get_clocks
, /* get CPU and bus clocks (etc.) */
743 #if !defined(CONFIG_M68K)
744 timer_init
, /* initialize timer */
746 #if defined(CONFIG_BOARD_POSTCLK_INIT)
749 env_init
, /* initialize environment */
750 init_baud_rate
, /* initialze baudrate settings */
751 serial_init
, /* serial communications setup */
752 console_init_f
, /* stage 1 init of console */
753 display_options
, /* say that we are here */
754 display_text_info
, /* show debugging info if required */
755 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
759 #if defined(CONFIG_DISPLAY_CPUINFO)
760 print_cpuinfo
, /* display cpu info (and speed) */
762 #if defined(CONFIG_DISPLAY_BOARDINFO)
765 INIT_FUNC_WATCHDOG_INIT
766 #if defined(CONFIG_MISC_INIT_F)
769 INIT_FUNC_WATCHDOG_RESET
770 #if defined(CONFIG_SYS_I2C)
773 #if defined(CONFIG_HARD_SPI)
777 dram_init
, /* configure available RAM banks */
781 INIT_FUNC_WATCHDOG_RESET
782 #if defined(CONFIG_SYS_DRAM_TEST)
784 #endif /* CONFIG_SYS_DRAM_TEST */
785 INIT_FUNC_WATCHDOG_RESET
790 INIT_FUNC_WATCHDOG_RESET
792 * Now that we have DRAM mapped and working, we can
793 * relocate the code and continue running from DRAM.
795 * Reserve memory at end of RAM for (top down in that order):
796 * - area that won't get touched by U-Boot and Linux (optional)
797 * - kernel log buffer
801 * - board info struct
804 #if defined(CONFIG_LOGBUFFER)
826 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
830 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
831 INIT_FUNC_WATCHDOG_RESET
835 #ifdef CONFIG_SYS_EXTBDINFO
838 #ifdef CONFIG_OF_BOARD_FIXUP
841 INIT_FUNC_WATCHDOG_RESET
844 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
849 #if defined(CONFIG_XTENSA)
852 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
853 !CONFIG_IS_ENABLED(X86_64)
859 void board_init_f(ulong boot_flags
)
861 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
863 * For some architectures, global data is initialized and used before
864 * calling this function. The data should be preserved. For others,
865 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
866 * here to host global data until relocation.
873 * Clear global data before it is accessed at debug print
874 * in initcall_run_list. Otherwise the debug print probably
875 * get the wrong value of gd->have_console.
880 gd
->flags
= boot_flags
;
881 gd
->have_console
= 0;
883 if (initcall_run_list(init_sequence_f
))
886 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
887 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
888 /* NOTREACHED - jump_to_copy() does not return */
893 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
895 * For now this code is only used on x86.
897 * init_sequence_f_r is the list of init functions which are run when
898 * U-Boot is executing from Flash with a semi-limited 'C' environment.
899 * The following limitations must be considered when implementing an
901 * - 'static' variables are read-only
902 * - Global Data (gd->xxx) is read/write
904 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
905 * supported). It _should_, if possible, copy global data to RAM and
906 * initialise the CPU caches (to speed up the relocation process)
908 * NOTE: At present only x86 uses this route, but it is intended that
909 * all archs will move to this when generic relocation is implemented.
911 static const init_fnc_t init_sequence_f_r
[] = {
912 #if !CONFIG_IS_ENABLED(X86_64)
919 void board_init_f_r(void)
921 if (initcall_run_list(init_sequence_f_r
))
925 * The pre-relocation drivers may be using memory that has now gone
926 * away. Mark serial as unavailable - this will fall back to the debug
929 gd
->flags
&= ~GD_FLG_SERIAL_READY
;
932 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
933 * Transfer execution from Flash to RAM by calculating the address
934 * of the in-RAM copy of board_init_r() and calling it
936 (board_init_r
+ gd
->reloc_off
)((gd_t
*)gd
, gd
->relocaddr
);
938 /* NOTREACHED - board_init_r() does not return */
941 #endif /* CONFIG_X86 */