1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
20 #include <display_options.h>
23 #include <env_internal.h>
39 #include <status_led.h>
45 #include <asm/cache.h>
46 #include <asm/global_data.h>
48 #include <asm/sections.h>
50 #include <linux/errno.h>
51 #include <linux/log2.h>
53 DECLARE_GLOBAL_DATA_PTR
;
56 * TODO(sjg@chromium.org): IMO this code should be
57 * refactored to a single function, something like:
59 * void led_set_state(enum led_colour_t colour, int on);
61 /************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
66 __weak
void coloured_LED_init(void) {}
67 __weak
void red_led_on(void) {}
68 __weak
void red_led_off(void) {}
69 __weak
void green_led_on(void) {}
70 __weak
void green_led_off(void) {}
71 __weak
void yellow_led_on(void) {}
72 __weak
void yellow_led_off(void) {}
73 __weak
void blue_led_on(void) {}
74 __weak
void blue_led_off(void) {}
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
87 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
88 static int init_func_watchdog_init(void)
90 # if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
92 defined(CONFIG_SH) || \
93 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
94 defined(CONFIG_IMX_WATCHDOG))
96 puts(" Watchdog enabled\n");
103 int init_func_watchdog_reset(void)
109 #endif /* CONFIG_WATCHDOG */
111 __weak
void board_add_ram_info(int use_default
)
113 /* please define platform specific board_add_ram_info() */
116 static int init_baud_rate(void)
118 gd
->baudrate
= env_get_ulong("baudrate", 10, CONFIG_BAUDRATE
);
122 static int display_text_info(void)
124 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
125 ulong bss_start
, bss_end
, text_base
;
127 bss_start
= (ulong
)__bss_start
;
128 bss_end
= (ulong
)__bss_end
;
130 #ifdef CONFIG_TEXT_BASE
131 text_base
= CONFIG_TEXT_BASE
;
133 text_base
= CONFIG_SYS_MONITOR_BASE
;
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
137 text_base
, bss_start
, bss_end
);
143 #ifdef CONFIG_SYSRESET
144 static int print_resetinfo(void)
148 bool status_printed
= false;
152 * Not all boards have sysreset drivers available during early
153 * boot, so don't fail if one can't be found.
155 for (ret
= uclass_first_device_check(UCLASS_SYSRESET
, &dev
); dev
;
156 ret
= uclass_next_device_check(&dev
)) {
158 debug("%s: %s sysreset device (error: %d)\n",
159 __func__
, dev
->name
, ret
);
163 if (!sysreset_get_status(dev
, status
, sizeof(status
))) {
164 printf("%s%s", status_printed
? " " : "", status
);
165 status_printed
= true;
175 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
176 static int print_cpuinfo(void)
182 dev
= cpu_get_current_dev();
184 debug("%s: Could not get CPU device\n",
189 ret
= cpu_get_desc(dev
, desc
, sizeof(desc
));
191 debug("%s: Could not get CPU description (err = %d)\n",
196 printf("CPU: %s\n", desc
);
202 static int announce_dram_init(void)
209 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
210 * and value in calculated unit scale multiplied by 10 (as fractional fixed
211 * point number with one decimal digit), which is human natural format,
212 * same what uses print_size() function for displaying. Mathematically it is:
213 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
215 * For example for size=87654321 we calculate scale=20 and val=836 which means
216 * that input has natural human format 83.6 M (mega = 2^20).
218 #define compute_size_scale_val(size, scale, val) do { \
219 scale = ilog2(size) / 10 * 10; \
220 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
221 if (val == 10240) { val = 10; scale += 10; } \
225 * Check if the sizes in their natural units written in decimal format with
226 * one fraction number are same.
228 static int sizes_near(unsigned long long size1
, unsigned long long size2
)
230 unsigned int size1_scale
, size1_val
, size2_scale
, size2_val
;
232 compute_size_scale_val(size1
, size1_scale
, size1_val
);
233 compute_size_scale_val(size2
, size2_scale
, size2_val
);
235 return size1_scale
== size2_scale
&& size1_val
== size2_val
;
238 static int show_dram_config(void)
240 unsigned long long size
;
243 debug("\nRAM Configuration:\n");
244 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
245 size
+= gd
->bd
->bi_dram
[i
].size
;
246 debug("Bank #%d: %llx ", i
,
247 (unsigned long long)(gd
->bd
->bi_dram
[i
].start
));
249 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
254 print_size(gd
->ram_size
, "");
255 if (!sizes_near(gd
->ram_size
, size
)) {
256 printf(" (effective ");
257 print_size(size
, ")");
259 board_add_ram_info(0);
265 __weak
int dram_init_banksize(void)
267 gd
->bd
->bi_dram
[0].start
= gd
->ram_base
;
268 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
273 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
274 static int init_func_i2c(void)
283 static int setup_mon_len(void)
285 #if defined(CONFIG_ARCH_NEXELL)
286 gd
->mon_len
= (ulong
)__bss_end
- (ulong
)__image_copy_start
;
287 #elif defined(__ARM__) || defined(__MICROBLAZE__)
288 gd
->mon_len
= (ulong
)__bss_end
- (ulong
)_start
;
289 #elif defined(CONFIG_SANDBOX) && !defined(__riscv)
290 gd
->mon_len
= (ulong
)_end
- (ulong
)_init
;
291 #elif defined(CONFIG_SANDBOX)
292 /* gcc does not provide _init in crti.o on RISC-V */
294 #elif defined(CONFIG_EFI_APP)
295 gd
->mon_len
= (ulong
)_end
- (ulong
)_init
;
296 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
297 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
298 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
299 gd
->mon_len
= (ulong
)(__bss_end
) - (ulong
)(_start
);
300 #elif defined(CONFIG_SYS_MONITOR_BASE)
301 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
302 gd
->mon_len
= (ulong
)__bss_end
- CONFIG_SYS_MONITOR_BASE
;
307 static int setup_spl_handoff(void)
309 #if CONFIG_IS_ENABLED(HANDOFF)
310 gd
->spl_handoff
= bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF
,
311 sizeof(struct spl_handoff
));
312 debug("Found SPL hand-off info %p\n", gd
->spl_handoff
);
318 __weak
int arch_cpu_init(void)
323 __weak
int mach_cpu_init(void)
328 /* Get the top of usable RAM */
329 __weak phys_addr_t
board_get_usable_ram_top(phys_size_t total_size
)
331 #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
333 * Detect whether we have so much RAM that it goes past the end of our
334 * 32-bit address space. If so, clip the usable RAM so it doesn't.
336 if (gd
->ram_top
< CFG_SYS_SDRAM_BASE
)
338 * Will wrap back to top of 32-bit space when reservations
346 __weak
int arch_setup_dest_addr(void)
351 static int setup_dest_addr(void)
353 debug("Monitor len: %08lX\n", gd
->mon_len
);
355 * Ram is setup, size stored in gd !!
357 debug("Ram size: %08llX\n", (unsigned long long)gd
->ram_size
);
358 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
360 * Subtract specified amount of memory to hide so that it won't
361 * get "touched" at all by U-Boot. By fixing up gd->ram_size
362 * the Linux kernel should now get passed the now "corrected"
363 * memory size and won't touch it either. This should work
364 * for arch/ppc and arch/powerpc. Only Linux board ports in
365 * arch/powerpc with bootwrapper support, that recalculate the
366 * memory size from the SDRAM controller setup will have to
369 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
371 #ifdef CFG_SYS_SDRAM_BASE
372 gd
->ram_base
= CFG_SYS_SDRAM_BASE
;
374 gd
->ram_top
= gd
->ram_base
+ get_effective_memsize();
375 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
376 gd
->relocaddr
= gd
->ram_top
;
377 debug("Ram top: %08llX\n", (unsigned long long)gd
->ram_top
);
379 return arch_setup_dest_addr();
383 /* reserve protected RAM */
384 static int reserve_pram(void)
388 reg
= env_get_ulong("pram", 10, CFG_PRAM
);
389 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
390 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
394 #endif /* CFG_PRAM */
396 /* Round memory pointer down to next 4 kB limit */
397 static int reserve_round_4k(void)
399 gd
->relocaddr
&= ~(4096 - 1);
403 __weak
int arch_reserve_mmu(void)
408 static int reserve_video_from_videoblob(void)
410 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF
) && spl_phase() > PHASE_SPL
) {
411 struct video_handoff
*ho
;
414 ho
= bloblist_find(BLOBLISTT_U_BOOT_VIDEO
, sizeof(*ho
));
416 return log_msg_ret("Missing video bloblist", -ENOENT
);
418 ret
= video_reserve_from_bloblist(ho
);
420 return log_msg_ret("Invalid Video handoff info", ret
);
422 /* Sanity check fb from blob is before current relocaddr */
423 if (likely(gd
->relocaddr
> (unsigned long)ho
->fb
))
424 gd
->relocaddr
= ho
->fb
;
431 * Check if any bloblist received specifying reserved areas from previous stage and adjust
432 * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
433 * from previous stage.
436 * IT is recommended that all bloblists from previous stage are reserved from ram_top
437 * as next stage will simply start reserving further regions after them.
439 static int setup_relocaddr_from_bloblist(void)
441 reserve_video_from_videoblob();
446 static int reserve_video(void)
448 if (CONFIG_IS_ENABLED(VIDEO
)) {
452 addr
= gd
->relocaddr
;
453 ret
= video_reserve(&addr
);
456 debug("Reserving %luk for video at: %08lx\n",
457 ((unsigned long)gd
->relocaddr
- addr
) >> 10, addr
);
458 gd
->relocaddr
= addr
;
464 static int reserve_trace(void)
467 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
468 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
469 debug("Reserving %luk for trace data at: %08lx\n",
470 (unsigned long)CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
476 static int reserve_uboot(void)
478 if (!(gd
->flags
& GD_FLG_SKIP_RELOC
)) {
480 * reserve memory for U-Boot code, data & bss
481 * round down to next 4 kB limit
483 gd
->relocaddr
-= gd
->mon_len
;
484 gd
->relocaddr
&= ~(4096 - 1);
485 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
486 /* round down to next 64 kB limit so that IVPR stays aligned */
487 gd
->relocaddr
&= ~(65536 - 1);
490 debug("Reserving %ldk for U-Boot at: %08lx\n",
491 gd
->mon_len
>> 10, gd
->relocaddr
);
494 gd
->start_addr_sp
= gd
->relocaddr
;
500 * reserve after start_addr_sp the requested size and make the stack pointer
501 * 16-byte aligned, this alignment is needed for cast on the reserved memory
502 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
503 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
505 static unsigned long reserve_stack_aligned(size_t size
)
507 return ALIGN_DOWN(gd
->start_addr_sp
- size
, 16);
510 #ifdef CONFIG_SYS_NONCACHED_MEMORY
511 static int reserve_noncached(void)
514 * The value of gd->start_addr_sp must match the value of malloc_start
515 * calculated in board_r.c:initr_malloc(), which is passed to
516 * dlmalloc.c:mem_malloc_init() and then used by
517 * cache.c:noncached_init()
519 * These calculations must match the code in cache.c:noncached_init()
521 gd
->start_addr_sp
= ALIGN(gd
->start_addr_sp
, MMU_SECTION_SIZE
) -
523 gd
->start_addr_sp
-= ALIGN(CONFIG_SYS_NONCACHED_MEMORY
,
525 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
526 CONFIG_SYS_NONCACHED_MEMORY
>> 20, gd
->start_addr_sp
);
532 /* reserve memory for malloc() area */
533 static int reserve_malloc(void)
535 gd
->start_addr_sp
= reserve_stack_aligned(TOTAL_MALLOC_LEN
);
536 debug("Reserving %dk for malloc() at: %08lx\n",
537 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
538 #ifdef CONFIG_SYS_NONCACHED_MEMORY
545 /* (permanently) allocate a Board Info struct */
546 static int reserve_board(void)
549 gd
->start_addr_sp
= reserve_stack_aligned(sizeof(struct bd_info
));
550 gd
->bd
= (struct bd_info
*)map_sysmem(gd
->start_addr_sp
,
551 sizeof(struct bd_info
));
552 memset(gd
->bd
, '\0', sizeof(struct bd_info
));
553 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
554 sizeof(struct bd_info
), gd
->start_addr_sp
);
559 static int reserve_global_data(void)
561 gd
->start_addr_sp
= reserve_stack_aligned(sizeof(gd_t
));
562 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
563 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
564 sizeof(gd_t
), gd
->start_addr_sp
);
568 static int reserve_fdt(void)
570 if (!IS_ENABLED(CONFIG_OF_EMBED
)) {
572 * If the device tree is sitting immediately above our image
573 * then we must relocate it. If it is embedded in the data
574 * section, then it will be relocated with other data.
577 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
), 32);
579 gd
->start_addr_sp
= reserve_stack_aligned(gd
->fdt_size
);
580 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
581 debug("Reserving %lu Bytes for FDT at: %08lx\n",
582 gd
->fdt_size
, gd
->start_addr_sp
);
589 static int reserve_bootstage(void)
591 #ifdef CONFIG_BOOTSTAGE
592 int size
= bootstage_get_size();
594 gd
->start_addr_sp
= reserve_stack_aligned(size
);
595 gd
->new_bootstage
= map_sysmem(gd
->start_addr_sp
, size
);
596 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size
,
603 __weak
int arch_reserve_stacks(void)
608 static int reserve_stacks(void)
610 /* make stack pointer 16-byte aligned */
611 gd
->start_addr_sp
= reserve_stack_aligned(16);
614 * let the architecture-specific code tailor gd->start_addr_sp and
617 return arch_reserve_stacks();
620 static int reserve_bloblist(void)
622 #ifdef CONFIG_BLOBLIST
623 /* Align to a 4KB boundary for easier reading of addresses */
624 gd
->start_addr_sp
= ALIGN_DOWN(gd
->start_addr_sp
-
625 CONFIG_BLOBLIST_SIZE_RELOC
, 0x1000);
626 gd
->new_bloblist
= map_sysmem(gd
->start_addr_sp
,
627 CONFIG_BLOBLIST_SIZE_RELOC
);
633 static int display_new_sp(void)
635 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
640 __weak
int arch_setup_bdinfo(void)
645 int setup_bdinfo(void)
647 struct bd_info
*bd
= gd
->bd
;
649 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM
)) {
650 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
651 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
654 return arch_setup_bdinfo();
658 static int init_post(void)
660 post_bootmode_init();
661 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
667 static int reloc_fdt(void)
669 if (!IS_ENABLED(CONFIG_OF_EMBED
)) {
671 memcpy(gd
->new_fdt
, gd
->fdt_blob
,
672 fdt_totalsize(gd
->fdt_blob
));
673 gd
->fdt_blob
= gd
->new_fdt
;
680 static int reloc_bootstage(void)
682 #ifdef CONFIG_BOOTSTAGE
683 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
685 if (gd
->new_bootstage
) {
686 int size
= bootstage_get_size();
688 debug("Copying bootstage from %p to %p, size %x\n",
689 gd
->bootstage
, gd
->new_bootstage
, size
);
690 memcpy(gd
->new_bootstage
, gd
->bootstage
, size
);
691 gd
->bootstage
= gd
->new_bootstage
;
692 bootstage_relocate();
699 static int reloc_bloblist(void)
701 #ifdef CONFIG_BLOBLIST
703 * Relocate only if we are supposed to send it
705 if ((gd
->flags
& GD_FLG_SKIP_RELOC
) &&
706 CONFIG_BLOBLIST_SIZE
== CONFIG_BLOBLIST_SIZE_RELOC
) {
707 debug("Not relocating bloblist\n");
710 if (gd
->new_bloblist
) {
711 debug("Copying bloblist from %p to %p, size %x\n",
712 gd
->bloblist
, gd
->new_bloblist
, gd
->bloblist
->total_size
);
713 return bloblist_reloc(gd
->new_bloblist
,
714 CONFIG_BLOBLIST_SIZE_RELOC
);
721 void mcheck_on_ramrelocation(size_t offset
);
722 static int setup_reloc(void)
724 if (!(gd
->flags
& GD_FLG_SKIP_RELOC
)) {
725 #ifdef CONFIG_TEXT_BASE
727 gd
->reloc_off
= gd
->relocaddr
- (unsigned long)__image_copy_start
;
728 #elif defined(CONFIG_MICROBLAZE)
729 gd
->reloc_off
= gd
->relocaddr
- (u32
)_start
;
730 #elif defined(CONFIG_M68K)
732 * On all ColdFire arch cpu, monitor code starts always
733 * just after the default vector table location, so at 0x400
735 gd
->reloc_off
= gd
->relocaddr
- (CONFIG_TEXT_BASE
+ 0x400);
736 #elif !defined(CONFIG_SANDBOX)
737 gd
->reloc_off
= gd
->relocaddr
- CONFIG_TEXT_BASE
;
742 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
744 if (gd
->flags
& GD_FLG_SKIP_RELOC
) {
745 debug("Skipping relocation due to flag\n");
747 #ifdef MCHECK_HEAP_PROTECTION
748 mcheck_on_ramrelocation(gd
->reloc_off
);
750 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
751 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
752 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
759 #ifdef CONFIG_OF_BOARD_FIXUP
760 static int fix_fdt(void)
762 return board_fix_fdt((void *)gd
->fdt_blob
);
766 /* ARM calls relocate_code from its crt0.S */
767 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
769 static int jump_to_copy(void)
771 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
774 * x86 is special, but in a nice way. It uses a trampoline which
775 * enables the dcache if possible.
777 * For now, other archs use relocate_code(), which is implemented
778 * similarly for all archs. When we do generic relocation, hopefully
779 * we can make all archs enable the dcache prior to relocation.
781 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
783 * SDRAM and console are now initialised. The final stack can now
784 * be setup in SDRAM. Code execution will continue in Flash, but
785 * with the stack in SDRAM and Global Data in temporary memory
788 arch_setup_gd(gd
->new_gd
);
789 # if CONFIG_IS_ENABLED(X86_64)
790 board_init_f_r_trampoline64(gd
->new_gd
, gd
->start_addr_sp
);
792 board_init_f_r_trampoline(gd
->start_addr_sp
);
795 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
802 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
803 static int initf_bootstage(void)
805 bool from_spl
= IS_ENABLED(CONFIG_SPL_BOOTSTAGE
) &&
806 IS_ENABLED(CONFIG_BOOTSTAGE_STASH
);
809 ret
= bootstage_init(!from_spl
);
813 ret
= bootstage_unstash_default();
814 if (ret
&& ret
!= -ENOENT
) {
815 debug("Failed to unstash bootstage: err=%d\n", ret
);
820 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
825 static int initf_dm(void)
827 #if defined(CONFIG_DM) && CONFIG_IS_ENABLED(SYS_MALLOC_F)
830 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F
, "dm_f");
831 ret
= dm_init_and_scan(true);
832 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F
);
836 if (IS_ENABLED(CONFIG_TIMER_EARLY
)) {
837 ret
= dm_timer_init();
846 /* Architecture-specific memory reservation */
847 __weak
int reserve_arch(void)
852 __weak
int checkcpu(void)
857 __weak
int clear_bss(void)
862 static const init_fnc_t init_sequence_f
[] = {
864 #ifdef CONFIG_OF_CONTROL
867 #ifdef CONFIG_TRACE_EARLY
872 initf_bootstage
, /* uses its own timer, so does not need DM */
876 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
879 INITCALL_EVENT(EVT_FSP_INIT_F
),
880 arch_cpu_init
, /* basic arch cpu dependent setup */
881 mach_cpu_init
, /* SoC/machine dependent CPU setup */
883 #if defined(CONFIG_BOARD_EARLY_INIT_F)
886 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
887 /* get CPU and bus clocks according to the environment variable */
888 get_clocks
, /* get CPU and bus clocks (etc.) */
890 #if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
891 timer_init
, /* initialize timer */
893 #if defined(CONFIG_BOARD_POSTCLK_INIT)
896 env_init
, /* initialize environment */
897 init_baud_rate
, /* initialze baudrate settings */
898 serial_init
, /* serial communications setup */
899 console_init_f
, /* stage 1 init of console */
900 display_options
, /* say that we are here */
901 display_text_info
, /* show debugging info if required */
903 #if defined(CONFIG_SYSRESET)
906 #if defined(CONFIG_DISPLAY_CPUINFO)
907 print_cpuinfo
, /* display cpu info (and speed) */
909 #if defined(CONFIG_DTB_RESELECT)
912 #if defined(CONFIG_DISPLAY_BOARDINFO)
915 INIT_FUNC_WATCHDOG_INIT
916 INITCALL_EVENT(EVT_MISC_INIT_F
),
917 INIT_FUNC_WATCHDOG_RESET
918 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
922 dram_init
, /* configure available RAM banks */
926 INIT_FUNC_WATCHDOG_RESET
927 #if defined(CFG_SYS_DRAM_TEST)
929 #endif /* CFG_SYS_DRAM_TEST */
930 INIT_FUNC_WATCHDOG_RESET
935 INIT_FUNC_WATCHDOG_RESET
937 * Now that we have DRAM mapped and working, we can
938 * relocate the code and continue running from DRAM.
940 * Reserve memory at end of RAM for (top down in that order):
941 * - area that won't get touched by U-Boot and Linux (optional)
942 * - kernel log buffer
946 * - board info struct
949 #if defined(CONFIG_OF_BOARD_FIXUP) && !defined(CONFIG_OF_INITIAL_DTB_READONLY)
956 setup_relocaddr_from_bloblist
,
965 #if defined(CONFIG_OF_BOARD_FIXUP) && defined(CONFIG_OF_INITIAL_DTB_READONLY)
975 INIT_FUNC_WATCHDOG_RESET
978 INIT_FUNC_WATCHDOG_RESET
979 #if !defined(CONFIG_OF_BOARD_FIXUP) || !defined(CONFIG_OF_INITIAL_DTB_READONLY)
985 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
991 * Deregister all cyclic functions before relocation, so that
992 * gd->cyclic_list does not contain any references to pre-relocation
993 * devices. Drivers will register their cyclic functions anew when the
994 * devices are probed again.
996 * This should happen as late as possible so that the window where a
997 * watchdog device is not serviced is as small as possible.
999 cyclic_unregister_all
,
1000 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1006 void board_init_f(ulong boot_flags
)
1008 gd
->flags
= boot_flags
;
1009 gd
->have_console
= 0;
1011 if (initcall_run_list(init_sequence_f
))
1014 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1015 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1016 !defined(CONFIG_ARC)
1017 /* NOTREACHED - jump_to_copy() does not return */
1022 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1024 * For now this code is only used on x86.
1026 * init_sequence_f_r is the list of init functions which are run when
1027 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1028 * The following limitations must be considered when implementing an
1030 * - 'static' variables are read-only
1031 * - Global Data (gd->xxx) is read/write
1033 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1034 * supported). It _should_, if possible, copy global data to RAM and
1035 * initialise the CPU caches (to speed up the relocation process)
1037 * NOTE: At present only x86 uses this route, but it is intended that
1038 * all archs will move to this when generic relocation is implemented.
1040 static const init_fnc_t init_sequence_f_r
[] = {
1041 #if !CONFIG_IS_ENABLED(X86_64)
1048 void board_init_f_r(void)
1050 if (initcall_run_list(init_sequence_f_r
))
1054 * The pre-relocation drivers may be using memory that has now gone
1055 * away. Mark serial as unavailable - this will fall back to the debug
1056 * UART if available.
1058 * Do the same with log drivers since the memory may not be available.
1060 gd
->flags
&= ~(GD_FLG_SERIAL_READY
| GD_FLG_LOG_READY
);
1066 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1067 * Transfer execution from Flash to RAM by calculating the address
1068 * of the in-RAM copy of board_init_r() and calling it
1070 (board_init_r
+ gd
->reloc_off
)((gd_t
*)gd
, gd
->relocaddr
);
1072 /* NOTREACHED - board_init_r() does not return */
1075 #endif /* CONFIG_X86 */