common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <console.h>
  17 #include <environment.h>
  18 #include <dm.h>
  19 #include <fdtdec.h>
  20 #include <fs.h>
  21 #if defined(CONFIG_CMD_IDE)
  22 #include <ide.h>
  23 #endif
  24 #include <i2c.h>
  25 #include <initcall.h>
  26 #include <logbuff.h>
  27 #include <malloc.h>
  28 #include <mapmem.h>
  29
  30 /* TODO: Can we move these into arch/ headers? */
  31 #ifdef CONFIG_8xx
  32 #include <mpc8xx.h>
  33 #endif
  34 #ifdef CONFIG_5xx
  35 #include <mpc5xx.h>
  36 #endif
  37 #ifdef CONFIG_MPC5xxx
  38 #include <mpc5xxx.h>
  39 #endif
  40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  41 #include <asm/mp.h>
  42 #endif
  43
  44 #include <os.h>
  45 #include <post.h>
  46 #include <spi.h>
  47 #include <status_led.h>
  48 #include <timer.h>
  49 #include <trace.h>
  50 #include <video.h>
  51 #include <watchdog.h>
  52 #include <asm/errno.h>
  53 #include <asm/io.h>
  54 #include <asm/sections.h>
  55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  56 #include <asm/init_helpers.h>
  57 #include <asm/relocate.h>
  58 #endif
  59 #ifdef CONFIG_SANDBOX
  60 #include <asm/state.h>
  61 #endif
  62 #include <dm/root.h>
  63 #include <linux/compiler.h>
  64
  65 /*
  66  * Pointer to initial global data area
  67  *
  68  * Here we initialize it if needed.
  69  */
  70 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  71 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  72 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  73 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  74 #else
  75 DECLARE_GLOBAL_DATA_PTR;
  76 #endif
  77
  78 /*
  79  * TODO(sjg@chromium.org): IMO this code should be
  80  * refactored to a single function, something like:
  81  *
  82  * void led_set_state(enum led_colour_t colour, int on);
  83  */
  84 /************************************************************************
  85  * Coloured LED functionality
  86  ************************************************************************
  87  * May be supplied by boards if desired
  88  */
  89 __weak void coloured_LED_init(void) {}
  90 __weak void red_led_on(void) {}
  91 __weak void red_led_off(void) {}
  92 __weak void green_led_on(void) {}
  93 __weak void green_led_off(void) {}
  94 __weak void yellow_led_on(void) {}
  95 __weak void yellow_led_off(void) {}
  96 __weak void blue_led_on(void) {}
  97 __weak void blue_led_off(void) {}
  98
  99 /*
 100  * Why is gd allocated a register? Prior to reloc it might be better to
 101  * just pass it around to each function in this file?
 102  *
 103  * After reloc one could argue that it is hardly used and doesn't need
 104  * to be in a register. Or if it is it should perhaps hold pointers to all
 105  * global data for all modules, so that post-reloc we can avoid the massive
 106  * literal pool we get on ARM. Or perhaps just encourage each module to use
 107  * a structure...
 108  */
 109
 110 /*
 111  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 112  */
 113
 114 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 115 static int init_func_watchdog_init(void)
 116 {
 117 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 118         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 119         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 120         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
 121         defined(CONFIG_IMX_WATCHDOG))
 122         hw_watchdog_init();
 123         puts("       Watchdog enabled\n");
 124 # endif
 125         WATCHDOG_RESET();
 126
 127         return 0;
 128 }
 129
 130 int init_func_watchdog_reset(void)
 131 {
 132         WATCHDOG_RESET();
 133
 134         return 0;
 135 }
 136 #endif /* CONFIG_WATCHDOG */
 137
 138 __weak void board_add_ram_info(int use_default)
 139 {
 140         /* please define platform specific board_add_ram_info() */
 141 }
 142
 143 static int init_baud_rate(void)
 144 {
 145         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 146         return 0;
 147 }
 148
 149 static int display_text_info(void)
 150 {
 151 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 152         ulong bss_start, bss_end, text_base;
 153
 154         bss_start = (ulong)&__bss_start;
 155         bss_end = (ulong)&__bss_end;
 156
 157 #ifdef CONFIG_SYS_TEXT_BASE
 158         text_base = CONFIG_SYS_TEXT_BASE;
 159 #else
 160         text_base = CONFIG_SYS_MONITOR_BASE;
 161 #endif
 162
 163         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 164                 text_base, bss_start, bss_end);
 165 #endif
 166
 167 #ifdef CONFIG_USE_IRQ
 168         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 169         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 170 #endif
 171
 172         return 0;
 173 }
 174
 175 static int announce_dram_init(void)
 176 {
 177         puts("DRAM:  ");
 178         return 0;
 179 }
 180
 181 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 182 static int init_func_ram(void)
 183 {
 184 #ifdef  CONFIG_BOARD_TYPES
 185         int board_type = gd->board_type;
 186 #else
 187         int board_type = 0;     /* use dummy arg */
 188 #endif
 189
 190         gd->ram_size = initdram(board_type);
 191
 192         if (gd->ram_size > 0)
 193                 return 0;
 194
 195         puts("*** failed ***\n");
 196         return 1;
 197 }
 198 #endif
 199
 200 static int show_dram_config(void)
 201 {
 202         unsigned long long size;
 203
 204 #ifdef CONFIG_NR_DRAM_BANKS
 205         int i;
 206
 207         debug("\nRAM Configuration:\n");
 208         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 209                 size += gd->bd->bi_dram[i].size;
 210                 debug("Bank #%d: %llx ", i,
 211                       (unsigned long long)(gd->bd->bi_dram[i].start));
 212 #ifdef DEBUG
 213                 print_size(gd->bd->bi_dram[i].size, "\n");
 214 #endif
 215         }
 216         debug("\nDRAM:  ");
 217 #else
 218         size = gd->ram_size;
 219 #endif
 220
 221         print_size(size, "");
 222         board_add_ram_info(0);
 223         putc('\n');
 224
 225         return 0;
 226 }
 227
 228 __weak void dram_init_banksize(void)
 229 {
 230 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 231         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 232         gd->bd->bi_dram[0].size = get_effective_memsize();
 233 #endif
 234 }
 235
 236 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 237 static int init_func_i2c(void)
 238 {
 239         puts("I2C:   ");
 240 #ifdef CONFIG_SYS_I2C
 241         i2c_init_all();
 242 #else
 243         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 244 #endif
 245         puts("ready\n");
 246         return 0;
 247 }
 248 #endif
 249
 250 #if defined(CONFIG_HARD_SPI)
 251 static int init_func_spi(void)
 252 {
 253         puts("SPI:   ");
 254         spi_init();
 255         puts("ready\n");
 256         return 0;
 257 }
 258 #endif
 259
 260 __maybe_unused
 261 static int zero_global_data(void)
 262 {
 263         memset((void *)gd, '\0', sizeof(gd_t));
 264
 265         return 0;
 266 }
 267
 268 static int setup_mon_len(void)
 269 {
 270 #if defined(__ARM__) || defined(__MICROBLAZE__)
 271         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 272 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 273         gd->mon_len = (ulong)&_end - (ulong)_init;
 274 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 275         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 276 #elif defined(CONFIG_NDS32)
 277         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 278 #elif defined(CONFIG_SYS_MONITOR_BASE)
 279         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 280         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 281 #endif
 282         return 0;
 283 }
 284
 285 __weak int arch_cpu_init(void)
 286 {
 287         return 0;
 288 }
 289
 290 #ifdef CONFIG_SANDBOX
 291 static int setup_ram_buf(void)
 292 {
 293         struct sandbox_state *state = state_get_current();
 294
 295         gd->arch.ram_buf = state->ram_buf;
 296         gd->ram_size = state->ram_size;
 297
 298         return 0;
 299 }
 300 #endif
 301
 302 /* Get the top of usable RAM */
 303 __weak ulong board_get_usable_ram_top(ulong total_size)
 304 {
 305 #ifdef CONFIG_SYS_SDRAM_BASE
 306         /*
 307          * Detect whether we have so much RAM that it goes past the end of our
 308          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 309          */
 310         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 311                 /*
 312                  * Will wrap back to top of 32-bit space when reservations
 313                  * are made.
 314                  */
 315                 return 0;
 316 #endif
 317         return gd->ram_top;
 318 }
 319
 320 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
 321 {
 322 #ifdef CONFIG_SYS_MEM_TOP_HIDE
 323         return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
 324 #else
 325         return ram_size;
 326 #endif
 327 }
 328
 329 static int setup_dest_addr(void)
 330 {
 331         debug("Monitor len: %08lX\n", gd->mon_len);
 332         /*
 333          * Ram is setup, size stored in gd !!
 334          */
 335         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 336 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 337         /* Reserve memory for secure MMU tables, and/or security monitor */
 338         gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
 339         /*
 340          * Record secure memory location. Need recalcuate if memory splits
 341          * into banks, or the ram base is not zero.
 342          */
 343         gd->secure_ram = gd->ram_size;
 344 #endif
 345         /*
 346          * Subtract specified amount of memory to hide so that it won't
 347          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 348          * the Linux kernel should now get passed the now "corrected"
 349          * memory size and won't touch it either. This has been used
 350          * by arch/powerpc exclusively. Now ARMv8 takes advantage of
 351          * thie mechanism. If memory is split into banks, addresses
 352          * need to be calculated.
 353          */
 354         gd->ram_size = board_reserve_ram_top(gd->ram_size);
 355
 356 #ifdef CONFIG_SYS_SDRAM_BASE
 357         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 358 #endif
 359         gd->ram_top += get_effective_memsize();
 360         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 361         gd->relocaddr = gd->ram_top;
 362         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 363 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 364         /*
 365          * We need to make sure the location we intend to put secondary core
 366          * boot code is reserved and not used by any part of u-boot
 367          */
 368         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 369                 gd->relocaddr = determine_mp_bootpg(NULL);
 370                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 371         }
 372 #endif
 373         return 0;
 374 }
 375
 376 #if defined(CONFIG_SPARC)
 377 static int reserve_prom(void)
 378 {
 379         /* defined in arch/sparc/cpu/leon?/prom.c */
 380         extern void *__prom_start_reloc;
 381         int size = 8192; /* page table = 2k, prom = 6k */
 382         gd->relocaddr -= size;
 383         __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
 384         debug("Reserving %dk for PROM and page table at %08lx\n", size,
 385                 gd->relocaddr);
 386         return 0;
 387 }
 388 #endif
 389
 390 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 391 static int reserve_logbuffer(void)
 392 {
 393         /* reserve kernel log buffer */
 394         gd->relocaddr -= LOGBUFF_RESERVE;
 395         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 396                 gd->relocaddr);
 397         return 0;
 398 }
 399 #endif
 400
 401 #ifdef CONFIG_PRAM
 402 /* reserve protected RAM */
 403 static int reserve_pram(void)
 404 {
 405         ulong reg;
 406
 407         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 408         gd->relocaddr -= (reg << 10);           /* size is in kB */
 409         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 410               gd->relocaddr);
 411         return 0;
 412 }
 413 #endif /* CONFIG_PRAM */
 414
 415 /* Round memory pointer down to next 4 kB limit */
 416 static int reserve_round_4k(void)
 417 {
 418         gd->relocaddr &= ~(4096 - 1);
 419         return 0;
 420 }
 421
 422 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 423                 defined(CONFIG_ARM)
 424 static int reserve_mmu(void)
 425 {
 426         /* reserve TLB table */
 427         gd->arch.tlb_size = PGTABLE_SIZE;
 428         gd->relocaddr -= gd->arch.tlb_size;
 429
 430         /* round down to next 64 kB limit */
 431         gd->relocaddr &= ~(0x10000 - 1);
 432
 433         gd->arch.tlb_addr = gd->relocaddr;
 434         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 435               gd->arch.tlb_addr + gd->arch.tlb_size);
 436         return 0;
 437 }
 438 #endif
 439
 440 #ifdef CONFIG_DM_VIDEO
 441 static int reserve_video(void)
 442 {
 443         ulong addr;
 444         int ret;
 445
 446         addr = gd->relocaddr;
 447         ret = video_reserve(&addr);
 448         if (ret)
 449                 return ret;
 450         gd->relocaddr = addr;
 451
 452         return 0;
 453 }
 454 #else
 455
 456 # ifdef CONFIG_LCD
 457 static int reserve_lcd(void)
 458 {
 459 #  ifdef CONFIG_FB_ADDR
 460         gd->fb_base = CONFIG_FB_ADDR;
 461 #  else
 462         /* reserve memory for LCD display (always full pages) */
 463         gd->relocaddr = lcd_setmem(gd->relocaddr);
 464         gd->fb_base = gd->relocaddr;
 465 #  endif /* CONFIG_FB_ADDR */
 466
 467         return 0;
 468 }
 469 # endif /* CONFIG_LCD */
 470
 471 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 472                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 473                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 474 static int reserve_legacy_video(void)
 475 {
 476         /* reserve memory for video display (always full pages) */
 477         gd->relocaddr = video_setmem(gd->relocaddr);
 478         gd->fb_base = gd->relocaddr;
 479
 480         return 0;
 481 }
 482 # endif
 483 #endif /* !CONFIG_DM_VIDEO */
 484
 485 static int reserve_trace(void)
 486 {
 487 #ifdef CONFIG_TRACE
 488         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 489         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 490         debug("Reserving %dk for trace data at: %08lx\n",
 491               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 492 #endif
 493
 494         return 0;
 495 }
 496
 497 static int reserve_uboot(void)
 498 {
 499         /*
 500          * reserve memory for U-Boot code, data & bss
 501          * round down to next 4 kB limit
 502          */
 503         gd->relocaddr -= gd->mon_len;
 504         gd->relocaddr &= ~(4096 - 1);
 505 #ifdef CONFIG_E500
 506         /* round down to next 64 kB limit so that IVPR stays aligned */
 507         gd->relocaddr &= ~(65536 - 1);
 508 #endif
 509
 510         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 511               gd->relocaddr);
 512
 513         gd->start_addr_sp = gd->relocaddr;
 514
 515         return 0;
 516 }
 517
 518 #ifndef CONFIG_SPL_BUILD
 519 /* reserve memory for malloc() area */
 520 static int reserve_malloc(void)
 521 {
 522         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 523         debug("Reserving %dk for malloc() at: %08lx\n",
 524                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 525         return 0;
 526 }
 527
 528 /* (permanently) allocate a Board Info struct */
 529 static int reserve_board(void)
 530 {
 531         if (!gd->bd) {
 532                 gd->start_addr_sp -= sizeof(bd_t);
 533                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 534                 memset(gd->bd, '\0', sizeof(bd_t));
 535                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 536                       sizeof(bd_t), gd->start_addr_sp);
 537         }
 538         return 0;
 539 }
 540 #endif
 541
 542 static int setup_machine(void)
 543 {
 544 #ifdef CONFIG_MACH_TYPE
 545         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 546 #endif
 547         return 0;
 548 }
 549
 550 static int reserve_global_data(void)
 551 {
 552         gd->start_addr_sp -= sizeof(gd_t);
 553         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 554         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 555                         sizeof(gd_t), gd->start_addr_sp);
 556         return 0;
 557 }
 558
 559 static int reserve_fdt(void)
 560 {
 561 #ifndef CONFIG_OF_EMBED
 562         /*
 563          * If the device tree is sitting immediately above our image then we
 564          * must relocate it. If it is embedded in the data section, then it
 565          * will be relocated with other data.
 566          */
 567         if (gd->fdt_blob) {
 568                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 569
 570                 gd->start_addr_sp -= gd->fdt_size;
 571                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 572                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 573                       gd->fdt_size, gd->start_addr_sp);
 574         }
 575 #endif
 576
 577         return 0;
 578 }
 579
 580 int arch_reserve_stacks(void)
 581 {
 582         return 0;
 583 }
 584
 585 static int reserve_stacks(void)
 586 {
 587         /* make stack pointer 16-byte aligned */
 588         gd->start_addr_sp -= 16;
 589         gd->start_addr_sp &= ~0xf;
 590
 591         /*
 592          * let the architecture-specific code tailor gd->start_addr_sp and
 593          * gd->irq_sp
 594          */
 595         return arch_reserve_stacks();
 596 }
 597
 598 static int display_new_sp(void)
 599 {
 600         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 601
 602         return 0;
 603 }
 604
 605 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
 606 static int setup_board_part1(void)
 607 {
 608         bd_t *bd = gd->bd;
 609
 610         /*
 611          * Save local variables to board info struct
 612          */
 613         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 614         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 615
 616 #ifdef CONFIG_SYS_SRAM_BASE
 617         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 618         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 619 #endif
 620
 621 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 622                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 623         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 624 #endif
 625 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 626         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 627 #endif
 628 #if defined(CONFIG_MPC83xx)
 629         bd->bi_immrbar = CONFIG_SYS_IMMR;
 630 #endif
 631
 632         return 0;
 633 }
 634 #endif
 635
 636 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 637 static int setup_board_part2(void)
 638 {
 639         bd_t *bd = gd->bd;
 640
 641         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 642         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 643 #if defined(CONFIG_CPM2)
 644         bd->bi_cpmfreq = gd->arch.cpm_clk;
 645         bd->bi_brgfreq = gd->arch.brg_clk;
 646         bd->bi_sccfreq = gd->arch.scc_clk;
 647         bd->bi_vco = gd->arch.vco_out;
 648 #endif /* CONFIG_CPM2 */
 649 #if defined(CONFIG_MPC512X)
 650         bd->bi_ipsfreq = gd->arch.ips_clk;
 651 #endif /* CONFIG_MPC512X */
 652 #if defined(CONFIG_MPC5xxx)
 653         bd->bi_ipbfreq = gd->arch.ipb_clk;
 654         bd->bi_pcifreq = gd->pci_clk;
 655 #endif /* CONFIG_MPC5xxx */
 656 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 657         bd->bi_pcifreq = gd->pci_clk;
 658 #endif
 659 #if defined(CONFIG_EXTRA_CLOCK)
 660         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 661         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 662         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 663 #endif
 664
 665         return 0;
 666 }
 667 #endif
 668
 669 #ifdef CONFIG_SYS_EXTBDINFO
 670 static int setup_board_extra(void)
 671 {
 672         bd_t *bd = gd->bd;
 673
 674         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 675         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 676                 sizeof(bd->bi_r_version));
 677
 678         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 679         bd->bi_plb_busfreq = gd->bus_clk;
 680 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 681                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 682                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 683         bd->bi_pci_busfreq = get_PCI_freq();
 684         bd->bi_opbfreq = get_OPB_freq();
 685 #elif defined(CONFIG_XILINX_405)
 686         bd->bi_pci_busfreq = get_PCI_freq();
 687 #endif
 688
 689         return 0;
 690 }
 691 #endif
 692
 693 #ifdef CONFIG_POST
 694 static int init_post(void)
 695 {
 696         post_bootmode_init();
 697         post_run(NULL, POST_ROM | post_bootmode_get(0));
 698
 699         return 0;
 700 }
 701 #endif
 702
 703 static int setup_dram_config(void)
 704 {
 705         /* Ram is board specific, so move it to board code ... */
 706         dram_init_banksize();
 707
 708         return 0;
 709 }
 710
 711 static int reloc_fdt(void)
 712 {
 713 #ifndef CONFIG_OF_EMBED
 714         if (gd->flags & GD_FLG_SKIP_RELOC)
 715                 return 0;
 716         if (gd->new_fdt) {
 717                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 718                 gd->fdt_blob = gd->new_fdt;
 719         }
 720 #endif
 721
 722         return 0;
 723 }
 724
 725 static int setup_reloc(void)
 726 {
 727         if (gd->flags & GD_FLG_SKIP_RELOC) {
 728                 debug("Skipping relocation due to flag\n");
 729                 return 0;
 730         }
 731
 732 #ifdef CONFIG_SYS_TEXT_BASE
 733         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 734 #ifdef CONFIG_M68K
 735         /*
 736          * On all ColdFire arch cpu, monitor code starts always
 737          * just after the default vector table location, so at 0x400
 738          */
 739         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 740 #endif
 741 #endif
 742         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 743
 744         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 745         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 746               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 747               gd->start_addr_sp);
 748
 749         return 0;
 750 }
 751
 752 /* ARM calls relocate_code from its crt0.S */
 753 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 754
 755 static int jump_to_copy(void)
 756 {
 757         if (gd->flags & GD_FLG_SKIP_RELOC)
 758                 return 0;
 759         /*
 760          * x86 is special, but in a nice way. It uses a trampoline which
 761          * enables the dcache if possible.
 762          *
 763          * For now, other archs use relocate_code(), which is implemented
 764          * similarly for all archs. When we do generic relocation, hopefully
 765          * we can make all archs enable the dcache prior to relocation.
 766          */
 767 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 768         /*
 769          * SDRAM and console are now initialised. The final stack can now
 770          * be setup in SDRAM. Code execution will continue in Flash, but
 771          * with the stack in SDRAM and Global Data in temporary memory
 772          * (CPU cache)
 773          */
 774         arch_setup_gd(gd->new_gd);
 775         board_init_f_r_trampoline(gd->start_addr_sp);
 776 #else
 777         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 778 #endif
 779
 780         return 0;
 781 }
 782 #endif
 783
 784 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 785 static int mark_bootstage(void)
 786 {
 787         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 788
 789         return 0;
 790 }
 791
 792 static int initf_console_record(void)
 793 {
 794 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 795         return console_record_init();
 796 #else
 797         return 0;
 798 #endif
 799 }
 800
 801 static int initf_dm(void)
 802 {
 803 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 804         int ret;
 805
 806         ret = dm_init_and_scan(true);
 807         if (ret)
 808                 return ret;
 809 #endif
 810 #ifdef CONFIG_TIMER_EARLY
 811         ret = dm_timer_init();
 812         if (ret)
 813                 return ret;
 814 #endif
 815
 816         return 0;
 817 }
 818
 819 /* Architecture-specific memory reservation */
 820 __weak int reserve_arch(void)
 821 {
 822         return 0;
 823 }
 824
 825 __weak int arch_cpu_init_dm(void)
 826 {
 827         return 0;
 828 }
 829
 830 static init_fnc_t init_sequence_f[] = {
 831 #ifdef CONFIG_SANDBOX
 832         setup_ram_buf,
 833 #endif
 834         setup_mon_len,
 835 #ifdef CONFIG_OF_CONTROL
 836         fdtdec_setup,
 837 #endif
 838 #ifdef CONFIG_TRACE
 839         trace_early_init,
 840 #endif
 841         initf_malloc,
 842         initf_console_record,
 843 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 844         /* TODO: can this go into arch_cpu_init()? */
 845         probecpu,
 846 #endif
 847 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 848         x86_fsp_init,
 849 #endif
 850         arch_cpu_init,          /* basic arch cpu dependent setup */
 851         initf_dm,
 852         arch_cpu_init_dm,
 853         mark_bootstage,         /* need timer, go after init dm */
 854 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 855         board_early_init_f,
 856 #endif
 857         /* TODO: can any of this go into arch_cpu_init()? */
 858 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 859         get_clocks,             /* get CPU and bus clocks (etc.) */
 860 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 861                 && !defined(CONFIG_TQM885D)
 862         adjust_sdram_tbs_8xx,
 863 #endif
 864         /* TODO: can we rename this to timer_init()? */
 865         init_timebase,
 866 #endif
 867 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
 868                 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
 869                 defined(CONFIG_SPARC)
 870         timer_init,             /* initialize timer */
 871 #endif
 872 #ifdef CONFIG_SYS_ALLOC_DPRAM
 873 #if !defined(CONFIG_CPM2)
 874         dpram_init,
 875 #endif
 876 #endif
 877 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 878         board_postclk_init,
 879 #endif
 880 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 881         get_clocks,
 882 #endif
 883         env_init,               /* initialize environment */
 884 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 885         /* get CPU and bus clocks according to the environment variable */
 886         get_clocks_866,
 887         /* adjust sdram refresh rate according to the new clock */
 888         sdram_adjust_866,
 889         init_timebase,
 890 #endif
 891         init_baud_rate,         /* initialze baudrate settings */
 892         serial_init,            /* serial communications setup */
 893         console_init_f,         /* stage 1 init of console */
 894 #ifdef CONFIG_SANDBOX
 895         sandbox_early_getopt_check,
 896 #endif
 897 #ifdef CONFIG_OF_CONTROL
 898         fdtdec_prepare_fdt,
 899 #endif
 900         display_options,        /* say that we are here */
 901         display_text_info,      /* show debugging info if required */
 902 #if defined(CONFIG_MPC8260)
 903         prt_8260_rsr,
 904         prt_8260_clks,
 905 #endif /* CONFIG_MPC8260 */
 906 #if defined(CONFIG_MPC83xx)
 907         prt_83xx_rsr,
 908 #endif
 909 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 910         checkcpu,
 911 #endif
 912         print_cpuinfo,          /* display cpu info (and speed) */
 913 #if defined(CONFIG_MPC5xxx)
 914         prt_mpc5xxx_clks,
 915 #endif /* CONFIG_MPC5xxx */
 916 #if defined(CONFIG_DISPLAY_BOARDINFO)
 917         show_board_info,
 918 #endif
 919         INIT_FUNC_WATCHDOG_INIT
 920 #if defined(CONFIG_MISC_INIT_F)
 921         misc_init_f,
 922 #endif
 923         INIT_FUNC_WATCHDOG_RESET
 924 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 925         init_func_i2c,
 926 #endif
 927 #if defined(CONFIG_HARD_SPI)
 928         init_func_spi,
 929 #endif
 930         announce_dram_init,
 931         /* TODO: unify all these dram functions? */
 932 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 933                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 934         dram_init,              /* configure available RAM banks */
 935 #endif
 936 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 937         init_func_ram,
 938 #endif
 939 #ifdef CONFIG_POST
 940         post_init_f,
 941 #endif
 942         INIT_FUNC_WATCHDOG_RESET
 943 #if defined(CONFIG_SYS_DRAM_TEST)
 944         testdram,
 945 #endif /* CONFIG_SYS_DRAM_TEST */
 946         INIT_FUNC_WATCHDOG_RESET
 947
 948 #ifdef CONFIG_POST
 949         init_post,
 950 #endif
 951         INIT_FUNC_WATCHDOG_RESET
 952         /*
 953          * Now that we have DRAM mapped and working, we can
 954          * relocate the code and continue running from DRAM.
 955          *
 956          * Reserve memory at end of RAM for (top down in that order):
 957          *  - area that won't get touched by U-Boot and Linux (optional)
 958          *  - kernel log buffer
 959          *  - protected RAM
 960          *  - LCD framebuffer
 961          *  - monitor code
 962          *  - board info struct
 963          */
 964         setup_dest_addr,
 965 #if defined(CONFIG_BLACKFIN)
 966         /* Blackfin u-boot monitor should be on top of the ram */
 967         reserve_uboot,
 968 #endif
 969 #if defined(CONFIG_SPARC)
 970         reserve_prom,
 971 #endif
 972 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 973         reserve_logbuffer,
 974 #endif
 975 #ifdef CONFIG_PRAM
 976         reserve_pram,
 977 #endif
 978         reserve_round_4k,
 979 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 980                 defined(CONFIG_ARM)
 981         reserve_mmu,
 982 #endif
 983 #ifdef CONFIG_DM_VIDEO
 984         reserve_video,
 985 #else
 986 # ifdef CONFIG_LCD
 987         reserve_lcd,
 988 # endif
 989         /* TODO: Why the dependency on CONFIG_8xx? */
 990 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 991                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 992                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 993         reserve_legacy_video,
 994 # endif
 995 #endif /* CONFIG_DM_VIDEO */
 996         reserve_trace,
 997 #if !defined(CONFIG_BLACKFIN)
 998         reserve_uboot,
 999 #endif
1000 #ifndef CONFIG_SPL_BUILD
1001         reserve_malloc,
1002         reserve_board,
1003 #endif
1004         setup_machine,
1005         reserve_global_data,
1006         reserve_fdt,
1007         reserve_arch,
1008         reserve_stacks,
1009         setup_dram_config,
1010         show_dram_config,
1011 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1012         setup_board_part1,
1013 #endif
1014 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1015         INIT_FUNC_WATCHDOG_RESET
1016         setup_board_part2,
1017 #endif
1018         display_new_sp,
1019 #ifdef CONFIG_SYS_EXTBDINFO
1020         setup_board_extra,
1021 #endif
1022         INIT_FUNC_WATCHDOG_RESET
1023         reloc_fdt,
1024         setup_reloc,
1025 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1026         copy_uboot_to_ram,
1027         clear_bss,
1028         do_elf_reloc_fixups,
1029 #endif
1030 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1031         jump_to_copy,
1032 #endif
1033         NULL,
1034 };
1035
1036 void board_init_f(ulong boot_flags)
1037 {
1038 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1039         /*
1040          * For some archtectures, global data is initialized and used before
1041          * calling this function. The data should be preserved. For others,
1042          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1043          * here to host global data until relocation.
1044          */
1045         gd_t data;
1046
1047         gd = &data;
1048
1049         /*
1050          * Clear global data before it is accessed at debug print
1051          * in initcall_run_list. Otherwise the debug print probably
1052          * get the wrong vaule of gd->have_console.
1053          */
1054         zero_global_data();
1055 #endif
1056
1057         gd->flags = boot_flags;
1058         gd->have_console = 0;
1059
1060         if (initcall_run_list(init_sequence_f))
1061                 hang();
1062
1063 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1064                 !defined(CONFIG_EFI_APP)
1065         /* NOTREACHED - jump_to_copy() does not return */
1066         hang();
1067 #endif
1068 }
1069
1070 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1071 /*
1072  * For now this code is only used on x86.
1073  *
1074  * init_sequence_f_r is the list of init functions which are run when
1075  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1076  * The following limitations must be considered when implementing an
1077  * '_f_r' function:
1078  *  - 'static' variables are read-only
1079  *  - Global Data (gd->xxx) is read/write
1080  *
1081  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1082  * supported).  It _should_, if possible, copy global data to RAM and
1083  * initialise the CPU caches (to speed up the relocation process)
1084  *
1085  * NOTE: At present only x86 uses this route, but it is intended that
1086  * all archs will move to this when generic relocation is implemented.
1087  */
1088 static init_fnc_t init_sequence_f_r[] = {
1089         init_cache_f_r,
1090
1091         NULL,
1092 };
1093
1094 void board_init_f_r(void)
1095 {
1096         if (initcall_run_list(init_sequence_f_r))
1097                 hang();
1098
1099         /*
1100          * The pre-relocation drivers may be using memory that has now gone
1101          * away. Mark serial as unavailable - this will fall back to the debug
1102          * UART if available.
1103          */
1104         gd->flags &= ~GD_FLG_SERIAL_READY;
1105
1106         /*
1107          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1108          * Transfer execution from Flash to RAM by calculating the address
1109          * of the in-RAM copy of board_init_r() and calling it
1110          */
1111         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1112
1113         /* NOTREACHED - board_init_r() does not return */
1114         hang();
1115 }
1116 #endif /* CONFIG_X86 */