2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
27 /* TODO: Can we move these into arch/ headers? */
37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
44 #include <status_led.h>
47 #include <asm/errno.h>
49 #include <asm/sections.h>
51 #include <asm/init_helpers.h>
52 #include <asm/relocate.h>
55 #include <asm/state.h>
58 #include <linux/compiler.h>
61 * Pointer to initial global data area
63 * Here we initialize it if needed.
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR
= (gd_t
*) (CONFIG_SYS_INIT_GD_ADDR
);
70 DECLARE_GLOBAL_DATA_PTR
;
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
77 * void led_set_state(enum led_colour_t colour, int on);
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
84 __weak
void coloured_LED_init(void) {}
85 __weak
void red_led_on(void) {}
86 __weak
void red_led_off(void) {}
87 __weak
void green_led_on(void) {}
88 __weak
void green_led_off(void) {}
89 __weak
void yellow_led_on(void) {}
90 __weak
void yellow_led_off(void) {}
91 __weak
void blue_led_on(void) {}
92 __weak
void blue_led_off(void) {}
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 puts(" Watchdog enabled\n");
123 int init_func_watchdog_reset(void)
129 #endif /* CONFIG_WATCHDOG */
131 void __board_add_ram_info(int use_default
)
133 /* please define platform specific board_add_ram_info() */
136 void board_add_ram_info(int)
137 __attribute__ ((weak
, alias("__board_add_ram_info")));
139 static int init_baud_rate(void)
141 gd
->baudrate
= getenv_ulong("baudrate", 10, CONFIG_BAUDRATE
);
145 static int display_text_info(void)
147 #ifndef CONFIG_SANDBOX
148 ulong bss_start
, bss_end
;
150 bss_start
= (ulong
)&__bss_start
;
151 bss_end
= (ulong
)&__bss_end
;
153 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
154 #ifdef CONFIG_SYS_TEXT_BASE
155 CONFIG_SYS_TEXT_BASE
, bss_start
, bss_end
);
157 CONFIG_SYS_MONITOR_BASE
, bss_start
, bss_end
);
161 #ifdef CONFIG_MODEM_SUPPORT
162 debug("Modem Support enabled\n");
164 #ifdef CONFIG_USE_IRQ
165 debug("IRQ Stack: %08lx\n", IRQ_STACK_START
);
166 debug("FIQ Stack: %08lx\n", FIQ_STACK_START
);
172 static int announce_dram_init(void)
178 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
179 static int init_func_ram(void)
181 #ifdef CONFIG_BOARD_TYPES
182 int board_type
= gd
->board_type
;
184 int board_type
= 0; /* use dummy arg */
187 gd
->ram_size
= initdram(board_type
);
189 if (gd
->ram_size
> 0)
192 puts("*** failed ***\n");
197 static int show_dram_config(void)
199 unsigned long long size
;
201 #ifdef CONFIG_NR_DRAM_BANKS
204 debug("\nRAM Configuration:\n");
205 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
206 size
+= gd
->bd
->bi_dram
[i
].size
;
207 debug("Bank #%d: %08lx ", i
, gd
->bd
->bi_dram
[i
].start
);
209 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
217 print_size(size
, "");
218 board_add_ram_info(0);
224 void __dram_init_banksize(void)
226 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
227 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
228 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
232 void dram_init_banksize(void)
233 __attribute__((weak
, alias("__dram_init_banksize")));
235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
236 static int init_func_i2c(void)
239 #ifdef CONFIG_SYS_I2C
242 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
249 #if defined(CONFIG_HARD_SPI)
250 static int init_func_spi(void)
260 static int zero_global_data(void)
262 memset((void *)gd
, '\0', sizeof(gd_t
));
267 static int setup_mon_len(void)
270 gd
->mon_len
= (ulong
)&__bss_end
- (ulong
)_start
;
271 #elif defined(CONFIG_SANDBOX)
272 gd
->mon_len
= (ulong
)&_end
- (ulong
)_init
;
273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
274 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd
->mon_len
= (ulong
)&__bss_end
- CONFIG_SYS_MONITOR_BASE
;
282 __weak
int arch_cpu_init(void)
287 #ifdef CONFIG_OF_HOSTFILE
289 static int read_fdt_from_file(void)
291 struct sandbox_state
*state
= state_get_current();
292 const char *fname
= state
->fdt_fname
;
298 blob
= map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR
, 0);
299 if (!state
->fdt_fname
) {
300 err
= fdt_create_empty_tree(blob
, 256);
303 printf("Unable to create empty FDT: %s\n", fdt_strerror(err
));
307 size
= os_get_filesize(fname
);
309 printf("Failed to file FDT file '%s'\n", fname
);
312 fd
= os_open(fname
, OS_O_RDONLY
);
314 printf("Failed to open FDT file '%s'\n", fname
);
317 if (os_read(fd
, blob
, size
) != size
) {
330 #ifdef CONFIG_SANDBOX
331 static int setup_ram_buf(void)
333 struct sandbox_state
*state
= state_get_current();
335 gd
->arch
.ram_buf
= state
->ram_buf
;
336 gd
->ram_size
= state
->ram_size
;
342 static int setup_fdt(void)
344 #ifdef CONFIG_OF_EMBED
345 /* Get a pointer to the FDT */
346 gd
->fdt_blob
= __dtb_dt_begin
;
347 #elif defined CONFIG_OF_SEPARATE
348 /* FDT is at end of image */
349 gd
->fdt_blob
= (ulong
*)&_end
;
350 #elif defined(CONFIG_OF_HOSTFILE)
351 if (read_fdt_from_file()) {
352 puts("Failed to read control FDT\n");
356 /* Allow the early environment to override the fdt address */
357 gd
->fdt_blob
= (void *)getenv_ulong("fdtcontroladdr", 16,
358 (uintptr_t)gd
->fdt_blob
);
362 /* Get the top of usable RAM */
363 __weak ulong
board_get_usable_ram_top(ulong total_size
)
368 static int setup_dest_addr(void)
370 debug("Monitor len: %08lX\n", gd
->mon_len
);
372 * Ram is setup, size stored in gd !!
374 debug("Ram size: %08lX\n", (ulong
)gd
->ram_size
);
375 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
377 * Subtract specified amount of memory to hide so that it won't
378 * get "touched" at all by U-Boot. By fixing up gd->ram_size
379 * the Linux kernel should now get passed the now "corrected"
380 * memory size and won't touch it either. This should work
381 * for arch/ppc and arch/powerpc. Only Linux board ports in
382 * arch/powerpc with bootwrapper support, that recalculate the
383 * memory size from the SDRAM controller setup will have to
386 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
388 #ifdef CONFIG_SYS_SDRAM_BASE
389 gd
->ram_top
= CONFIG_SYS_SDRAM_BASE
;
391 gd
->ram_top
+= get_effective_memsize();
392 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
393 gd
->relocaddr
= gd
->ram_top
;
394 debug("Ram top: %08lX\n", (ulong
)gd
->ram_top
);
395 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
397 * We need to make sure the location we intend to put secondary core
398 * boot code is reserved and not used by any part of u-boot
400 if (gd
->relocaddr
> determine_mp_bootpg(NULL
)) {
401 gd
->relocaddr
= determine_mp_bootpg(NULL
);
402 debug("Reserving MP boot page to %08lx\n", gd
->relocaddr
);
408 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
409 static int reserve_logbuffer(void)
411 /* reserve kernel log buffer */
412 gd
->relocaddr
-= LOGBUFF_RESERVE
;
413 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN
,
420 /* reserve protected RAM */
421 static int reserve_pram(void)
425 reg
= getenv_ulong("pram", 10, CONFIG_PRAM
);
426 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
427 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
431 #endif /* CONFIG_PRAM */
433 /* Round memory pointer down to next 4 kB limit */
434 static int reserve_round_4k(void)
436 gd
->relocaddr
&= ~(4096 - 1);
440 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
442 static int reserve_mmu(void)
444 /* reserve TLB table */
445 gd
->arch
.tlb_size
= PGTABLE_SIZE
;
446 gd
->relocaddr
-= gd
->arch
.tlb_size
;
448 /* round down to next 64 kB limit */
449 gd
->relocaddr
&= ~(0x10000 - 1);
451 gd
->arch
.tlb_addr
= gd
->relocaddr
;
452 debug("TLB table from %08lx to %08lx\n", gd
->arch
.tlb_addr
,
453 gd
->arch
.tlb_addr
+ gd
->arch
.tlb_size
);
459 static int reserve_lcd(void)
461 #ifdef CONFIG_FB_ADDR
462 gd
->fb_base
= CONFIG_FB_ADDR
;
464 /* reserve memory for LCD display (always full pages) */
465 gd
->relocaddr
= lcd_setmem(gd
->relocaddr
);
466 gd
->fb_base
= gd
->relocaddr
;
467 #endif /* CONFIG_FB_ADDR */
470 #endif /* CONFIG_LCD */
472 static int reserve_trace(void)
475 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
476 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
477 debug("Reserving %dk for trace data at: %08lx\n",
478 CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
484 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
485 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
486 !defined(CONFIG_BLACKFIN)
487 static int reserve_video(void)
489 /* reserve memory for video display (always full pages) */
490 gd
->relocaddr
= video_setmem(gd
->relocaddr
);
491 gd
->fb_base
= gd
->relocaddr
;
497 static int reserve_uboot(void)
500 * reserve memory for U-Boot code, data & bss
501 * round down to next 4 kB limit
503 gd
->relocaddr
-= gd
->mon_len
;
504 gd
->relocaddr
&= ~(4096 - 1);
506 /* round down to next 64 kB limit so that IVPR stays aligned */
507 gd
->relocaddr
&= ~(65536 - 1);
510 debug("Reserving %ldk for U-Boot at: %08lx\n", gd
->mon_len
>> 10,
513 gd
->start_addr_sp
= gd
->relocaddr
;
518 #ifndef CONFIG_SPL_BUILD
519 /* reserve memory for malloc() area */
520 static int reserve_malloc(void)
522 gd
->start_addr_sp
= gd
->start_addr_sp
- TOTAL_MALLOC_LEN
;
523 debug("Reserving %dk for malloc() at: %08lx\n",
524 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
528 /* (permanently) allocate a Board Info struct */
529 static int reserve_board(void)
532 gd
->start_addr_sp
-= sizeof(bd_t
);
533 gd
->bd
= (bd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(bd_t
));
534 memset(gd
->bd
, '\0', sizeof(bd_t
));
535 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
536 sizeof(bd_t
), gd
->start_addr_sp
);
542 static int setup_machine(void)
544 #ifdef CONFIG_MACH_TYPE
545 gd
->bd
->bi_arch_number
= CONFIG_MACH_TYPE
; /* board id for Linux */
550 static int reserve_global_data(void)
552 gd
->start_addr_sp
-= sizeof(gd_t
);
553 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
554 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
555 sizeof(gd_t
), gd
->start_addr_sp
);
559 static int reserve_fdt(void)
562 * If the device tree is sitting immediate above our image then we
563 * must relocate it. If it is embedded in the data section, then it
564 * will be relocated with other data.
567 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
) + 0x1000, 32);
569 gd
->start_addr_sp
-= gd
->fdt_size
;
570 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
571 debug("Reserving %lu Bytes for FDT at: %08lx\n",
572 gd
->fdt_size
, gd
->start_addr_sp
);
578 static int reserve_stacks(void)
580 #ifdef CONFIG_SPL_BUILD
582 gd
->start_addr_sp
-= 128; /* leave 32 words for abort-stack */
583 gd
->irq_sp
= gd
->start_addr_sp
;
590 /* setup stack pointer for exceptions */
591 gd
->start_addr_sp
-= 16;
592 gd
->start_addr_sp
&= ~0xf;
593 gd
->irq_sp
= gd
->start_addr_sp
;
596 * Handle architecture-specific things here
597 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
598 * to handle this and put in arch/xxx/lib/stack.c
600 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
601 # ifdef CONFIG_USE_IRQ
602 gd
->start_addr_sp
-= (CONFIG_STACKSIZE_IRQ
+ CONFIG_STACKSIZE_FIQ
);
603 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
604 CONFIG_STACKSIZE_IRQ
+ CONFIG_STACKSIZE_FIQ
, gd
->start_addr_sp
);
606 /* 8-byte alignment for ARM ABI compliance */
607 gd
->start_addr_sp
&= ~0x07;
609 /* leave 3 words for abort-stack, plus 1 for alignment */
610 gd
->start_addr_sp
-= 16;
611 # elif defined(CONFIG_PPC)
612 /* Clear initial stack frame */
613 s
= (ulong
*) gd
->start_addr_sp
;
614 *s
= 0; /* Terminate back chain */
615 *++s
= 0; /* NULL return address */
616 # endif /* Architecture specific code */
622 static int display_new_sp(void)
624 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
630 static int setup_board_part1(void)
635 * Save local variables to board info struct
638 bd
->bi_memstart
= CONFIG_SYS_SDRAM_BASE
; /* start of memory */
639 bd
->bi_memsize
= gd
->ram_size
; /* size in bytes */
641 #ifdef CONFIG_SYS_SRAM_BASE
642 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
643 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
646 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
647 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
648 bd
->bi_immr_base
= CONFIG_SYS_IMMR
; /* base of IMMR register */
650 #if defined(CONFIG_MPC5xxx)
651 bd
->bi_mbar_base
= CONFIG_SYS_MBAR
; /* base of internal registers */
653 #if defined(CONFIG_MPC83xx)
654 bd
->bi_immrbar
= CONFIG_SYS_IMMR
;
660 static int setup_board_part2(void)
664 bd
->bi_intfreq
= gd
->cpu_clk
; /* Internal Freq, in Hz */
665 bd
->bi_busfreq
= gd
->bus_clk
; /* Bus Freq, in Hz */
666 #if defined(CONFIG_CPM2)
667 bd
->bi_cpmfreq
= gd
->arch
.cpm_clk
;
668 bd
->bi_brgfreq
= gd
->arch
.brg_clk
;
669 bd
->bi_sccfreq
= gd
->arch
.scc_clk
;
670 bd
->bi_vco
= gd
->arch
.vco_out
;
671 #endif /* CONFIG_CPM2 */
672 #if defined(CONFIG_MPC512X)
673 bd
->bi_ipsfreq
= gd
->arch
.ips_clk
;
674 #endif /* CONFIG_MPC512X */
675 #if defined(CONFIG_MPC5xxx)
676 bd
->bi_ipbfreq
= gd
->arch
.ipb_clk
;
677 bd
->bi_pcifreq
= gd
->pci_clk
;
678 #endif /* CONFIG_MPC5xxx */
684 #ifdef CONFIG_SYS_EXTBDINFO
685 static int setup_board_extra(void)
689 strncpy((char *) bd
->bi_s_version
, "1.2", sizeof(bd
->bi_s_version
));
690 strncpy((char *) bd
->bi_r_version
, U_BOOT_VERSION
,
691 sizeof(bd
->bi_r_version
));
693 bd
->bi_procfreq
= gd
->cpu_clk
; /* Processor Speed, In Hz */
694 bd
->bi_plb_busfreq
= gd
->bus_clk
;
695 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
696 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
697 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
698 bd
->bi_pci_busfreq
= get_PCI_freq();
699 bd
->bi_opbfreq
= get_OPB_freq();
700 #elif defined(CONFIG_XILINX_405)
701 bd
->bi_pci_busfreq
= get_PCI_freq();
709 static int init_post(void)
711 post_bootmode_init();
712 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
718 static int setup_dram_config(void)
720 /* Ram is board specific, so move it to board code ... */
721 dram_init_banksize();
726 static int reloc_fdt(void)
729 memcpy(gd
->new_fdt
, gd
->fdt_blob
, gd
->fdt_size
);
730 gd
->fdt_blob
= gd
->new_fdt
;
736 static int setup_reloc(void)
738 #ifdef CONFIG_SYS_TEXT_BASE
739 gd
->reloc_off
= gd
->relocaddr
- CONFIG_SYS_TEXT_BASE
;
741 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
743 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
744 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
745 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
751 /* ARM calls relocate_code from its crt0.S */
752 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
754 static int jump_to_copy(void)
757 * x86 is special, but in a nice way. It uses a trampoline which
758 * enables the dcache if possible.
760 * For now, other archs use relocate_code(), which is implemented
761 * similarly for all archs. When we do generic relocation, hopefully
762 * we can make all archs enable the dcache prior to relocation.
766 * SDRAM and console are now initialised. The final stack can now
767 * be setup in SDRAM. Code execution will continue in Flash, but
768 * with the stack in SDRAM and Global Data in temporary memory
771 board_init_f_r_trampoline(gd
->start_addr_sp
);
773 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
780 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
781 static int mark_bootstage(void)
783 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
788 static int initf_malloc(void)
790 #ifdef CONFIG_SYS_MALLOC_F_LEN
791 assert(gd
->malloc_base
); /* Set up by crt0.S */
792 gd
->malloc_limit
= gd
->malloc_base
+ CONFIG_SYS_MALLOC_F_LEN
;
799 static int initf_dm(void)
801 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
804 ret
= dm_init_and_scan(true);
812 static init_fnc_t init_sequence_f
[] = {
813 #ifdef CONFIG_SANDBOX
819 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
820 /* TODO: can this go into arch_cpu_init()? */
823 arch_cpu_init
, /* basic arch cpu dependent setup */
825 cpu_init_f
, /* TODO(sjg@chromium.org): remove */
826 # ifdef CONFIG_OF_CONTROL
827 find_fdt
, /* TODO(sjg@chromium.org): remove */
831 #ifdef CONFIG_OF_CONTROL
836 #if defined(CONFIG_BOARD_EARLY_INIT_F)
839 /* TODO: can any of this go into arch_cpu_init()? */
840 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
841 get_clocks
, /* get CPU and bus clocks (etc.) */
842 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
843 && !defined(CONFIG_TQM885D)
844 adjust_sdram_tbs_8xx
,
846 /* TODO: can we rename this to timer_init()? */
849 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
850 timer_init
, /* initialize timer */
852 #ifdef CONFIG_SYS_ALLOC_DPRAM
853 #if !defined(CONFIG_CPM2)
857 #if defined(CONFIG_BOARD_POSTCLK_INIT)
860 #ifdef CONFIG_FSL_ESDHC
863 env_init
, /* initialize environment */
864 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
865 /* get CPU and bus clocks according to the environment variable */
867 /* adjust sdram refresh rate according to the new clock */
871 init_baud_rate
, /* initialze baudrate settings */
872 serial_init
, /* serial communications setup */
873 console_init_f
, /* stage 1 init of console */
874 #ifdef CONFIG_SANDBOX
875 sandbox_early_getopt_check
,
877 #ifdef CONFIG_OF_CONTROL
880 display_options
, /* say that we are here */
881 display_text_info
, /* show debugging info if required */
882 #if defined(CONFIG_MPC8260)
885 #endif /* CONFIG_MPC8260 */
886 #if defined(CONFIG_MPC83xx)
892 print_cpuinfo
, /* display cpu info (and speed) */
893 #if defined(CONFIG_MPC5xxx)
895 #endif /* CONFIG_MPC5xxx */
896 #if defined(CONFIG_DISPLAY_BOARDINFO)
897 checkboard
, /* display board info */
899 INIT_FUNC_WATCHDOG_INIT
900 #if defined(CONFIG_MISC_INIT_F)
903 INIT_FUNC_WATCHDOG_RESET
904 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
907 #if defined(CONFIG_HARD_SPI)
911 dram_init_f
, /* configure available RAM banks */
912 calculate_relocation_address
,
915 /* TODO: unify all these dram functions? */
917 dram_init
, /* configure available RAM banks */
919 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
925 INIT_FUNC_WATCHDOG_RESET
926 #if defined(CONFIG_SYS_DRAM_TEST)
928 #endif /* CONFIG_SYS_DRAM_TEST */
929 INIT_FUNC_WATCHDOG_RESET
934 INIT_FUNC_WATCHDOG_RESET
936 * Now that we have DRAM mapped and working, we can
937 * relocate the code and continue running from DRAM.
939 * Reserve memory at end of RAM for (top down in that order):
940 * - area that won't get touched by U-Boot and Linux (optional)
941 * - kernel log buffer
945 * - board info struct
948 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
949 /* Blackfin u-boot monitor should be on top of the ram */
952 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
959 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
967 /* TODO: Why the dependency on CONFIG_8xx? */
968 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
969 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
970 !defined(CONFIG_BLACKFIN)
973 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
976 #ifndef CONFIG_SPL_BUILD
988 INIT_FUNC_WATCHDOG_RESET
992 #ifdef CONFIG_SYS_EXTBDINFO
995 INIT_FUNC_WATCHDOG_RESET
998 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1004 void board_init_f(ulong boot_flags
)
1006 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1008 * For some archtectures, global data is initialized and used before
1009 * calling this function. The data should be preserved. For others,
1010 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1011 * here to host global data until relocation.
1018 * Clear global data before it is accessed at debug print
1019 * in initcall_run_list. Otherwise the debug print probably
1020 * get the wrong vaule of gd->have_console.
1025 gd
->flags
= boot_flags
;
1026 gd
->have_console
= 0;
1028 if (initcall_run_list(init_sequence_f
))
1031 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1032 /* NOTREACHED - jump_to_copy() does not return */
1039 * For now this code is only used on x86.
1041 * init_sequence_f_r is the list of init functions which are run when
1042 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1043 * The following limitations must be considered when implementing an
1045 * - 'static' variables are read-only
1046 * - Global Data (gd->xxx) is read/write
1048 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1049 * supported). It _should_, if possible, copy global data to RAM and
1050 * initialise the CPU caches (to speed up the relocation process)
1052 * NOTE: At present only x86 uses this route, but it is intended that
1053 * all archs will move to this when generic relocation is implemented.
1055 static init_fnc_t init_sequence_f_r
[] = {
1059 do_elf_reloc_fixups
,
1064 void board_init_f_r(void)
1066 if (initcall_run_list(init_sequence_f_r
))
1070 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1071 * Transfer execution from Flash to RAM by calculating the address
1072 * of the in-RAM copy of board_init_r() and calling it
1074 (board_init_r
+ gd
->reloc_off
)(gd
, gd
->relocaddr
);
1076 /* NOTREACHED - board_init_r() does not return */
1079 #endif /* CONFIG_X86 */