3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * Two of the commands (imm and imw) take a byte/word/long modifier
31 * (e.g. imm.w specifies the word-length modifier). This was done to
32 * allow manipulating word-length registers. It was not done on any other
33 * commands because it was not deemed useful.
35 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
36 * Each I2C chip on the bus has a unique address. On the I2C data bus,
37 * the address is the upper seven bits and the LSB is the "read/write"
38 * bit. Note that the {i2c_chip} address specified on the command
39 * line is not shifted up: e.g. a typical EEPROM memory chip may have
40 * an I2C address of 0x50, but the data put on the bus will be 0xA0
41 * for write and 0xA1 for read. This "non shifted" address notation
42 * matches at least half of the data sheets :-/.
44 * {addr} is the address (or offset) within the chip. Small memory
45 * chips have 8 bit addresses. Large memory chips have 16 bit
46 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
47 * Many non-memory chips have multiple registers and {addr} is used
48 * as the register index. Some non-memory chips have only one register
49 * and therefore don't need any {addr} parameter.
51 * The default {addr} parameter is one byte (.1) which works well for
52 * memories and registers with 8 bits of address space.
54 * You can specify the length of the {addr} field with the optional .0,
55 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
56 * manipulating a single register device which doesn't use an address
57 * field, use "0.0" for the address and the ".0" length field will
58 * suppress the address in the I2C data stream. This also works for
59 * successive reads using the I2C auto-incrementing memory pointer.
61 * If you are manipulating a large memory with 2-byte addresses, use
62 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
64 * Then there are the unfortunate memory chips that spill the most
65 * significant 1, 2, or 3 bits of address into the chip address byte.
66 * This effectively makes one chip (logically) look like 2, 4, or
67 * 8 chips. This is handled (awkwardly) by #defining
68 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
69 * {addr} field (since .1 is the default, it doesn't actually have to
70 * be specified). Examples: given a memory chip at I2C chip address
71 * 0x50, the following would happen...
72 * imd 50 0 10 display 16 bytes starting at 0x000
73 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
74 * imd 50 100 10 display 16 bytes starting at 0x100
75 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
76 * imd 50 210 10 display 16 bytes starting at 0x210
77 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
78 * This is awfully ugly. It would be nice if someone would think up
79 * a better way of handling this.
81 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
86 #include <environment.h>
89 #include <asm/byteorder.h>
91 /* Display values from last command.
92 * Memory modify remembered values are different from display memory.
94 static uchar i2c_dp_last_chip
;
95 static uint i2c_dp_last_addr
;
96 static uint i2c_dp_last_alen
;
97 static uint i2c_dp_last_length
= 0x10;
99 static uchar i2c_mm_last_chip
;
100 static uint i2c_mm_last_addr
;
101 static uint i2c_mm_last_alen
;
103 /* If only one I2C bus is present, the list of devices to ignore when
104 * the probe command is issued is represented by a 1D array of addresses.
105 * When multiple buses are present, the list is an array of bus-address
106 * pairs. The following macros take care of this */
108 #if defined(CONFIG_SYS_I2C_NOPROBES)
109 #if defined(CONFIG_I2C_MULTI_BUS)
114 } i2c_no_probes
[] = CONFIG_SYS_I2C_NOPROBES
;
115 #define GET_BUS_NUM i2c_get_bus_num()
116 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
117 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
118 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
119 #else /* single bus */
120 static uchar i2c_no_probes
[] = CONFIG_SYS_I2C_NOPROBES
;
121 #define GET_BUS_NUM 0
122 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
123 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
124 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
125 #endif /* CONFIG_MULTI_BUS */
127 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
130 #if defined(CONFIG_I2C_MUX)
131 static I2C_MUX_DEVICE
*i2c_mux_devices
= NULL
;
132 static int i2c_mux_busid
= CONFIG_SYS_MAX_I2C_BUS
;
134 DECLARE_GLOBAL_DATA_PTR
;
139 mod_i2c_mem(cmd_tbl_t
*cmdtp
, int incrflag
, int flag
, int argc
, char *argv
[]);
141 /* TODO: Implement architecture-specific get/set functions */
142 unsigned int __def_i2c_get_bus_speed(void)
144 return CONFIG_SYS_I2C_SPEED
;
146 unsigned int i2c_get_bus_speed(void)
147 __attribute__((weak
, alias("__def_i2c_get_bus_speed")));
149 int __def_i2c_set_bus_speed(unsigned int speed
)
151 if (speed
!= CONFIG_SYS_I2C_SPEED
)
156 int i2c_set_bus_speed(unsigned int)
157 __attribute__((weak
, alias("__def_i2c_set_bus_speed")));
161 * imd {i2c_chip} {addr}{.0, .1, .2} {len}
163 #define DISP_LINE_LEN 16
165 int do_i2c_md ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
168 uint addr
, alen
, length
;
169 int j
, nbytes
, linebytes
;
171 /* We use the last specified parameters, unless new ones are
174 chip
= i2c_dp_last_chip
;
175 addr
= i2c_dp_last_addr
;
176 alen
= i2c_dp_last_alen
;
177 length
= i2c_dp_last_length
;
184 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
186 * New command specified.
193 chip
= simple_strtoul(argv
[1], NULL
, 16);
196 * I2C data address within the chip. This can be 1 or
197 * 2 bytes long. Some day it might be 3 bytes long :-).
199 addr
= simple_strtoul(argv
[2], NULL
, 16);
201 for (j
= 0; j
< 8; j
++) {
202 if (argv
[2][j
] == '.') {
203 alen
= argv
[2][j
+1] - '0';
209 } else if (argv
[2][j
] == '\0')
214 * If another parameter, it is the length to display.
215 * Length is the number of objects, not number of bytes.
218 length
= simple_strtoul(argv
[3], NULL
, 16);
224 * We buffer all read data, so we can make sure data is read only
229 unsigned char linebuf
[DISP_LINE_LEN
];
232 linebytes
= (nbytes
> DISP_LINE_LEN
) ? DISP_LINE_LEN
: nbytes
;
234 if (i2c_read(chip
, addr
, alen
, linebuf
, linebytes
) != 0)
235 puts ("Error reading the chip.\n");
237 printf("%04x:", addr
);
239 for (j
=0; j
<linebytes
; j
++) {
240 printf(" %02x", *cp
++);
245 for (j
=0; j
<linebytes
; j
++) {
246 if ((*cp
< 0x20) || (*cp
> 0x7e))
255 } while (nbytes
> 0);
257 i2c_dp_last_chip
= chip
;
258 i2c_dp_last_addr
= addr
;
259 i2c_dp_last_alen
= alen
;
260 i2c_dp_last_length
= length
;
265 int do_i2c_mm ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
267 return mod_i2c_mem (cmdtp
, 1, flag
, argc
, argv
);
270 int do_i2c_nm ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
272 return mod_i2c_mem (cmdtp
, 0, flag
, argc
, argv
);
275 /* Write (fill) memory
278 * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
280 int do_i2c_mw ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
289 if ((argc
< 4) || (argc
> 5)) {
295 * Chip is always specified.
297 chip
= simple_strtoul(argv
[1], NULL
, 16);
300 * Address is always specified.
302 addr
= simple_strtoul(argv
[2], NULL
, 16);
304 for (j
= 0; j
< 8; j
++) {
305 if (argv
[2][j
] == '.') {
306 alen
= argv
[2][j
+1] - '0';
312 } else if (argv
[2][j
] == '\0')
317 * Value to write is always specified.
319 byte
= simple_strtoul(argv
[3], NULL
, 16);
325 count
= simple_strtoul(argv
[4], NULL
, 16);
329 while (count
-- > 0) {
330 if (i2c_write(chip
, addr
++, alen
, &byte
, 1) != 0)
331 puts ("Error writing the chip.\n");
333 * Wait for the write to complete. The write can take
334 * up to 10mSec (we allow a little more time).
336 * On some chips, while the write is in progress, the
337 * chip doesn't respond. This apparently isn't a
338 * universal feature so we don't take advantage of it.
341 * No write delay with FRAM devices.
343 #if !defined(CONFIG_SYS_I2C_FRAM)
348 for (timeout
= 0; timeout
< 10; timeout
++) {
350 if (i2c_probe(chip
) == 0)
359 /* Calculate a CRC on memory
362 * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
364 int do_i2c_crc (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
381 * Chip is always specified.
383 chip
= simple_strtoul(argv
[1], NULL
, 16);
386 * Address is always specified.
388 addr
= simple_strtoul(argv
[2], NULL
, 16);
390 for (j
= 0; j
< 8; j
++) {
391 if (argv
[2][j
] == '.') {
392 alen
= argv
[2][j
+1] - '0';
398 } else if (argv
[2][j
] == '\0')
403 * Count is always specified
405 count
= simple_strtoul(argv
[3], NULL
, 16);
407 printf ("CRC32 for %08lx ... %08lx ==> ", addr
, addr
+ count
- 1);
409 * CRC a byte at a time. This is going to be slooow, but hey, the
410 * memories are small and slow too so hopefully nobody notices.
414 while (count
-- > 0) {
415 if (i2c_read(chip
, addr
, alen
, &byte
, 1) != 0)
417 crc
= crc32 (crc
, &byte
, 1);
421 puts ("Error reading the chip,\n");
423 printf ("%08lx\n", crc
);
431 * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
432 * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
436 mod_i2c_mem(cmd_tbl_t
*cmdtp
, int incrflag
, int flag
, int argc
, char *argv
[])
445 extern char console_buffer
[];
452 #ifdef CONFIG_BOOT_RETRY_TIME
453 reset_cmd_timeout(); /* got a good command to get here */
456 * We use the last specified parameters, unless new ones are
459 chip
= i2c_mm_last_chip
;
460 addr
= i2c_mm_last_addr
;
461 alen
= i2c_mm_last_alen
;
463 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
465 * New command specified. Check for a size specification.
466 * Defaults to byte if no or incorrect specification.
468 size
= cmd_get_data_size(argv
[0], 1);
471 * Chip is always specified.
473 chip
= simple_strtoul(argv
[1], NULL
, 16);
476 * Address is always specified.
478 addr
= simple_strtoul(argv
[2], NULL
, 16);
480 for (j
= 0; j
< 8; j
++) {
481 if (argv
[2][j
] == '.') {
482 alen
= argv
[2][j
+1] - '0';
488 } else if (argv
[2][j
] == '\0')
494 * Print the address, followed by value. Then accept input for
495 * the next value. A non-converted value exits.
498 printf("%08lx:", addr
);
499 if (i2c_read(chip
, addr
, alen
, (uchar
*)&data
, size
) != 0)
500 puts ("\nError reading the chip,\n");
502 data
= cpu_to_be32(data
);
504 printf(" %02lx", (data
>> 24) & 0x000000FF);
506 printf(" %04lx", (data
>> 16) & 0x0000FFFF);
508 printf(" %08lx", data
);
511 nbytes
= readline (" ? ");
514 * <CR> pressed as only input, don't modify current
515 * location and move to next.
520 #ifdef CONFIG_BOOT_RETRY_TIME
521 reset_cmd_timeout(); /* good enough to not time out */
524 #ifdef CONFIG_BOOT_RETRY_TIME
525 else if (nbytes
== -2)
526 break; /* timed out, exit the command */
531 data
= simple_strtoul(console_buffer
, &endp
, 16);
536 data
= be32_to_cpu(data
);
537 nbytes
= endp
- console_buffer
;
539 #ifdef CONFIG_BOOT_RETRY_TIME
541 * good enough to not time out
545 if (i2c_write(chip
, addr
, alen
, (uchar
*)&data
, size
) != 0)
546 puts ("Error writing the chip.\n");
547 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
548 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
556 i2c_mm_last_chip
= chip
;
557 i2c_mm_last_addr
= addr
;
558 i2c_mm_last_alen
= alen
;
565 * iprobe {addr}{.0, .1, .2}
567 int do_i2c_probe (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
570 #if defined(CONFIG_SYS_I2C_NOPROBES)
572 uchar bus
= GET_BUS_NUM
;
573 #endif /* NOPROBES */
575 puts ("Valid chip addresses:");
576 for (j
= 0; j
< 128; j
++) {
577 #if defined(CONFIG_SYS_I2C_NOPROBES)
579 for (k
=0; k
< NUM_ELEMENTS_NOPROBE
; k
++) {
580 if (COMPARE_BUS(bus
, k
) && COMPARE_ADDR(j
, k
)) {
588 if (i2c_probe(j
) == 0)
593 #if defined(CONFIG_SYS_I2C_NOPROBES)
594 puts ("Excluded chip addresses:");
595 for (k
=0; k
< NUM_ELEMENTS_NOPROBE
; k
++) {
596 if (COMPARE_BUS(bus
,k
))
597 printf(" %02X", NO_PROBE_ADDR(k
));
607 * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
608 * {length} - Number of bytes to read
609 * {delay} - A DECIMAL number and defaults to 1000 uSec
611 int do_i2c_loop(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
627 * Chip is always specified.
629 chip
= simple_strtoul(argv
[1], NULL
, 16);
632 * Address is always specified.
634 addr
= simple_strtoul(argv
[2], NULL
, 16);
636 for (j
= 0; j
< 8; j
++) {
637 if (argv
[2][j
] == '.') {
638 alen
= argv
[2][j
+1] - '0';
644 } else if (argv
[2][j
] == '\0')
649 * Length is the number of objects, not number of bytes.
652 length
= simple_strtoul(argv
[3], NULL
, 16);
653 if (length
> sizeof(bytes
))
654 length
= sizeof(bytes
);
657 * The delay time (uSec) is optional.
661 delay
= simple_strtoul(argv
[4], NULL
, 10);
666 if (i2c_read(chip
, addr
, alen
, bytes
, length
) != 0)
667 puts ("Error reading the chip.\n");
676 * The SDRAM command is separately configured because many
677 * (most?) embedded boards don't use SDRAM DIMMs.
679 #if defined(CONFIG_CMD_SDRAM)
680 static void print_ddr2_tcyc (u_char
const b
)
682 printf ("%d.", (b
>> 4) & 0x0F);
694 printf ("%d ns\n", b
& 0x0F);
714 static void decode_bits (u_char
const b
, char const *str
[], int const do_once
)
718 for (mask
= 0x80; mask
!= 0x00; mask
>>= 1, ++str
) {
731 int do_sdram (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
733 enum { unknown
, EDO
, SDRAM
, DDR2
} type
;
740 static const char *decode_CAS_DDR2
[] = {
741 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
744 static const char *decode_CAS_default
[] = {
745 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
748 static const char *decode_CS_WE_default
[] = {
749 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
752 static const char *decode_byte21_default
[] = {
754 " Redundant row address\n",
755 " Differential clock input\n",
756 " Registerd DQMB inputs\n",
757 " Buffered DQMB inputs\n",
759 " Registered address/control lines\n",
760 " Buffered address/control lines\n"
763 static const char *decode_byte22_DDR2
[] = {
769 " Supports partial array self refresh\n",
770 " Supports 50 ohm ODT\n",
771 " Supports weak driver\n"
774 static const char *decode_row_density_DDR2
[] = {
775 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
776 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
779 static const char *decode_row_density_default
[] = {
780 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
781 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
789 * Chip is always specified.
791 chip
= simple_strtoul (argv
[1], NULL
, 16);
793 if (i2c_read (chip
, 0, 1, data
, sizeof (data
)) != 0) {
794 puts ("No SDRAM Serial Presence Detect found.\n");
799 for (j
= 0; j
< 63; j
++) {
802 if (cksum
!= data
[63]) {
803 printf ("WARNING: Configuration data checksum failure:\n"
804 " is 0x%02x, calculated 0x%02x\n", data
[63], cksum
);
806 printf ("SPD data revision %d.%d\n",
807 (data
[62] >> 4) & 0x0F, data
[62] & 0x0F);
808 printf ("Bytes used 0x%02X\n", data
[0]);
809 printf ("Serial memory size 0x%02X\n", 1 << data
[1]);
811 puts ("Memory type ");
831 puts ("Row address bits ");
832 if ((data
[3] & 0x00F0) == 0)
833 printf ("%d\n", data
[3] & 0x0F);
835 printf ("%d/%d\n", data
[3] & 0x0F, (data
[3] >> 4) & 0x0F);
837 puts ("Column address bits ");
838 if ((data
[4] & 0x00F0) == 0)
839 printf ("%d\n", data
[4] & 0x0F);
841 printf ("%d/%d\n", data
[4] & 0x0F, (data
[4] >> 4) & 0x0F);
845 printf ("Number of ranks %d\n",
846 (data
[5] & 0x07) + 1);
849 printf ("Module rows %d\n", data
[5]);
855 printf ("Module data width %d bits\n", data
[6]);
858 printf ("Module data width %d bits\n",
859 (data
[7] << 8) | data
[6]);
863 puts ("Interface signal levels ");
865 case 0: puts ("TTL 5.0 V\n"); break;
866 case 1: puts ("LVTTL\n"); break;
867 case 2: puts ("HSTL 1.5 V\n"); break;
868 case 3: puts ("SSTL 3.3 V\n"); break;
869 case 4: puts ("SSTL 2.5 V\n"); break;
870 case 5: puts ("SSTL 1.8 V\n"); break;
871 default: puts ("unknown\n"); break;
876 printf ("SDRAM cycle time ");
877 print_ddr2_tcyc (data
[9]);
880 printf ("SDRAM cycle time %d.%d ns\n",
881 (data
[9] >> 4) & 0x0F, data
[9] & 0x0F);
887 printf ("SDRAM access time 0.%d%d ns\n",
888 (data
[10] >> 4) & 0x0F, data
[10] & 0x0F);
891 printf ("SDRAM access time %d.%d ns\n",
892 (data
[10] >> 4) & 0x0F, data
[10] & 0x0F);
896 puts ("EDC configuration ");
898 case 0: puts ("None\n"); break;
899 case 1: puts ("Parity\n"); break;
900 case 2: puts ("ECC\n"); break;
901 default: puts ("unknown\n"); break;
904 if ((data
[12] & 0x80) == 0)
905 puts ("No self refresh, rate ");
907 puts ("Self refresh, rate ");
909 switch(data
[12] & 0x7F) {
910 case 0: puts ("15.625 us\n"); break;
911 case 1: puts ("3.9 us\n"); break;
912 case 2: puts ("7.8 us\n"); break;
913 case 3: puts ("31.3 us\n"); break;
914 case 4: puts ("62.5 us\n"); break;
915 case 5: puts ("125 us\n"); break;
916 default: puts ("unknown\n"); break;
921 printf ("SDRAM width (primary) %d\n", data
[13]);
924 printf ("SDRAM width (primary) %d\n", data
[13] & 0x7F);
925 if ((data
[13] & 0x80) != 0) {
926 printf (" (second bank) %d\n",
927 2 * (data
[13] & 0x7F));
935 printf ("EDC width %d\n", data
[14]);
939 printf ("EDC width %d\n",
942 if ((data
[14] & 0x80) != 0) {
943 printf (" (second bank) %d\n",
944 2 * (data
[14] & 0x7F));
951 printf ("Min clock delay, back-to-back random column addresses "
955 puts ("Burst length(s) ");
956 if (data
[16] & 0x80) puts (" Page");
957 if (data
[16] & 0x08) puts (" 8");
958 if (data
[16] & 0x04) puts (" 4");
959 if (data
[16] & 0x02) puts (" 2");
960 if (data
[16] & 0x01) puts (" 1");
962 printf ("Number of banks %d\n", data
[17]);
966 puts ("CAS latency(s) ");
967 decode_bits (data
[18], decode_CAS_DDR2
, 0);
971 puts ("CAS latency(s) ");
972 decode_bits (data
[18], decode_CAS_default
, 0);
978 puts ("CS latency(s) ");
979 decode_bits (data
[19], decode_CS_WE_default
, 0);
984 puts ("WE latency(s) ");
985 decode_bits (data
[20], decode_CS_WE_default
, 0);
991 puts ("Module attributes:\n");
993 puts (" TBD (bit 7)\n");
995 puts (" Analysis probe installed\n");
997 puts (" TBD (bit 5)\n");
999 puts (" FET switch external enable\n");
1000 printf (" %d PLLs on DIMM\n", (data
[21] >> 2) & 0x03);
1001 if (data
[20] & 0x11) {
1002 printf (" %d active registers on DIMM\n",
1003 (data
[21] & 0x03) + 1);
1007 puts ("Module attributes:\n");
1011 decode_bits (data
[21], decode_byte21_default
, 0);
1017 decode_bits (data
[22], decode_byte22_DDR2
, 0);
1020 puts ("Device attributes:\n");
1021 if (data
[22] & 0x80) puts (" TBD (bit 7)\n");
1022 if (data
[22] & 0x40) puts (" TBD (bit 6)\n");
1023 if (data
[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1024 else puts (" Upper Vcc tolerance 10%\n");
1025 if (data
[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1026 else puts (" Lower Vcc tolerance 10%\n");
1027 if (data
[22] & 0x08) puts (" Supports write1/read burst\n");
1028 if (data
[22] & 0x04) puts (" Supports precharge all\n");
1029 if (data
[22] & 0x02) puts (" Supports auto precharge\n");
1030 if (data
[22] & 0x01) puts (" Supports early RAS# precharge\n");
1036 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1037 print_ddr2_tcyc (data
[23]);
1040 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1041 "%d ns\n", (data
[23] >> 4) & 0x0F, data
[23] & 0x0F);
1047 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1048 "%d%d ns\n", (data
[24] >> 4) & 0x0F, data
[24] & 0x0F);
1051 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1052 "%d ns\n", (data
[24] >> 4) & 0x0F, data
[24] & 0x0F);
1058 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1059 print_ddr2_tcyc (data
[25]);
1062 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1063 "%d ns\n", (data
[25] >> 4) & 0x0F, data
[25] & 0x0F);
1069 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1070 "%d%d ns\n", (data
[26] >> 4) & 0x0F, data
[26] & 0x0F);
1073 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1074 "%d ns\n", (data
[26] >> 4) & 0x0F, data
[26] & 0x0F);
1080 printf ("Minimum row precharge %d.%02d ns\n",
1081 (data
[27] >> 2) & 0x3F, 25 * (data
[27] & 0x03));
1084 printf ("Minimum row precharge %d ns\n", data
[27]);
1090 printf ("Row active to row active min %d.%02d ns\n",
1091 (data
[28] >> 2) & 0x3F, 25 * (data
[28] & 0x03));
1094 printf ("Row active to row active min %d ns\n", data
[28]);
1100 printf ("RAS to CAS delay min %d.%02d ns\n",
1101 (data
[29] >> 2) & 0x3F, 25 * (data
[29] & 0x03));
1104 printf ("RAS to CAS delay min %d ns\n", data
[29]);
1108 printf ("Minimum RAS pulse width %d ns\n", data
[30]);
1112 puts ("Density of each row ");
1113 decode_bits (data
[31], decode_row_density_DDR2
, 1);
1117 puts ("Density of each row ");
1118 decode_bits (data
[31], decode_row_density_default
, 1);
1125 puts ("Command and Address setup ");
1126 if (data
[32] >= 0xA0) {
1127 printf ("1.%d%d ns\n",
1128 ((data
[32] >> 4) & 0x0F) - 10, data
[32] & 0x0F);
1130 printf ("0.%d%d ns\n",
1131 ((data
[32] >> 4) & 0x0F), data
[32] & 0x0F);
1135 printf ("Command and Address setup %c%d.%d ns\n",
1136 (data
[32] & 0x80) ? '-' : '+',
1137 (data
[32] >> 4) & 0x07, data
[32] & 0x0F);
1143 puts ("Command and Address hold ");
1144 if (data
[33] >= 0xA0) {
1145 printf ("1.%d%d ns\n",
1146 ((data
[33] >> 4) & 0x0F) - 10, data
[33] & 0x0F);
1148 printf ("0.%d%d ns\n",
1149 ((data
[33] >> 4) & 0x0F), data
[33] & 0x0F);
1153 printf ("Command and Address hold %c%d.%d ns\n",
1154 (data
[33] & 0x80) ? '-' : '+',
1155 (data
[33] >> 4) & 0x07, data
[33] & 0x0F);
1161 printf ("Data signal input setup 0.%d%d ns\n",
1162 (data
[34] >> 4) & 0x0F, data
[34] & 0x0F);
1165 printf ("Data signal input setup %c%d.%d ns\n",
1166 (data
[34] & 0x80) ? '-' : '+',
1167 (data
[34] >> 4) & 0x07, data
[34] & 0x0F);
1173 printf ("Data signal input hold 0.%d%d ns\n",
1174 (data
[35] >> 4) & 0x0F, data
[35] & 0x0F);
1177 printf ("Data signal input hold %c%d.%d ns\n",
1178 (data
[35] & 0x80) ? '-' : '+',
1179 (data
[35] >> 4) & 0x07, data
[35] & 0x0F);
1183 puts ("Manufacturer's JEDEC ID ");
1184 for (j
= 64; j
<= 71; j
++)
1185 printf ("%02X ", data
[j
]);
1187 printf ("Manufacturing Location %02X\n", data
[72]);
1188 puts ("Manufacturer's Part Number ");
1189 for (j
= 73; j
<= 90; j
++)
1190 printf ("%02X ", data
[j
]);
1192 printf ("Revision Code %02X %02X\n", data
[91], data
[92]);
1193 printf ("Manufacturing Date %02X %02X\n", data
[93], data
[94]);
1194 puts ("Assembly Serial Number ");
1195 for (j
= 95; j
<= 98; j
++)
1196 printf ("%02X ", data
[j
]);
1200 printf ("Speed rating PC%d\n",
1201 data
[126] == 0x66 ? 66 : data
[126]);
1207 int do_i2c_reset(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1209 i2c_init (CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
1213 #if defined(CONFIG_I2C_MUX)
1214 int do_i2c_add_bus(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1219 /* show all busses */
1221 I2C_MUX_DEVICE
*device
= i2c_mux_devices
;
1223 printf ("Busses reached over muxes:\n");
1224 while (device
!= NULL
) {
1225 printf ("Bus ID: %x\n", device
->busid
);
1226 printf (" reached over Mux(es):\n");
1228 while (mux
!= NULL
) {
1229 printf (" %s@%x ch: %x\n", mux
->name
, mux
->chip
, mux
->channel
);
1232 device
= device
->next
;
1235 I2C_MUX_DEVICE
*dev
;
1237 dev
= i2c_mux_ident_muxstring ((uchar
*)argv
[1]);
1242 #endif /* CONFIG_I2C_MUX */
1244 #if defined(CONFIG_I2C_MULTI_BUS)
1245 int do_i2c_bus_num(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1250 /* querying current setting */
1251 printf("Current bus is %d\n", i2c_get_bus_num());
1253 bus_idx
= simple_strtoul(argv
[1], NULL
, 10);
1254 printf("Setting bus to %d\n", bus_idx
);
1255 ret
= i2c_set_bus_num(bus_idx
);
1257 printf("Failure changing bus number (%d)\n", ret
);
1261 #endif /* CONFIG_I2C_MULTI_BUS */
1263 int do_i2c_bus_speed(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1268 /* querying current speed */
1269 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1271 speed
= simple_strtoul(argv
[1], NULL
, 10);
1272 printf("Setting bus speed to %d Hz\n", speed
);
1273 ret
= i2c_set_bus_speed(speed
);
1275 printf("Failure changing bus speed (%d)\n", ret
);
1280 int do_i2c(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1282 #if defined(CONFIG_I2C_MUX)
1283 if (!strncmp(argv
[1], "bu", 2))
1284 return do_i2c_add_bus(cmdtp
, flag
, --argc
, ++argv
);
1285 #endif /* CONFIG_I2C_MUX */
1286 if (!strncmp(argv
[1], "sp", 2))
1287 return do_i2c_bus_speed(cmdtp
, flag
, --argc
, ++argv
);
1288 #if defined(CONFIG_I2C_MULTI_BUS)
1289 if (!strncmp(argv
[1], "de", 2))
1290 return do_i2c_bus_num(cmdtp
, flag
, --argc
, ++argv
);
1291 #endif /* CONFIG_I2C_MULTI_BUS */
1292 if (!strncmp(argv
[1], "md", 2))
1293 return do_i2c_md(cmdtp
, flag
, --argc
, ++argv
);
1294 if (!strncmp(argv
[1], "mm", 2))
1295 return do_i2c_mm(cmdtp
, flag
, --argc
, ++argv
);
1296 if (!strncmp(argv
[1], "mw", 2))
1297 return do_i2c_mw(cmdtp
, flag
, --argc
, ++argv
);
1298 if (!strncmp(argv
[1], "nm", 2))
1299 return do_i2c_nm(cmdtp
, flag
, --argc
, ++argv
);
1300 if (!strncmp(argv
[1], "cr", 2))
1301 return do_i2c_crc(cmdtp
, flag
, --argc
, ++argv
);
1302 if (!strncmp(argv
[1], "pr", 2))
1303 return do_i2c_probe(cmdtp
, flag
, --argc
, ++argv
);
1304 if (!strncmp(argv
[1], "re", 2))
1305 return do_i2c_reset(cmdtp
, flag
, --argc
, ++argv
);
1306 if (!strncmp(argv
[1], "lo", 2))
1307 return do_i2c_loop(cmdtp
, flag
, --argc
, ++argv
);
1308 #if defined(CONFIG_CMD_SDRAM)
1309 if (!strncmp(argv
[1], "sd", 2))
1310 return do_sdram(cmdtp
, flag
, --argc
, ++argv
);
1317 /***************************************************/
1322 #if defined(CONFIG_I2C_MUX)
1323 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n"
1324 #endif /* CONFIG_I2C_MUX */
1325 "speed [speed] - show or set I2C bus speed\n"
1326 #if defined(CONFIG_I2C_MULTI_BUS)
1327 "i2c dev [dev] - show or set current I2C bus\n"
1328 #endif /* CONFIG_I2C_MULTI_BUS */
1329 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1330 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1331 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1332 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1333 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1334 "i2c probe - show devices on the I2C bus\n"
1335 "i2c reset - re-init the I2C Controller\n"
1336 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1337 #if defined(CONFIG_CMD_SDRAM)
1338 "i2c sdram chip - print SDRAM configuration information\n"
1342 #if defined(CONFIG_I2C_MUX)
1344 int i2c_mux_add_device(I2C_MUX_DEVICE
*dev
)
1346 I2C_MUX_DEVICE
*devtmp
= i2c_mux_devices
;
1348 if (i2c_mux_devices
== NULL
) {
1349 i2c_mux_devices
= dev
;
1352 while (devtmp
->next
!= NULL
)
1353 devtmp
= devtmp
->next
;
1359 I2C_MUX_DEVICE
*i2c_mux_search_device(int id
)
1361 I2C_MUX_DEVICE
*device
= i2c_mux_devices
;
1363 while (device
!= NULL
) {
1364 if (device
->busid
== id
)
1366 device
= device
->next
;
1371 /* searches in the buf from *pos the next ':'.
1373 * 0 if found (with *pos = where)
1374 * < 0 if an error occured
1375 * > 0 if the end of buf is reached
1377 static int i2c_mux_search_next (int *pos
, uchar
*buf
, int len
)
1379 while ((buf
[*pos
] != ':') && (*pos
< len
)) {
1384 if (buf
[*pos
] != ':')
1389 static int i2c_mux_get_busid (void)
1391 int tmp
= i2c_mux_busid
;
1397 /* Analyses a Muxstring and sends immediately the
1398 Commands to the Muxes. Runs from Flash.
1400 int i2c_mux_ident_muxstring_f (uchar
*buf
)
1405 int len
= strlen((char *)buf
);
1413 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1416 /* search address */
1419 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1423 chip
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1425 /* search channel */
1428 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1432 if (buf
[pos
] != 0) {
1436 channel
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1439 if (i2c_write(chip
, 0, 0, &channel
, 1) != 0) {
1440 printf ("Error setting Mux: chip:%x channel: \
1441 %x\n", chip
, channel
);
1452 /* Analyses a Muxstring and if this String is correct
1453 * adds a new I2C Bus.
1455 I2C_MUX_DEVICE
*i2c_mux_ident_muxstring (uchar
*buf
)
1457 I2C_MUX_DEVICE
*device
;
1462 int len
= strlen((char *)buf
);
1465 device
= (I2C_MUX_DEVICE
*)malloc (sizeof(I2C_MUX_DEVICE
));
1467 device
->busid
= i2c_mux_get_busid ();
1468 device
->next
= NULL
;
1470 mux
= (I2C_MUX
*)malloc (sizeof(I2C_MUX
));
1472 /* search name of mux */
1474 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1476 printf ("%s no name.\n", __FUNCTION__
);
1477 mux
->name
= (char *)malloc (pos
- oldpos
+ 1);
1478 memcpy (mux
->name
, &buf
[oldpos
], pos
- oldpos
);
1479 mux
->name
[pos
- oldpos
] = 0;
1480 /* search address */
1483 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1485 printf ("%s no mux address.\n", __FUNCTION__
);
1487 mux
->chip
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1489 /* search channel */
1492 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1494 printf ("%s no mux channel.\n", __FUNCTION__
);
1496 if (buf
[pos
] != 0) {
1500 mux
->channel
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1503 if (device
->mux
== NULL
)
1506 I2C_MUX
*muxtmp
= device
->mux
;
1507 while (muxtmp
->next
!= NULL
) {
1508 muxtmp
= muxtmp
->next
;
1517 i2c_mux_add_device (device
);
1524 int i2x_mux_select_mux(int bus
)
1526 I2C_MUX_DEVICE
*dev
;
1529 if ((gd
->flags
& GD_FLG_RELOC
) != GD_FLG_RELOC
) {
1530 /* select Default Mux Bus */
1531 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1532 i2c_mux_ident_muxstring_f ((uchar
*)CONFIG_SYS_I2C_IVM_BUS
);
1536 buf
= (unsigned char *) getenv("EEprom_ivm");
1538 i2c_mux_ident_muxstring_f (buf
);
1543 dev
= i2c_mux_search_device(bus
);
1548 while (mux
!= NULL
) {
1549 if (i2c_write(mux
->chip
, 0, 0, &mux
->channel
, 1) != 0) {
1550 printf ("Error setting Mux: chip:%x channel: \
1551 %x\n", mux
->chip
, mux
->channel
);
1558 #endif /* CONFIG_I2C_MUX */