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[people/ms/u-boot.git] / common / cmd_ide.c
1 /*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25 /*
26 * IDE support
27 */
28 #include <common.h>
29 #include <config.h>
30 #include <watchdog.h>
31 #include <command.h>
32 #include <image.h>
33 #include <asm/byteorder.h>
34 #include <asm/io.h>
35
36 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
37 # include <pcmcia.h>
38 #endif
39
40 #ifdef CONFIG_8xx
41 # include <mpc8xx.h>
42 #endif
43
44 #ifdef CONFIG_MPC5xxx
45 #include <mpc5xxx.h>
46 #endif
47
48 #include <ide.h>
49 #include <ata.h>
50
51 #ifdef CONFIG_STATUS_LED
52 # include <status_led.h>
53 #endif
54
55 #ifdef CONFIG_IDE_8xx_DIRECT
56 DECLARE_GLOBAL_DATA_PTR;
57 #endif
58
59 #ifdef __PPC__
60 # define EIEIO __asm__ volatile ("eieio")
61 # define SYNC __asm__ volatile ("sync")
62 #else
63 # define EIEIO /* nothing */
64 # define SYNC /* nothing */
65 #endif
66
67 #ifdef CONFIG_IDE_8xx_DIRECT
68 /* Timings for IDE Interface
69 *
70 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
71 * 70 165 30 PIO-Mode 0, [ns]
72 * 4 9 2 [Cycles]
73 * 50 125 20 PIO-Mode 1, [ns]
74 * 3 7 2 [Cycles]
75 * 30 100 15 PIO-Mode 2, [ns]
76 * 2 6 1 [Cycles]
77 * 30 80 10 PIO-Mode 3, [ns]
78 * 2 5 1 [Cycles]
79 * 25 70 10 PIO-Mode 4, [ns]
80 * 2 4 1 [Cycles]
81 */
82
83 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
84 {
85 /* Setup Length Hold */
86 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
87 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
88 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
89 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
90 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
91 };
92
93 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
94
95 #ifndef CONFIG_SYS_PIO_MODE
96 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
97 #endif
98 static int pio_mode = CONFIG_SYS_PIO_MODE;
99
100 /* Make clock cycles and always round up */
101
102 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
103
104 #endif /* CONFIG_IDE_8xx_DIRECT */
105
106 /* ------------------------------------------------------------------------- */
107
108 /* Current I/O Device */
109 static int curr_device = -1;
110
111 /* Current offset for IDE0 / IDE1 bus access */
112 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
113 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
114 CONFIG_SYS_ATA_IDE0_OFFSET,
115 #endif
116 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
117 CONFIG_SYS_ATA_IDE1_OFFSET,
118 #endif
119 };
120
121
122 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
123
124 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
125 /* ------------------------------------------------------------------------- */
126
127 #ifdef CONFIG_IDE_LED
128 # if !defined(CONFIG_BMS2003) && \
129 !defined(CONFIG_CPC45) && \
130 !defined(CONFIG_KUP4K) && \
131 !defined(CONFIG_KUP4X)
132 static void ide_led (uchar led, uchar status);
133 #else
134 extern void ide_led (uchar led, uchar status);
135 #endif
136 #else
137 #define ide_led(a,b) /* dummy */
138 #endif
139
140 #ifdef CONFIG_IDE_RESET
141 static void ide_reset (void);
142 #else
143 #define ide_reset() /* dummy */
144 #endif
145
146 static void ide_ident (block_dev_desc_t *dev_desc);
147 static uchar ide_wait (int dev, ulong t);
148
149 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
150
151 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
152
153 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
154
155 static void input_data(int dev, ulong *sect_buf, int words);
156 static void output_data(int dev, ulong *sect_buf, int words);
157 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
158
159 #ifndef CONFIG_SYS_ATA_PORT_ADDR
160 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
161 #endif
162
163 #ifdef CONFIG_ATAPI
164 static void atapi_inquiry(block_dev_desc_t *dev_desc);
165 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
166 #endif
167
168
169 #ifdef CONFIG_IDE_8xx_DIRECT
170 static void set_pcmcia_timing (int pmode);
171 #endif
172
173 /* ------------------------------------------------------------------------- */
174
175 int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
176 {
177 int rcode = 0;
178
179 switch (argc) {
180 case 0:
181 case 1:
182 return cmd_usage(cmdtp);
183 case 2:
184 if (strncmp(argv[1],"res",3) == 0) {
185 puts ("\nReset IDE"
186 #ifdef CONFIG_IDE_8xx_DIRECT
187 " on PCMCIA " PCMCIA_SLOT_MSG
188 #endif
189 ": ");
190
191 ide_init ();
192 return 0;
193 } else if (strncmp(argv[1],"inf",3) == 0) {
194 int i;
195
196 putc ('\n');
197
198 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
199 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
200 continue; /* list only known devices */
201 printf ("IDE device %d: ", i);
202 dev_print(&ide_dev_desc[i]);
203 }
204 return 0;
205
206 } else if (strncmp(argv[1],"dev",3) == 0) {
207 if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
208 puts ("\nno IDE devices available\n");
209 return 1;
210 }
211 printf ("\nIDE device %d: ", curr_device);
212 dev_print(&ide_dev_desc[curr_device]);
213 return 0;
214 } else if (strncmp(argv[1],"part",4) == 0) {
215 int dev, ok;
216
217 for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
218 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
219 ++ok;
220 if (dev)
221 putc ('\n');
222 print_part(&ide_dev_desc[dev]);
223 }
224 }
225 if (!ok) {
226 puts ("\nno IDE devices available\n");
227 rcode ++;
228 }
229 return rcode;
230 }
231 return cmd_usage(cmdtp);
232 case 3:
233 if (strncmp(argv[1],"dev",3) == 0) {
234 int dev = (int)simple_strtoul(argv[2], NULL, 10);
235
236 printf ("\nIDE device %d: ", dev);
237 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
238 puts ("unknown device\n");
239 return 1;
240 }
241 dev_print(&ide_dev_desc[dev]);
242 /*ide_print (dev);*/
243
244 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
245 return 1;
246 }
247
248 curr_device = dev;
249
250 puts ("... is now current device\n");
251
252 return 0;
253 } else if (strncmp(argv[1],"part",4) == 0) {
254 int dev = (int)simple_strtoul(argv[2], NULL, 10);
255
256 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
257 print_part(&ide_dev_desc[dev]);
258 } else {
259 printf ("\nIDE device %d not available\n", dev);
260 rcode = 1;
261 }
262 return rcode;
263 #if 0
264 } else if (strncmp(argv[1],"pio",4) == 0) {
265 int mode = (int)simple_strtoul(argv[2], NULL, 10);
266
267 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
268 puts ("\nSetting ");
269 pio_mode = mode;
270 ide_init ();
271 } else {
272 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
273 mode, IDE_MAX_PIO_MODE);
274 }
275 return;
276 #endif
277 }
278
279 return cmd_usage(cmdtp);
280 default:
281 /* at least 4 args */
282
283 if (strcmp(argv[1],"read") == 0) {
284 ulong addr = simple_strtoul(argv[2], NULL, 16);
285 ulong cnt = simple_strtoul(argv[4], NULL, 16);
286 ulong n;
287 #ifdef CONFIG_SYS_64BIT_LBA
288 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
289
290 printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
291 curr_device, blk, cnt);
292 #else
293 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
294
295 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
296 curr_device, blk, cnt);
297 #endif
298
299 n = ide_dev_desc[curr_device].block_read (curr_device,
300 blk, cnt,
301 (ulong *)addr);
302 /* flush cache after read */
303 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
304
305 printf ("%ld blocks read: %s\n",
306 n, (n==cnt) ? "OK" : "ERROR");
307 if (n==cnt) {
308 return 0;
309 } else {
310 return 1;
311 }
312 } else if (strcmp(argv[1],"write") == 0) {
313 ulong addr = simple_strtoul(argv[2], NULL, 16);
314 ulong cnt = simple_strtoul(argv[4], NULL, 16);
315 ulong n;
316 #ifdef CONFIG_SYS_64BIT_LBA
317 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
318
319 printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
320 curr_device, blk, cnt);
321 #else
322 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
323
324 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
325 curr_device, blk, cnt);
326 #endif
327
328 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
329
330 printf ("%ld blocks written: %s\n",
331 n, (n==cnt) ? "OK" : "ERROR");
332 if (n==cnt)
333 return 0;
334 else
335 return 1;
336 } else {
337 return cmd_usage(cmdtp);
338 }
339
340 return rcode;
341 }
342 }
343
344 int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
345 {
346 char *boot_device = NULL;
347 char *ep;
348 int dev, part = 0;
349 ulong addr, cnt;
350 disk_partition_t info;
351 image_header_t *hdr;
352 int rcode = 0;
353 #if defined(CONFIG_FIT)
354 const void *fit_hdr = NULL;
355 #endif
356
357 show_boot_progress (41);
358 switch (argc) {
359 case 1:
360 addr = CONFIG_SYS_LOAD_ADDR;
361 boot_device = getenv ("bootdevice");
362 break;
363 case 2:
364 addr = simple_strtoul(argv[1], NULL, 16);
365 boot_device = getenv ("bootdevice");
366 break;
367 case 3:
368 addr = simple_strtoul(argv[1], NULL, 16);
369 boot_device = argv[2];
370 break;
371 default:
372 show_boot_progress (-42);
373 return cmd_usage(cmdtp);
374 }
375 show_boot_progress (42);
376
377 if (!boot_device) {
378 puts ("\n** No boot device **\n");
379 show_boot_progress (-43);
380 return 1;
381 }
382 show_boot_progress (43);
383
384 dev = simple_strtoul(boot_device, &ep, 16);
385
386 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
387 printf ("\n** Device %d not available\n", dev);
388 show_boot_progress (-44);
389 return 1;
390 }
391 show_boot_progress (44);
392
393 if (*ep) {
394 if (*ep != ':') {
395 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
396 show_boot_progress (-45);
397 return 1;
398 }
399 part = simple_strtoul(++ep, NULL, 16);
400 }
401 show_boot_progress (45);
402 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
403 show_boot_progress (-46);
404 return 1;
405 }
406 show_boot_progress (46);
407 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
408 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
409 printf ("\n** Invalid partition type \"%.32s\""
410 " (expect \"" BOOT_PART_TYPE "\")\n",
411 info.type);
412 show_boot_progress (-47);
413 return 1;
414 }
415 show_boot_progress (47);
416
417 printf ("\nLoading from IDE device %d, partition %d: "
418 "Name: %.32s Type: %.32s\n",
419 dev, part, info.name, info.type);
420
421 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
422 info.start, info.size, info.blksz);
423
424 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
425 printf ("** Read error on %d:%d\n", dev, part);
426 show_boot_progress (-48);
427 return 1;
428 }
429 show_boot_progress (48);
430
431 switch (genimg_get_format ((void *)addr)) {
432 case IMAGE_FORMAT_LEGACY:
433 hdr = (image_header_t *)addr;
434
435 show_boot_progress (49);
436
437 if (!image_check_hcrc (hdr)) {
438 puts ("\n** Bad Header Checksum **\n");
439 show_boot_progress (-50);
440 return 1;
441 }
442 show_boot_progress (50);
443
444 image_print_contents (hdr);
445
446 cnt = image_get_image_size (hdr);
447 break;
448 #if defined(CONFIG_FIT)
449 case IMAGE_FORMAT_FIT:
450 fit_hdr = (const void *)addr;
451 puts ("Fit image detected...\n");
452
453 cnt = fit_get_size (fit_hdr);
454 break;
455 #endif
456 default:
457 show_boot_progress (-49);
458 puts ("** Unknown image type\n");
459 return 1;
460 }
461
462 cnt += info.blksz - 1;
463 cnt /= info.blksz;
464 cnt -= 1;
465
466 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
467 (ulong *)(addr+info.blksz)) != cnt) {
468 printf ("** Read error on %d:%d\n", dev, part);
469 show_boot_progress (-51);
470 return 1;
471 }
472 show_boot_progress (51);
473
474 #if defined(CONFIG_FIT)
475 /* This cannot be done earlier, we need complete FIT image in RAM first */
476 if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
477 if (!fit_check_format (fit_hdr)) {
478 show_boot_progress (-140);
479 puts ("** Bad FIT image format\n");
480 return 1;
481 }
482 show_boot_progress (141);
483 fit_print_contents (fit_hdr);
484 }
485 #endif
486
487 /* Loading ok, update default load address */
488
489 load_addr = addr;
490
491 /* Check if we should attempt an auto-start */
492 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
493 char *local_args[2];
494 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
495
496 local_args[0] = argv[0];
497 local_args[1] = NULL;
498
499 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
500
501 do_bootm (cmdtp, 0, 1, local_args);
502 rcode = 1;
503 }
504 return rcode;
505 }
506
507 /* ------------------------------------------------------------------------- */
508
509 void inline
510 __ide_outb(int dev, int port, unsigned char val)
511 {
512 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
513 dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
514 outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
515 }
516 void ide_outb (int dev, int port, unsigned char val)
517 __attribute__((weak, alias("__ide_outb")));
518
519 unsigned char inline
520 __ide_inb(int dev, int port)
521 {
522 uchar val;
523 val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
524 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
525 dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
526 return val;
527 }
528 unsigned char ide_inb(int dev, int port)
529 __attribute__((weak, alias("__ide_inb")));
530
531 #ifdef CONFIG_TUNE_PIO
532 int inline
533 __ide_set_piomode(int pio_mode)
534 {
535 return 0;
536 }
537 int inline ide_set_piomode(int pio_mode)
538 __attribute__((weak, alias("__ide_set_piomode")));
539 #endif
540
541 void ide_init (void)
542 {
543
544 #ifdef CONFIG_IDE_8xx_DIRECT
545 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
546 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
547 #endif
548 unsigned char c;
549 int i, bus;
550 #if defined(CONFIG_SC3)
551 unsigned int ata_reset_time = ATA_RESET_TIME;
552 #endif
553 #ifdef CONFIG_IDE_8xx_PCCARD
554 extern int pcmcia_on (void);
555 extern int ide_devices_found; /* Initialized in check_ide_device() */
556 #endif /* CONFIG_IDE_8xx_PCCARD */
557
558 #ifdef CONFIG_IDE_PREINIT
559 extern int ide_preinit (void);
560 WATCHDOG_RESET();
561
562 if (ide_preinit ()) {
563 puts ("ide_preinit failed\n");
564 return;
565 }
566 #endif /* CONFIG_IDE_PREINIT */
567
568 #ifdef CONFIG_IDE_8xx_PCCARD
569 extern int pcmcia_on (void);
570 extern int ide_devices_found; /* Initialized in check_ide_device() */
571
572 WATCHDOG_RESET();
573
574 ide_devices_found = 0;
575 /* initialize the PCMCIA IDE adapter card */
576 pcmcia_on();
577 if (!ide_devices_found)
578 return;
579 udelay (1000000); /* 1 s */
580 #endif /* CONFIG_IDE_8xx_PCCARD */
581
582 WATCHDOG_RESET();
583
584 #ifdef CONFIG_IDE_8xx_DIRECT
585 /* Initialize PIO timing tables */
586 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
587 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
588 gd->bus_clk);
589 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
590 gd->bus_clk);
591 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
592 gd->bus_clk);
593 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
594 " len=%3d ns/%d clk"
595 " hold=%2d ns/%d clk\n",
596 i,
597 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
598 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
599 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
600 }
601 #endif /* CONFIG_IDE_8xx_DIRECT */
602
603 /* Reset the IDE just to be sure.
604 * Light LED's to show
605 */
606 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
607 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
608
609 #ifdef CONFIG_IDE_8xx_DIRECT
610 /* PCMCIA / IDE initialization for common mem space */
611 pcmp->pcmc_pgcrb = 0;
612
613 /* start in PIO mode 0 - most relaxed timings */
614 pio_mode = 0;
615 set_pcmcia_timing (pio_mode);
616 #endif /* CONFIG_IDE_8xx_DIRECT */
617
618 /*
619 * Wait for IDE to get ready.
620 * According to spec, this can take up to 31 seconds!
621 */
622 for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
623 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
624
625 #ifdef CONFIG_IDE_8xx_PCCARD
626 /* Skip non-ide devices from probing */
627 if ((ide_devices_found & (1 << bus)) == 0) {
628 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
629 continue;
630 }
631 #endif
632 printf ("Bus %d: ", bus);
633
634 ide_bus_ok[bus] = 0;
635
636 /* Select device
637 */
638 udelay (100000); /* 100 ms */
639 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
640 udelay (100000); /* 100 ms */
641 i = 0;
642 do {
643 udelay (10000); /* 10 ms */
644
645 c = ide_inb (dev, ATA_STATUS);
646 i++;
647 #if defined(CONFIG_SC3)
648 if (i > (ata_reset_time * 100)) {
649 #else
650 if (i > (ATA_RESET_TIME * 100)) {
651 #endif
652 puts ("** Timeout **\n");
653 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
654 return;
655 }
656 if ((i >= 100) && ((i%100)==0)) {
657 putc ('.');
658 }
659 } while (c & ATA_STAT_BUSY);
660
661 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
662 puts ("not available ");
663 debug ("Status = 0x%02X ", c);
664 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
665 } else if ((c & ATA_STAT_READY) == 0) {
666 puts ("not available ");
667 debug ("Status = 0x%02X ", c);
668 #endif
669 } else {
670 puts ("OK ");
671 ide_bus_ok[bus] = 1;
672 }
673 WATCHDOG_RESET();
674 }
675
676 putc ('\n');
677
678 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
679
680 curr_device = -1;
681 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
682 #ifdef CONFIG_IDE_LED
683 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
684 #endif
685 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
686 ide_dev_desc[i].if_type=IF_TYPE_IDE;
687 ide_dev_desc[i].dev=i;
688 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
689 ide_dev_desc[i].blksz=0;
690 ide_dev_desc[i].lba=0;
691 ide_dev_desc[i].block_read=ide_read;
692 if (!ide_bus_ok[IDE_BUS(i)])
693 continue;
694 ide_led (led, 1); /* LED on */
695 ide_ident(&ide_dev_desc[i]);
696 ide_led (led, 0); /* LED off */
697 dev_print(&ide_dev_desc[i]);
698 /* ide_print (i); */
699 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
700 init_part (&ide_dev_desc[i]); /* initialize partition type */
701 if (curr_device < 0)
702 curr_device = i;
703 }
704 }
705 WATCHDOG_RESET();
706 }
707
708 /* ------------------------------------------------------------------------- */
709
710 block_dev_desc_t * ide_get_dev(int dev)
711 {
712 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
713 }
714
715
716 #ifdef CONFIG_IDE_8xx_DIRECT
717
718 static void
719 set_pcmcia_timing (int pmode)
720 {
721 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
722 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
723 ulong timings;
724
725 debug ("Set timing for PIO Mode %d\n", pmode);
726
727 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
728 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
729 | PCMCIA_SL (pio_config_clk[pmode].t_length)
730 ;
731
732 /* IDE 0
733 */
734 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
735 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
736 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
737 | timings
738 #endif
739 ;
740 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
741
742 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
743 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
744 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
745 | timings
746 #endif
747 ;
748 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
749
750 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
751 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
752 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
753 | timings
754 #endif
755 ;
756 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
757
758 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
759 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
760 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
761 | timings
762 #endif
763 ;
764 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
765
766 /* IDE 1
767 */
768 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
769 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
770 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
771 | timings
772 #endif
773 ;
774 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
775
776 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
777 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
778 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
779 | timings
780 #endif
781 ;
782 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
783
784 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
785 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
786 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
787 | timings
788 #endif
789 ;
790 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
791
792 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
793 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
794 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
795 | timings
796 #endif
797 ;
798 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
799
800 }
801
802 #endif /* CONFIG_IDE_8xx_DIRECT */
803
804 /* ------------------------------------------------------------------------- */
805
806 /* We only need to swap data if we are running on a big endian cpu. */
807 /* But Au1x00 cpu:s already swaps data in big endian mode! */
808 #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
809 #define input_swap_data(x,y,z) input_data(x,y,z)
810 #else
811 static void
812 input_swap_data(int dev, ulong *sect_buf, int words)
813 {
814 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
815 uchar i;
816 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
817 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
818 ushort *dbuf = (ushort *)sect_buf;
819
820 while (words--) {
821 for (i=0; i<2; i++) {
822 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
823 *(uchar *)dbuf = *pbuf_odd;
824 dbuf+=1;
825 }
826 }
827 #else
828 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
829 ushort *dbuf = (ushort *)sect_buf;
830
831 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
832
833 while (words--) {
834 #ifdef __MIPS__
835 *dbuf++ = swab16p((u16*)pbuf);
836 *dbuf++ = swab16p((u16*)pbuf);
837 #elif defined(CONFIG_PCS440EP)
838 *dbuf++ = *pbuf;
839 *dbuf++ = *pbuf;
840 #else
841 *dbuf++ = ld_le16(pbuf);
842 *dbuf++ = ld_le16(pbuf);
843 #endif /* !MIPS */
844 }
845 #endif
846 }
847 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
848
849
850 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
851 static void
852 output_data(int dev, ulong *sect_buf, int words)
853 {
854 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
855 uchar *dbuf;
856 volatile uchar *pbuf_even;
857 volatile uchar *pbuf_odd;
858
859 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
860 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
861 dbuf = (uchar *)sect_buf;
862 while (words--) {
863 EIEIO;
864 *pbuf_even = *dbuf++;
865 EIEIO;
866 *pbuf_odd = *dbuf++;
867 EIEIO;
868 *pbuf_even = *dbuf++;
869 EIEIO;
870 *pbuf_odd = *dbuf++;
871 }
872 #else
873 ushort *dbuf;
874 volatile ushort *pbuf;
875
876 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
877 dbuf = (ushort *)sect_buf;
878 while (words--) {
879 #if defined(CONFIG_PCS440EP)
880 /* not tested, because CF was write protected */
881 EIEIO;
882 *pbuf = ld_le16(dbuf++);
883 EIEIO;
884 *pbuf = ld_le16(dbuf++);
885 #else
886 EIEIO;
887 *pbuf = *dbuf++;
888 EIEIO;
889 *pbuf = *dbuf++;
890 #endif
891 }
892 #endif
893 }
894 #else /* ! __PPC__ */
895 static void
896 output_data(int dev, ulong *sect_buf, int words)
897 {
898 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
899 }
900 #endif /* __PPC__ */
901
902 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
903 static void
904 input_data(int dev, ulong *sect_buf, int words)
905 {
906 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
907 uchar *dbuf;
908 volatile uchar *pbuf_even;
909 volatile uchar *pbuf_odd;
910
911 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
912 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
913 dbuf = (uchar *)sect_buf;
914 while (words--) {
915 *dbuf++ = *pbuf_even;
916 EIEIO;
917 SYNC;
918 *dbuf++ = *pbuf_odd;
919 EIEIO;
920 SYNC;
921 *dbuf++ = *pbuf_even;
922 EIEIO;
923 SYNC;
924 *dbuf++ = *pbuf_odd;
925 EIEIO;
926 SYNC;
927 }
928 #else
929 ushort *dbuf;
930 volatile ushort *pbuf;
931
932 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
933 dbuf = (ushort *)sect_buf;
934
935 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
936
937 while (words--) {
938 #if defined(CONFIG_PCS440EP)
939 EIEIO;
940 *dbuf++ = ld_le16(pbuf);
941 EIEIO;
942 *dbuf++ = ld_le16(pbuf);
943 #else
944 EIEIO;
945 *dbuf++ = *pbuf;
946 EIEIO;
947 *dbuf++ = *pbuf;
948 #endif
949 }
950 #endif
951 }
952 #else /* ! __PPC__ */
953 static void
954 input_data(int dev, ulong *sect_buf, int words)
955 {
956 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
957 }
958
959 #endif /* __PPC__ */
960
961 /* -------------------------------------------------------------------------
962 */
963 static void ide_ident (block_dev_desc_t *dev_desc)
964 {
965 ulong iobuf[ATA_SECTORWORDS];
966 unsigned char c;
967 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
968
969 #ifdef CONFIG_ATAPI
970 int retries = 0;
971 int do_retry = 0;
972 #endif
973
974 #ifdef CONFIG_TUNE_PIO
975 int pio_mode;
976 #endif
977
978 #if 0
979 int mode, cycle_time;
980 #endif
981 int device;
982 device=dev_desc->dev;
983 printf (" Device %d: ", device);
984
985 ide_led (DEVICE_LED(device), 1); /* LED on */
986 /* Select device
987 */
988 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
989 dev_desc->if_type=IF_TYPE_IDE;
990 #ifdef CONFIG_ATAPI
991
992 do_retry = 0;
993 retries = 0;
994
995 /* Warning: This will be tricky to read */
996 while (retries <= 1) {
997 /* check signature */
998 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
999 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1000 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1001 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
1002 /* ATAPI Signature found */
1003 dev_desc->if_type=IF_TYPE_ATAPI;
1004 /* Start Ident Command
1005 */
1006 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
1007 /*
1008 * Wait for completion - ATAPI devices need more time
1009 * to become ready
1010 */
1011 c = ide_wait (device, ATAPI_TIME_OUT);
1012 } else
1013 #endif
1014 {
1015 /* Start Ident Command
1016 */
1017 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
1018
1019 /* Wait for completion
1020 */
1021 c = ide_wait (device, IDE_TIME_OUT);
1022 }
1023 ide_led (DEVICE_LED(device), 0); /* LED off */
1024
1025 if (((c & ATA_STAT_DRQ) == 0) ||
1026 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
1027 #ifdef CONFIG_ATAPI
1028 {
1029 /* Need to soft reset the device in case it's an ATAPI... */
1030 debug ("Retrying...\n");
1031 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1032 udelay(100000);
1033 ide_outb (device, ATA_COMMAND, 0x08);
1034 udelay (500000); /* 500 ms */
1035 }
1036 /* Select device
1037 */
1038 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1039 retries++;
1040 #else
1041 return;
1042 #endif
1043 }
1044 #ifdef CONFIG_ATAPI
1045 else
1046 break;
1047 } /* see above - ugly to read */
1048
1049 if (retries == 2) /* Not found */
1050 return;
1051 #endif
1052
1053 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1054
1055 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1056 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1057 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
1058 #ifdef __LITTLE_ENDIAN
1059 /*
1060 * firmware revision, model, and serial number have Big Endian Byte
1061 * order in Word. Convert all three to little endian.
1062 *
1063 * See CF+ and CompactFlash Specification Revision 2.0:
1064 * 6.2.1.6: Identify Drive, Table 39 for more details
1065 */
1066
1067 strswab (dev_desc->revision);
1068 strswab (dev_desc->vendor);
1069 strswab (dev_desc->product);
1070 #endif /* __LITTLE_ENDIAN */
1071
1072 if ((iop->config & 0x0080)==0x0080)
1073 dev_desc->removable = 1;
1074 else
1075 dev_desc->removable = 0;
1076
1077 #ifdef CONFIG_TUNE_PIO
1078 /* Mode 0 - 2 only, are directly determined by word 51. */
1079 pio_mode = iop->tPIO;
1080 if (pio_mode > 2) {
1081 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1082 pio_mode = 0; /* Force it to dead slow, and hope for the best... */
1083 }
1084
1085 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1086 * shall set bit 1 of word 53 to one and support the fields contained
1087 * in words 64 through 70.
1088 */
1089 if (iop->field_valid & 0x02) {
1090 /* Mode 3 and above are possible. Check in order from slow
1091 * to fast, so we wind up with the highest mode allowed.
1092 */
1093 if (iop->eide_pio_modes & 0x01)
1094 pio_mode = 3;
1095 if (iop->eide_pio_modes & 0x02)
1096 pio_mode = 4;
1097 if (ata_id_is_cfa((u16 *)iop)) {
1098 if ((iop->cf_advanced_caps & 0x07) == 0x01)
1099 pio_mode = 5;
1100 if ((iop->cf_advanced_caps & 0x07) == 0x02)
1101 pio_mode = 6;
1102 }
1103 }
1104
1105 /* System-specific, depends on bus speeds, etc. */
1106 ide_set_piomode(pio_mode);
1107 #endif /* CONFIG_TUNE_PIO */
1108
1109 #if 0
1110 /*
1111 * Drive PIO mode autoselection
1112 */
1113 mode = iop->tPIO;
1114
1115 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1116 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1117 mode = 2;
1118 debug ("Override tPIO -> 2\n");
1119 }
1120 if (iop->field_valid & 2) { /* drive implements ATA2? */
1121 debug ("Drive implements ATA2\n");
1122 if (iop->capability & 8) { /* drive supports use_iordy? */
1123 cycle_time = iop->eide_pio_iordy;
1124 } else {
1125 cycle_time = iop->eide_pio;
1126 }
1127 debug ("cycle time = %d\n", cycle_time);
1128 mode = 4;
1129 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1130 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1131 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1132 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1133 }
1134 printf ("PIO mode to use: PIO %d\n", mode);
1135 #endif /* 0 */
1136
1137 #ifdef CONFIG_ATAPI
1138 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1139 atapi_inquiry(dev_desc);
1140 return;
1141 }
1142 #endif /* CONFIG_ATAPI */
1143
1144 #ifdef __BIG_ENDIAN
1145 /* swap shorts */
1146 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
1147 #else /* ! __BIG_ENDIAN */
1148 /*
1149 * do not swap shorts on little endian
1150 *
1151 * See CF+ and CompactFlash Specification Revision 2.0:
1152 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1153 */
1154 dev_desc->lba = iop->lba_capacity;
1155 #endif /* __BIG_ENDIAN */
1156
1157 #ifdef CONFIG_LBA48
1158 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
1159 dev_desc->lba48 = 1;
1160 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
1161 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1162 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1163 ((unsigned long long)iop->lba48_capacity[3] << 48);
1164 } else {
1165 dev_desc->lba48 = 0;
1166 }
1167 #endif /* CONFIG_LBA48 */
1168 /* assuming HD */
1169 dev_desc->type=DEV_TYPE_HARDDISK;
1170 dev_desc->blksz=ATA_BLOCKSIZE;
1171 dev_desc->lun=0; /* just to fill something in... */
1172
1173 #if 0 /* only used to test the powersaving mode,
1174 * if enabled, the drive goes after 5 sec
1175 * in standby mode */
1176 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1177 c = ide_wait (device, IDE_TIME_OUT);
1178 ide_outb (device, ATA_SECT_CNT, 1);
1179 ide_outb (device, ATA_LBA_LOW, 0);
1180 ide_outb (device, ATA_LBA_MID, 0);
1181 ide_outb (device, ATA_LBA_HIGH, 0);
1182 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1183 ide_outb (device, ATA_COMMAND, 0xe3);
1184 udelay (50);
1185 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1186 #endif
1187 }
1188
1189
1190 /* ------------------------------------------------------------------------- */
1191
1192 ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1193 {
1194 ulong n = 0;
1195 unsigned char c;
1196 unsigned char pwrsave=0; /* power save */
1197 #ifdef CONFIG_LBA48
1198 unsigned char lba48 = 0;
1199
1200 if (blknr & 0x0000fffff0000000ULL) {
1201 /* more than 28 bits used, use 48bit mode */
1202 lba48 = 1;
1203 }
1204 #endif
1205 debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
1206 device, blknr, blkcnt, (ulong)buffer);
1207
1208 ide_led (DEVICE_LED(device), 1); /* LED on */
1209
1210 /* Select device
1211 */
1212 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1213 c = ide_wait (device, IDE_TIME_OUT);
1214
1215 if (c & ATA_STAT_BUSY) {
1216 printf ("IDE read: device %d not ready\n", device);
1217 goto IDE_READ_E;
1218 }
1219
1220 /* first check if the drive is in Powersaving mode, if yes,
1221 * increase the timeout value */
1222 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1223 udelay (50);
1224
1225 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1226
1227 if (c & ATA_STAT_BUSY) {
1228 printf ("IDE read: device %d not ready\n", device);
1229 goto IDE_READ_E;
1230 }
1231 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1232 printf ("No Powersaving mode %X\n", c);
1233 } else {
1234 c = ide_inb(device,ATA_SECT_CNT);
1235 debug ("Powersaving %02X\n",c);
1236 if(c==0)
1237 pwrsave=1;
1238 }
1239
1240
1241 while (blkcnt-- > 0) {
1242
1243 c = ide_wait (device, IDE_TIME_OUT);
1244
1245 if (c & ATA_STAT_BUSY) {
1246 printf ("IDE read: device %d not ready\n", device);
1247 break;
1248 }
1249 #ifdef CONFIG_LBA48
1250 if (lba48) {
1251 /* write high bits */
1252 ide_outb (device, ATA_SECT_CNT, 0);
1253 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1254 #ifdef CONFIG_SYS_64BIT_LBA
1255 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1256 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1257 #else
1258 ide_outb (device, ATA_LBA_MID, 0);
1259 ide_outb (device, ATA_LBA_HIGH, 0);
1260 #endif
1261 }
1262 #endif
1263 ide_outb (device, ATA_SECT_CNT, 1);
1264 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1265 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1266 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1267
1268 #ifdef CONFIG_LBA48
1269 if (lba48) {
1270 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1271 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1272
1273 } else
1274 #endif
1275 {
1276 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1277 ATA_DEVICE(device) |
1278 ((blknr >> 24) & 0xF) );
1279 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1280 }
1281
1282 udelay (50);
1283
1284 if(pwrsave) {
1285 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1286 pwrsave=0;
1287 } else {
1288 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1289 }
1290
1291 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1292 #if defined(CONFIG_SYS_64BIT_LBA)
1293 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1294 device, blknr, c);
1295 #else
1296 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1297 device, (ulong)blknr, c);
1298 #endif
1299 break;
1300 }
1301
1302 input_data (device, buffer, ATA_SECTORWORDS);
1303 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
1304
1305 ++n;
1306 ++blknr;
1307 buffer += ATA_BLOCKSIZE;
1308 }
1309 IDE_READ_E:
1310 ide_led (DEVICE_LED(device), 0); /* LED off */
1311 return (n);
1312 }
1313
1314 /* ------------------------------------------------------------------------- */
1315
1316
1317 ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1318 {
1319 ulong n = 0;
1320 unsigned char c;
1321 #ifdef CONFIG_LBA48
1322 unsigned char lba48 = 0;
1323
1324 if (blknr & 0x0000fffff0000000ULL) {
1325 /* more than 28 bits used, use 48bit mode */
1326 lba48 = 1;
1327 }
1328 #endif
1329
1330 ide_led (DEVICE_LED(device), 1); /* LED on */
1331
1332 /* Select device
1333 */
1334 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1335
1336 while (blkcnt-- > 0) {
1337
1338 c = ide_wait (device, IDE_TIME_OUT);
1339
1340 if (c & ATA_STAT_BUSY) {
1341 printf ("IDE read: device %d not ready\n", device);
1342 goto WR_OUT;
1343 }
1344 #ifdef CONFIG_LBA48
1345 if (lba48) {
1346 /* write high bits */
1347 ide_outb (device, ATA_SECT_CNT, 0);
1348 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1349 #ifdef CONFIG_SYS_64BIT_LBA
1350 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1351 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1352 #else
1353 ide_outb (device, ATA_LBA_MID, 0);
1354 ide_outb (device, ATA_LBA_HIGH, 0);
1355 #endif
1356 }
1357 #endif
1358 ide_outb (device, ATA_SECT_CNT, 1);
1359 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1360 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1361 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1362
1363 #ifdef CONFIG_LBA48
1364 if (lba48) {
1365 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1366 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1367
1368 } else
1369 #endif
1370 {
1371 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1372 ATA_DEVICE(device) |
1373 ((blknr >> 24) & 0xF) );
1374 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1375 }
1376
1377 udelay (50);
1378
1379 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1380
1381 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1382 #if defined(CONFIG_SYS_64BIT_LBA)
1383 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1384 device, blknr, c);
1385 #else
1386 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1387 device, (ulong)blknr, c);
1388 #endif
1389 goto WR_OUT;
1390 }
1391
1392 output_data (device, buffer, ATA_SECTORWORDS);
1393 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
1394 ++n;
1395 ++blknr;
1396 buffer += ATA_BLOCKSIZE;
1397 }
1398 WR_OUT:
1399 ide_led (DEVICE_LED(device), 0); /* LED off */
1400 return (n);
1401 }
1402
1403 /* ------------------------------------------------------------------------- */
1404
1405 /*
1406 * copy src to dest, skipping leading and trailing blanks and null
1407 * terminate the string
1408 * "len" is the size of available memory including the terminating '\0'
1409 */
1410 static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
1411 {
1412 unsigned char *end, *last;
1413
1414 last = dst;
1415 end = src + len - 1;
1416
1417 /* reserve space for '\0' */
1418 if (len < 2)
1419 goto OUT;
1420
1421 /* skip leading white space */
1422 while ((*src) && (src<end) && (*src==' '))
1423 ++src;
1424
1425 /* copy string, omitting trailing white space */
1426 while ((*src) && (src<end)) {
1427 *dst++ = *src;
1428 if (*src++ != ' ')
1429 last = dst;
1430 }
1431 OUT:
1432 *last = '\0';
1433 }
1434
1435 /* ------------------------------------------------------------------------- */
1436
1437 /*
1438 * Wait until Busy bit is off, or timeout (in ms)
1439 * Return last status
1440 */
1441 static uchar ide_wait (int dev, ulong t)
1442 {
1443 ulong delay = 10 * t; /* poll every 100 us */
1444 uchar c;
1445
1446 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1447 udelay (100);
1448 if (delay-- == 0) {
1449 break;
1450 }
1451 }
1452 return (c);
1453 }
1454
1455 /* ------------------------------------------------------------------------- */
1456
1457 #ifdef CONFIG_IDE_RESET
1458 extern void ide_set_reset(int idereset);
1459
1460 static void ide_reset (void)
1461 {
1462 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1463 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
1464 #endif
1465 int i;
1466
1467 curr_device = -1;
1468 for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
1469 ide_bus_ok[i] = 0;
1470 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
1471 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1472
1473 ide_set_reset (1); /* assert reset */
1474
1475 /* the reset signal shall be asserted for et least 25 us */
1476 udelay(25);
1477
1478 WATCHDOG_RESET();
1479
1480 #ifdef CONFIG_SYS_PB_12V_ENABLE
1481 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
1482 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1483 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1484 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1485
1486 /* wait 500 ms for the voltage to stabilize
1487 */
1488 for (i=0; i<500; ++i) {
1489 udelay (1000);
1490 }
1491
1492 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
1493 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1494
1495 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1496 /* configure IDE Motor voltage monitor pin as input */
1497 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1498 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1499 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1500
1501 /* wait up to 1 s for the motor voltage to stabilize
1502 */
1503 for (i=0; i<1000; ++i) {
1504 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1505 break;
1506 }
1507 udelay (1000);
1508 }
1509
1510 if (i == 1000) { /* Timeout */
1511 printf ("\nWarning: 5V for IDE Motor missing\n");
1512 # ifdef CONFIG_STATUS_LED
1513 # ifdef STATUS_LED_YELLOW
1514 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1515 # endif
1516 # ifdef STATUS_LED_GREEN
1517 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1518 # endif
1519 # endif /* CONFIG_STATUS_LED */
1520 }
1521 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1522
1523 WATCHDOG_RESET();
1524
1525 /* de-assert RESET signal */
1526 ide_set_reset(0);
1527
1528 /* wait 250 ms */
1529 for (i=0; i<250; ++i) {
1530 udelay (1000);
1531 }
1532 }
1533
1534 #endif /* CONFIG_IDE_RESET */
1535
1536 /* ------------------------------------------------------------------------- */
1537
1538 #if defined(CONFIG_IDE_LED) && \
1539 !defined(CONFIG_CPC45) && \
1540 !defined(CONFIG_HMI10) && \
1541 !defined(CONFIG_KUP4K) && \
1542 !defined(CONFIG_KUP4X)
1543
1544 static uchar led_buffer = 0; /* Buffer for current LED status */
1545
1546 static void ide_led (uchar led, uchar status)
1547 {
1548 uchar *led_port = LED_PORT;
1549
1550 if (status) { /* switch LED on */
1551 led_buffer |= led;
1552 } else { /* switch LED off */
1553 led_buffer &= ~led;
1554 }
1555
1556 *led_port = led_buffer;
1557 }
1558
1559 #endif /* CONFIG_IDE_LED */
1560
1561 #if defined(CONFIG_OF_IDE_FIXUP)
1562 int ide_device_present(int dev)
1563 {
1564 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1565 return 0;
1566 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1567 }
1568 #endif
1569 /* ------------------------------------------------------------------------- */
1570
1571 #ifdef CONFIG_ATAPI
1572 /****************************************************************************
1573 * ATAPI Support
1574 */
1575
1576 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
1577 /* since ATAPI may use commands with not 4 bytes alligned length
1578 * we have our own transfer functions, 2 bytes alligned */
1579 static void
1580 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1581 {
1582 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1583 uchar *dbuf;
1584 volatile uchar *pbuf_even;
1585 volatile uchar *pbuf_odd;
1586
1587 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1588 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1589 while (shorts--) {
1590 EIEIO;
1591 *pbuf_even = *dbuf++;
1592 EIEIO;
1593 *pbuf_odd = *dbuf++;
1594 }
1595 #else
1596 ushort *dbuf;
1597 volatile ushort *pbuf;
1598
1599 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1600 dbuf = (ushort *)sect_buf;
1601
1602 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
1603
1604 while (shorts--) {
1605 EIEIO;
1606 *pbuf = *dbuf++;
1607 }
1608 #endif
1609 }
1610
1611 static void
1612 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1613 {
1614 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1615 uchar *dbuf;
1616 volatile uchar *pbuf_even;
1617 volatile uchar *pbuf_odd;
1618
1619 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1620 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1621 while (shorts--) {
1622 EIEIO;
1623 *dbuf++ = *pbuf_even;
1624 EIEIO;
1625 *dbuf++ = *pbuf_odd;
1626 }
1627 #else
1628 ushort *dbuf;
1629 volatile ushort *pbuf;
1630
1631 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1632 dbuf = (ushort *)sect_buf;
1633
1634 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1635
1636 while (shorts--) {
1637 EIEIO;
1638 *dbuf++ = *pbuf;
1639 }
1640 #endif
1641 }
1642
1643 #else /* ! __PPC__ */
1644 static void
1645 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1646 {
1647 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1648 }
1649
1650 static void
1651 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1652 {
1653 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1654 }
1655
1656 #endif /* __PPC__ */
1657
1658 /*
1659 * Wait until (Status & mask) == res, or timeout (in ms)
1660 * Return last status
1661 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1662 * and then they set their DRQ Bit
1663 */
1664 static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1665 {
1666 ulong delay = 10 * t; /* poll every 100 us */
1667 uchar c;
1668
1669 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1670 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1671 /* break if error occurs (doesn't make sense to wait more) */
1672 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1673 break;
1674 udelay (100);
1675 if (delay-- == 0) {
1676 break;
1677 }
1678 }
1679 return (c);
1680 }
1681
1682 /*
1683 * issue an atapi command
1684 */
1685 unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1686 {
1687 unsigned char c,err,mask,res;
1688 int n;
1689 ide_led (DEVICE_LED(device), 1); /* LED on */
1690
1691 /* Select device
1692 */
1693 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1694 res = 0;
1695 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1696 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1697 if ((c & mask) != res) {
1698 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1699 err=0xFF;
1700 goto AI_OUT;
1701 }
1702 /* write taskfile */
1703 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1704 ide_outb (device, ATA_SECT_CNT, 0);
1705 ide_outb (device, ATA_SECT_NUM, 0);
1706 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
1707 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1708 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1709
1710 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
1711 udelay (50);
1712
1713 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1714 res = ATA_STAT_DRQ;
1715 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1716
1717 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1718 printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1719 err=0xFF;
1720 goto AI_OUT;
1721 }
1722
1723 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1724 /* ATAPI Command written wait for completition */
1725 udelay (5000); /* device must set bsy */
1726
1727 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1728 /* if no data wait for DRQ = 0 BSY = 0
1729 * if data wait for DRQ = 1 BSY = 0 */
1730 res=0;
1731 if(buflen)
1732 res = ATA_STAT_DRQ;
1733 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1734 if ((c & mask) != res ) {
1735 if (c & ATA_STAT_ERR) {
1736 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1737 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
1738 } else {
1739 printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1740 err=0xFF;
1741 }
1742 goto AI_OUT;
1743 }
1744 n=ide_inb(device, ATA_CYL_HIGH);
1745 n<<=8;
1746 n+=ide_inb(device, ATA_CYL_LOW);
1747 if(n>buflen) {
1748 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1749 err=0xff;
1750 goto AI_OUT;
1751 }
1752 if((n==0)&&(buflen<0)) {
1753 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1754 err=0xff;
1755 goto AI_OUT;
1756 }
1757 if(n!=buflen) {
1758 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
1759 }
1760 if(n!=0) { /* data transfer */
1761 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
1762 /* we transfer shorts */
1763 n>>=1;
1764 /* ok now decide if it is an in or output */
1765 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1766 debug ("Write to device\n");
1767 output_data_shorts(device,(unsigned short *)buffer,n);
1768 } else {
1769 debug ("Read from device @ %p shorts %d\n",buffer,n);
1770 input_data_shorts(device,(unsigned short *)buffer,n);
1771 }
1772 }
1773 udelay(5000); /* seems that some CD ROMs need this... */
1774 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1775 res=0;
1776 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1777 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1778 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1779 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
1780 } else {
1781 err = 0;
1782 }
1783 AI_OUT:
1784 ide_led (DEVICE_LED(device), 0); /* LED off */
1785 return (err);
1786 }
1787
1788 /*
1789 * sending the command to atapi_issue. If an status other than good
1790 * returns, an request_sense will be issued
1791 */
1792
1793 #define ATAPI_DRIVE_NOT_READY 100
1794 #define ATAPI_UNIT_ATTN 10
1795
1796 unsigned char atapi_issue_autoreq (int device,
1797 unsigned char* ccb,
1798 int ccblen,
1799 unsigned char *buffer,
1800 int buflen)
1801 {
1802 unsigned char sense_data[18],sense_ccb[12];
1803 unsigned char res,key,asc,ascq;
1804 int notready,unitattn;
1805
1806 unitattn=ATAPI_UNIT_ATTN;
1807 notready=ATAPI_DRIVE_NOT_READY;
1808
1809 retry:
1810 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1811 if (res==0)
1812 return (0); /* Ok */
1813
1814 if (res==0xFF)
1815 return (0xFF); /* error */
1816
1817 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
1818
1819 memset(sense_ccb,0,sizeof(sense_ccb));
1820 memset(sense_data,0,sizeof(sense_data));
1821 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
1822 sense_ccb[4]=18; /* allocation Length */
1823
1824 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1825 key=(sense_data[2]&0xF);
1826 asc=(sense_data[12]);
1827 ascq=(sense_data[13]);
1828
1829 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1830 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1831 sense_data[0],
1832 key,
1833 asc,
1834 ascq);
1835
1836 if((key==0))
1837 return 0; /* ok device ready */
1838
1839 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1840 if(unitattn-->0) {
1841 udelay(200*1000);
1842 goto retry;
1843 }
1844 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1845 goto error;
1846 }
1847 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1848 if (notready-->0) {
1849 udelay(200*1000);
1850 goto retry;
1851 }
1852 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1853 goto error;
1854 }
1855 if(asc==0x3a) {
1856 debug ("Media not present\n");
1857 goto error;
1858 }
1859
1860 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1861 error:
1862 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1863 return (0xFF);
1864 }
1865
1866
1867 static void atapi_inquiry(block_dev_desc_t * dev_desc)
1868 {
1869 unsigned char ccb[12]; /* Command descriptor block */
1870 unsigned char iobuf[64]; /* temp buf */
1871 unsigned char c;
1872 int device;
1873
1874 device=dev_desc->dev;
1875 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1876 dev_desc->block_read=atapi_read;
1877
1878 memset(ccb,0,sizeof(ccb));
1879 memset(iobuf,0,sizeof(iobuf));
1880
1881 ccb[0]=ATAPI_CMD_INQUIRY;
1882 ccb[4]=40; /* allocation Legnth */
1883 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1884
1885 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
1886 if (c!=0)
1887 return;
1888
1889 /* copy device ident strings */
1890 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1891 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1892 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
1893
1894 dev_desc->lun=0;
1895 dev_desc->lba=0;
1896 dev_desc->blksz=0;
1897 dev_desc->type=iobuf[0] & 0x1f;
1898
1899 if ((iobuf[1]&0x80)==0x80)
1900 dev_desc->removable = 1;
1901 else
1902 dev_desc->removable = 0;
1903
1904 memset(ccb,0,sizeof(ccb));
1905 memset(iobuf,0,sizeof(iobuf));
1906 ccb[0]=ATAPI_CMD_START_STOP;
1907 ccb[4]=0x03; /* start */
1908
1909 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1910
1911 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
1912 if (c!=0)
1913 return;
1914
1915 memset(ccb,0,sizeof(ccb));
1916 memset(iobuf,0,sizeof(iobuf));
1917 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1918
1919 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
1920 if (c!=0)
1921 return;
1922
1923 memset(ccb,0,sizeof(ccb));
1924 memset(iobuf,0,sizeof(iobuf));
1925 ccb[0]=ATAPI_CMD_READ_CAP;
1926 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1927 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
1928 if (c!=0)
1929 return;
1930
1931 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1932 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1933 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1934
1935 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1936 ((unsigned long)iobuf[1]<<16) +
1937 ((unsigned long)iobuf[2]<< 8) +
1938 ((unsigned long)iobuf[3]);
1939 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1940 ((unsigned long)iobuf[5]<<16) +
1941 ((unsigned long)iobuf[6]<< 8) +
1942 ((unsigned long)iobuf[7]);
1943 #ifdef CONFIG_LBA48
1944 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1945 #endif
1946 return;
1947 }
1948
1949
1950 /*
1951 * atapi_read:
1952 * we transfer only one block per command, since the multiple DRQ per
1953 * command is not yet implemented
1954 */
1955 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1956 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
1957 #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
1958
1959 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1960 {
1961 ulong n = 0;
1962 unsigned char ccb[12]; /* Command descriptor block */
1963 ulong cnt;
1964
1965 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
1966 device, blknr, blkcnt, (ulong)buffer);
1967
1968 do {
1969 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
1970 cnt=ATAPI_READ_MAX_BLOCK;
1971 } else {
1972 cnt=blkcnt;
1973 }
1974 ccb[0]=ATAPI_CMD_READ_12;
1975 ccb[1]=0; /* reserved */
1976 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
1977 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
1978 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
1979 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
1980 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
1981 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
1982 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
1983 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
1984 ccb[10]=0; /* reserved */
1985 ccb[11]=0; /* reserved */
1986
1987 if (atapi_issue_autoreq(device,ccb,12,
1988 (unsigned char *)buffer,
1989 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
1990 return (n);
1991 }
1992 n+=cnt;
1993 blkcnt-=cnt;
1994 blknr+=cnt;
1995 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
1996 } while (blkcnt > 0);
1997 return (n);
1998 }
1999
2000 /* ------------------------------------------------------------------------- */
2001
2002 #endif /* CONFIG_ATAPI */
2003
2004 U_BOOT_CMD(
2005 ide, 5, 1, do_ide,
2006 "IDE sub-system",
2007 "reset - reset IDE controller\n"
2008 "ide info - show available IDE devices\n"
2009 "ide device [dev] - show or set current device\n"
2010 "ide part [dev] - print partition table of one or all IDE devices\n"
2011 "ide read addr blk# cnt\n"
2012 "ide write addr blk# cnt - read/write `cnt'"
2013 " blocks starting at block `blk#'\n"
2014 " to/from memory address `addr'"
2015 );
2016
2017 U_BOOT_CMD(
2018 diskboot, 3, 1, do_diskboot,
2019 "boot from IDE device",
2020 "loadAddr dev:part"
2021 );
"Das U-Boot" Source Tree