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[people/ms/u-boot.git] / common / cmd_ide.c
1 /*
2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25 /*
26 * IDE support
27 */
28
29 #include <common.h>
30 #include <config.h>
31 #include <watchdog.h>
32 #include <command.h>
33 #include <image.h>
34 #include <asm/byteorder.h>
35 #include <asm/io.h>
36
37 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
38 # include <pcmcia.h>
39 #endif
40
41 #ifdef CONFIG_8xx
42 # include <mpc8xx.h>
43 #endif
44
45 #ifdef CONFIG_MPC5xxx
46 #include <mpc5xxx.h>
47 #endif
48
49 #include <ide.h>
50 #include <ata.h>
51
52 #ifdef CONFIG_STATUS_LED
53 # include <status_led.h>
54 #endif
55
56 #ifdef CONFIG_IDE_8xx_DIRECT
57 DECLARE_GLOBAL_DATA_PTR;
58 #endif
59
60 #ifdef __PPC__
61 # define EIEIO __asm__ volatile ("eieio")
62 # define SYNC __asm__ volatile ("sync")
63 #else
64 # define EIEIO /* nothing */
65 # define SYNC /* nothing */
66 #endif
67
68 #ifdef CONFIG_IDE_8xx_DIRECT
69 /* Timings for IDE Interface
70 *
71 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
72 * 70 165 30 PIO-Mode 0, [ns]
73 * 4 9 2 [Cycles]
74 * 50 125 20 PIO-Mode 1, [ns]
75 * 3 7 2 [Cycles]
76 * 30 100 15 PIO-Mode 2, [ns]
77 * 2 6 1 [Cycles]
78 * 30 80 10 PIO-Mode 3, [ns]
79 * 2 5 1 [Cycles]
80 * 25 70 10 PIO-Mode 4, [ns]
81 * 2 4 1 [Cycles]
82 */
83
84 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
85 {
86 /* Setup Length Hold */
87 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
88 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
89 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
90 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
91 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
92 };
93
94 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
95
96 #ifndef CONFIG_SYS_PIO_MODE
97 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
98 #endif
99 static int pio_mode = CONFIG_SYS_PIO_MODE;
100
101 /* Make clock cycles and always round up */
102
103 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
104
105 #endif /* CONFIG_IDE_8xx_DIRECT */
106
107 /* ------------------------------------------------------------------------- */
108
109 /* Current I/O Device */
110 static int curr_device = -1;
111
112 /* Current offset for IDE0 / IDE1 bus access */
113 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
114 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
115 CONFIG_SYS_ATA_IDE0_OFFSET,
116 #endif
117 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
118 CONFIG_SYS_ATA_IDE1_OFFSET,
119 #endif
120 };
121
122 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
123
124 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
125 /* ------------------------------------------------------------------------- */
126
127 #ifdef CONFIG_IDE_LED
128 # if !defined(CONFIG_BMS2003) && \
129 !defined(CONFIG_CPC45) && \
130 !defined(CONFIG_KUP4K) && \
131 !defined(CONFIG_KUP4X)
132 static void ide_led (uchar led, uchar status);
133 #else
134 extern void ide_led (uchar led, uchar status);
135 #endif
136 #else
137 #define ide_led(a,b) /* dummy */
138 #endif
139
140 #ifdef CONFIG_IDE_RESET
141 static void ide_reset (void);
142 #else
143 #define ide_reset() /* dummy */
144 #endif
145
146 static void ide_ident (block_dev_desc_t *dev_desc);
147 static uchar ide_wait (int dev, ulong t);
148
149 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
150
151 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
152
153 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
154
155 static void input_data(int dev, ulong *sect_buf, int words);
156 static void output_data(int dev, const ulong *sect_buf, int words);
157 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
158
159 #ifndef CONFIG_SYS_ATA_PORT_ADDR
160 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
161 #endif
162
163 #ifdef CONFIG_ATAPI
164 static void atapi_inquiry(block_dev_desc_t *dev_desc);
165 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
166 #endif
167
168
169 #ifdef CONFIG_IDE_8xx_DIRECT
170 static void set_pcmcia_timing (int pmode);
171 #endif
172
173 /* ------------------------------------------------------------------------- */
174
175 int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
176 {
177 int rcode = 0;
178
179 switch (argc) {
180 case 0:
181 case 1:
182 return CMD_RET_USAGE;
183 case 2:
184 if (strncmp(argv[1], "res", 3) == 0) {
185 puts("\nReset IDE"
186 #ifdef CONFIG_IDE_8xx_DIRECT
187 " on PCMCIA " PCMCIA_SLOT_MSG
188 #endif
189 ": ");
190
191 ide_init();
192 return 0;
193 } else if (strncmp(argv[1], "inf", 3) == 0) {
194 int i;
195
196 putc('\n');
197
198 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
199 if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
200 continue; /* list only known devices */
201 printf("IDE device %d: ", i);
202 dev_print(&ide_dev_desc[i]);
203 }
204 return 0;
205
206 } else if (strncmp(argv[1], "dev", 3) == 0) {
207 if ((curr_device < 0)
208 || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
209 puts("\nno IDE devices available\n");
210 return 1;
211 }
212 printf("\nIDE device %d: ", curr_device);
213 dev_print(&ide_dev_desc[curr_device]);
214 return 0;
215 } else if (strncmp(argv[1], "part", 4) == 0) {
216 int dev, ok;
217
218 for (ok = 0, dev = 0;
219 dev < CONFIG_SYS_IDE_MAXDEVICE;
220 ++dev) {
221 if (ide_dev_desc[dev].part_type !=
222 PART_TYPE_UNKNOWN) {
223 ++ok;
224 if (dev)
225 putc('\n');
226 print_part(&ide_dev_desc[dev]);
227 }
228 }
229 if (!ok) {
230 puts("\nno IDE devices available\n");
231 rcode++;
232 }
233 return rcode;
234 }
235 return CMD_RET_USAGE;
236 case 3:
237 if (strncmp(argv[1], "dev", 3) == 0) {
238 int dev = (int) simple_strtoul(argv[2], NULL, 10);
239
240 printf("\nIDE device %d: ", dev);
241 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
242 puts("unknown device\n");
243 return 1;
244 }
245 dev_print(&ide_dev_desc[dev]);
246 /*ide_print (dev); */
247
248 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
249 return 1;
250
251 curr_device = dev;
252
253 puts("... is now current device\n");
254
255 return 0;
256 } else if (strncmp(argv[1], "part", 4) == 0) {
257 int dev = (int) simple_strtoul(argv[2], NULL, 10);
258
259 if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
260 print_part(&ide_dev_desc[dev]);
261 } else {
262 printf("\nIDE device %d not available\n",
263 dev);
264 rcode = 1;
265 }
266 return rcode;
267 }
268
269 return CMD_RET_USAGE;
270 default:
271 /* at least 4 args */
272
273 if (strcmp(argv[1], "read") == 0) {
274 ulong addr = simple_strtoul(argv[2], NULL, 16);
275 ulong cnt = simple_strtoul(argv[4], NULL, 16);
276 ulong n;
277
278 #ifdef CONFIG_SYS_64BIT_LBA
279 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
280
281 printf("\nIDE read: device %d block # %lld, count %ld ... ",
282 curr_device, blk, cnt);
283 #else
284 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
285
286 printf("\nIDE read: device %d block # %ld, count %ld ... ",
287 curr_device, blk, cnt);
288 #endif
289
290 n = ide_dev_desc[curr_device].block_read(curr_device,
291 blk, cnt,
292 (ulong *)addr);
293 /* flush cache after read */
294 flush_cache(addr,
295 cnt * ide_dev_desc[curr_device].blksz);
296
297 printf("%ld blocks read: %s\n",
298 n, (n == cnt) ? "OK" : "ERROR");
299 if (n == cnt)
300 return 0;
301 else
302 return 1;
303 } else if (strcmp(argv[1], "write") == 0) {
304 ulong addr = simple_strtoul(argv[2], NULL, 16);
305 ulong cnt = simple_strtoul(argv[4], NULL, 16);
306 ulong n;
307
308 #ifdef CONFIG_SYS_64BIT_LBA
309 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
310
311 printf("\nIDE write: device %d block # %lld, count %ld ... ",
312 curr_device, blk, cnt);
313 #else
314 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
315
316 printf("\nIDE write: device %d block # %ld, count %ld ... ",
317 curr_device, blk, cnt);
318 #endif
319 n = ide_write(curr_device, blk, cnt, (ulong *) addr);
320
321 printf("%ld blocks written: %s\n",
322 n, (n == cnt) ? "OK" : "ERROR");
323 if (n == cnt)
324 return 0;
325 else
326 return 1;
327 } else {
328 return CMD_RET_USAGE;
329 }
330
331 return rcode;
332 }
333 }
334
335 int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
336 {
337 char *boot_device = NULL;
338 char *ep;
339 int dev, part = 0;
340 ulong addr, cnt;
341 disk_partition_t info;
342 image_header_t *hdr;
343
344 #if defined(CONFIG_FIT)
345 const void *fit_hdr = NULL;
346 #endif
347
348 bootstage_mark(BOOTSTAGE_ID_IDE_START);
349 switch (argc) {
350 case 1:
351 addr = CONFIG_SYS_LOAD_ADDR;
352 boot_device = getenv("bootdevice");
353 break;
354 case 2:
355 addr = simple_strtoul(argv[1], NULL, 16);
356 boot_device = getenv("bootdevice");
357 break;
358 case 3:
359 addr = simple_strtoul(argv[1], NULL, 16);
360 boot_device = argv[2];
361 break;
362 default:
363 bootstage_error(BOOTSTAGE_ID_IDE_ADDR);
364 return CMD_RET_USAGE;
365 }
366 bootstage_mark(BOOTSTAGE_ID_IDE_ADDR);
367
368 if (!boot_device) {
369 puts("\n** No boot device **\n");
370 bootstage_error(BOOTSTAGE_ID_IDE_BOOT_DEVICE);
371 return 1;
372 }
373 bootstage_mark(BOOTSTAGE_ID_IDE_BOOT_DEVICE);
374
375 dev = simple_strtoul(boot_device, &ep, 16);
376
377 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
378 printf("\n** Device %d not available\n", dev);
379 bootstage_error(BOOTSTAGE_ID_IDE_TYPE);
380 return 1;
381 }
382 bootstage_mark(BOOTSTAGE_ID_IDE_TYPE);
383
384 if (*ep) {
385 if (*ep != ':') {
386 puts("\n** Invalid boot device, use `dev[:part]' **\n");
387 bootstage_error(BOOTSTAGE_ID_IDE_PART);
388 return 1;
389 }
390 part = simple_strtoul(++ep, NULL, 16);
391 }
392 bootstage_mark(BOOTSTAGE_ID_IDE_PART);
393
394 if (get_partition_info(&ide_dev_desc[dev], part, &info)) {
395 bootstage_error(BOOTSTAGE_ID_IDE_PART_INFO);
396 return 1;
397 }
398 bootstage_mark(BOOTSTAGE_ID_IDE_PART_INFO);
399
400 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0)
401 &&
402 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)
403 ) {
404 printf("\n** Invalid partition type \"%.32s\"" " (expect \""
405 BOOT_PART_TYPE "\")\n",
406 info.type);
407 bootstage_error(BOOTSTAGE_ID_IDE_PART_TYPE);
408 return 1;
409 }
410 bootstage_mark(BOOTSTAGE_ID_IDE_PART_TYPE);
411
412 printf("\nLoading from IDE device %d, partition %d: "
413 "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type);
414
415 debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
416 info.start, info.size, info.blksz);
417
418 if (ide_dev_desc[dev].
419 block_read(dev, info.start, 1, (ulong *) addr) != 1) {
420 printf("** Read error on %d:%d\n", dev, part);
421 bootstage_error(BOOTSTAGE_ID_IDE_PART_READ);
422 return 1;
423 }
424 bootstage_mark(BOOTSTAGE_ID_IDE_PART_READ);
425
426 switch (genimg_get_format((void *) addr)) {
427 case IMAGE_FORMAT_LEGACY:
428 hdr = (image_header_t *) addr;
429
430 bootstage_mark(BOOTSTAGE_ID_IDE_FORMAT);
431
432 if (!image_check_hcrc(hdr)) {
433 puts("\n** Bad Header Checksum **\n");
434 bootstage_error(BOOTSTAGE_ID_IDE_CHECKSUM);
435 return 1;
436 }
437 bootstage_mark(BOOTSTAGE_ID_IDE_CHECKSUM);
438
439 image_print_contents(hdr);
440
441 cnt = image_get_image_size(hdr);
442 break;
443 #if defined(CONFIG_FIT)
444 case IMAGE_FORMAT_FIT:
445 fit_hdr = (const void *) addr;
446 puts("Fit image detected...\n");
447
448 cnt = fit_get_size(fit_hdr);
449 break;
450 #endif
451 default:
452 bootstage_error(BOOTSTAGE_ID_IDE_FORMAT);
453 puts("** Unknown image type\n");
454 return 1;
455 }
456
457 cnt += info.blksz - 1;
458 cnt /= info.blksz;
459 cnt -= 1;
460
461 if (ide_dev_desc[dev].block_read(dev, info.start + 1, cnt,
462 (ulong *)(addr + info.blksz)) != cnt) {
463 printf("** Read error on %d:%d\n", dev, part);
464 bootstage_error(BOOTSTAGE_ID_IDE_READ);
465 return 1;
466 }
467 bootstage_mark(BOOTSTAGE_ID_IDE_READ);
468
469 #if defined(CONFIG_FIT)
470 /* This cannot be done earlier, we need complete FIT image in RAM first */
471 if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) {
472 if (!fit_check_format(fit_hdr)) {
473 bootstage_error(BOOTSTAGE_ID_IDE_FIT_READ);
474 puts("** Bad FIT image format\n");
475 return 1;
476 }
477 bootstage_mark(BOOTSTAGE_ID_IDE_FIT_READ_OK);
478 fit_print_contents(fit_hdr);
479 }
480 #endif
481
482 /* Loading ok, update default load address */
483
484 load_addr = addr;
485
486 return bootm_maybe_autostart(cmdtp, argv[0]);
487 }
488
489 /* ------------------------------------------------------------------------- */
490
491 inline void __ide_outb(int dev, int port, unsigned char val)
492 {
493 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
494 dev, port, val,
495 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
496
497 #if defined(CONFIG_IDE_AHB)
498 if (port) {
499 /* write command */
500 ide_write_register(dev, port, val);
501 } else {
502 /* write data */
503 outb(val, (ATA_CURR_BASE(dev)));
504 }
505 #else
506 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
507 #endif
508 }
509
510 void ide_outb(int dev, int port, unsigned char val)
511 __attribute__ ((weak, alias("__ide_outb")));
512
513 inline unsigned char __ide_inb(int dev, int port)
514 {
515 uchar val;
516
517 #if defined(CONFIG_IDE_AHB)
518 val = ide_read_register(dev, port);
519 #else
520 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
521 #endif
522
523 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
524 dev, port,
525 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
526 return val;
527 }
528
529 unsigned char ide_inb(int dev, int port)
530 __attribute__ ((weak, alias("__ide_inb")));
531
532 #ifdef CONFIG_TUNE_PIO
533 inline int __ide_set_piomode(int pio_mode)
534 {
535 return 0;
536 }
537
538 inline int ide_set_piomode(int pio_mode)
539 __attribute__ ((weak, alias("__ide_set_piomode")));
540 #endif
541
542 void ide_init(void)
543 {
544
545 #ifdef CONFIG_IDE_8xx_DIRECT
546 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
547 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
548 #endif
549 unsigned char c;
550 int i, bus;
551
552 #if defined(CONFIG_SC3)
553 unsigned int ata_reset_time = ATA_RESET_TIME;
554 #endif
555 #ifdef CONFIG_IDE_8xx_PCCARD
556 extern int pcmcia_on(void);
557 extern int ide_devices_found; /* Initialized in check_ide_device() */
558 #endif /* CONFIG_IDE_8xx_PCCARD */
559
560 #ifdef CONFIG_IDE_PREINIT
561 extern int ide_preinit(void);
562
563 WATCHDOG_RESET();
564
565 if (ide_preinit()) {
566 puts("ide_preinit failed\n");
567 return;
568 }
569 #endif /* CONFIG_IDE_PREINIT */
570
571 #ifdef CONFIG_IDE_8xx_PCCARD
572 extern int pcmcia_on(void);
573 extern int ide_devices_found; /* Initialized in check_ide_device() */
574
575 WATCHDOG_RESET();
576
577 ide_devices_found = 0;
578 /* initialize the PCMCIA IDE adapter card */
579 pcmcia_on();
580 if (!ide_devices_found)
581 return;
582 udelay(1000000); /* 1 s */
583 #endif /* CONFIG_IDE_8xx_PCCARD */
584
585 WATCHDOG_RESET();
586
587 #ifdef CONFIG_IDE_8xx_DIRECT
588 /* Initialize PIO timing tables */
589 for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) {
590 pio_config_clk[i].t_setup =
591 PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk);
592 pio_config_clk[i].t_length =
593 PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
594 gd->bus_clk);
595 pio_config_clk[i].t_hold =
596 PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk);
597 debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk"
598 " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup,
599 pio_config_clk[i].t_setup, pio_config_ns[i].t_length,
600 pio_config_clk[i].t_length, pio_config_ns[i].t_hold,
601 pio_config_clk[i].t_hold);
602 }
603 #endif /* CONFIG_IDE_8xx_DIRECT */
604
605 /*
606 * Reset the IDE just to be sure.
607 * Light LED's to show
608 */
609 ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
610
611 /* ATAPI Drives seems to need a proper IDE Reset */
612 ide_reset();
613
614 #ifdef CONFIG_IDE_8xx_DIRECT
615 /* PCMCIA / IDE initialization for common mem space */
616 pcmp->pcmc_pgcrb = 0;
617
618 /* start in PIO mode 0 - most relaxed timings */
619 pio_mode = 0;
620 set_pcmcia_timing(pio_mode);
621 #endif /* CONFIG_IDE_8xx_DIRECT */
622
623 /*
624 * Wait for IDE to get ready.
625 * According to spec, this can take up to 31 seconds!
626 */
627 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
628 int dev =
629 bus * (CONFIG_SYS_IDE_MAXDEVICE /
630 CONFIG_SYS_IDE_MAXBUS);
631
632 #ifdef CONFIG_IDE_8xx_PCCARD
633 /* Skip non-ide devices from probing */
634 if ((ide_devices_found & (1 << bus)) == 0) {
635 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
636 continue;
637 }
638 #endif
639 printf("Bus %d: ", bus);
640
641 ide_bus_ok[bus] = 0;
642
643 /* Select device
644 */
645 udelay(100000); /* 100 ms */
646 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
647 udelay(100000); /* 100 ms */
648 i = 0;
649 do {
650 udelay(10000); /* 10 ms */
651
652 c = ide_inb(dev, ATA_STATUS);
653 i++;
654 #if defined(CONFIG_SC3)
655 if (i > (ata_reset_time * 100)) {
656 #else
657 if (i > (ATA_RESET_TIME * 100)) {
658 #endif
659 puts("** Timeout **\n");
660 /* LED's off */
661 ide_led((LED_IDE1 | LED_IDE2), 0);
662 return;
663 }
664 if ((i >= 100) && ((i % 100) == 0))
665 putc('.');
666
667 } while (c & ATA_STAT_BUSY);
668
669 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
670 puts("not available ");
671 debug("Status = 0x%02X ", c);
672 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
673 } else if ((c & ATA_STAT_READY) == 0) {
674 puts("not available ");
675 debug("Status = 0x%02X ", c);
676 #endif
677 } else {
678 puts("OK ");
679 ide_bus_ok[bus] = 1;
680 }
681 WATCHDOG_RESET();
682 }
683
684 putc('\n');
685
686 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
687
688 curr_device = -1;
689 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
690 #ifdef CONFIG_IDE_LED
691 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
692 #endif
693 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
694 ide_dev_desc[i].if_type = IF_TYPE_IDE;
695 ide_dev_desc[i].dev = i;
696 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
697 ide_dev_desc[i].blksz = 0;
698 ide_dev_desc[i].lba = 0;
699 ide_dev_desc[i].block_read = ide_read;
700 ide_dev_desc[i].block_write = ide_write;
701 if (!ide_bus_ok[IDE_BUS(i)])
702 continue;
703 ide_led(led, 1); /* LED on */
704 ide_ident(&ide_dev_desc[i]);
705 ide_led(led, 0); /* LED off */
706 dev_print(&ide_dev_desc[i]);
707
708 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
709 /* initialize partition type */
710 init_part(&ide_dev_desc[i]);
711 if (curr_device < 0)
712 curr_device = i;
713 }
714 }
715 WATCHDOG_RESET();
716 }
717
718 /* ------------------------------------------------------------------------- */
719
720 #ifdef CONFIG_PARTITIONS
721 block_dev_desc_t *ide_get_dev(int dev)
722 {
723 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
724 }
725 #endif
726
727
728 #ifdef CONFIG_IDE_8xx_DIRECT
729
730 static void set_pcmcia_timing(int pmode)
731 {
732 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
733 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
734 ulong timings;
735
736 debug("Set timing for PIO Mode %d\n", pmode);
737
738 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
739 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
740 | PCMCIA_SL(pio_config_clk[pmode].t_length);
741
742 /*
743 * IDE 0
744 */
745 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
746 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
747 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
748 | timings
749 #endif
750 ;
751 debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
752
753 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
754 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
755 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
756 | timings
757 #endif
758 ;
759 debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
760
761 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
762 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
763 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
764 | timings
765 #endif
766 ;
767 debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
768
769 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
770 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
771 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
772 | timings
773 #endif
774 ;
775 debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
776
777 /*
778 * IDE 1
779 */
780 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
781 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
782 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
783 | timings
784 #endif
785 ;
786 debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
787
788 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
789 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
790 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
791 | timings
792 #endif
793 ;
794 debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
795
796 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
797 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
798 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
799 | timings
800 #endif
801 ;
802 debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
803
804 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
805 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
806 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
807 | timings
808 #endif
809 ;
810 debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
811
812 }
813
814 #endif /* CONFIG_IDE_8xx_DIRECT */
815
816 /* ------------------------------------------------------------------------- */
817
818 /* We only need to swap data if we are running on a big endian cpu. */
819 /* But Au1x00 cpu:s already swaps data in big endian mode! */
820 #if defined(__LITTLE_ENDIAN) || \
821 (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
822 #define input_swap_data(x,y,z) input_data(x,y,z)
823 #else
824 static void input_swap_data(int dev, ulong *sect_buf, int words)
825 {
826 #if defined(CONFIG_CPC45)
827 uchar i;
828 volatile uchar *pbuf_even =
829 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
830 volatile uchar *pbuf_odd =
831 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
832 ushort *dbuf = (ushort *) sect_buf;
833
834 while (words--) {
835 for (i = 0; i < 2; i++) {
836 *(((uchar *) (dbuf)) + 1) = *pbuf_even;
837 *(uchar *) dbuf = *pbuf_odd;
838 dbuf += 1;
839 }
840 }
841 #else
842 volatile ushort *pbuf =
843 (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
844 ushort *dbuf = (ushort *) sect_buf;
845
846 debug("in input swap data base for read is %lx\n",
847 (unsigned long) pbuf);
848
849 while (words--) {
850 #ifdef __MIPS__
851 *dbuf++ = swab16p((u16 *) pbuf);
852 *dbuf++ = swab16p((u16 *) pbuf);
853 #elif defined(CONFIG_PCS440EP)
854 *dbuf++ = *pbuf;
855 *dbuf++ = *pbuf;
856 #else
857 *dbuf++ = ld_le16(pbuf);
858 *dbuf++ = ld_le16(pbuf);
859 #endif /* !MIPS */
860 }
861 #endif
862 }
863 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
864
865
866 #if defined(CONFIG_IDE_SWAP_IO)
867 static void output_data(int dev, const ulong *sect_buf, int words)
868 {
869 #if defined(CONFIG_CPC45)
870 uchar *dbuf;
871 volatile uchar *pbuf_even;
872 volatile uchar *pbuf_odd;
873
874 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
875 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
876 dbuf = (uchar *) sect_buf;
877 while (words--) {
878 EIEIO;
879 *pbuf_even = *dbuf++;
880 EIEIO;
881 *pbuf_odd = *dbuf++;
882 EIEIO;
883 *pbuf_even = *dbuf++;
884 EIEIO;
885 *pbuf_odd = *dbuf++;
886 }
887 #else
888 ushort *dbuf;
889 volatile ushort *pbuf;
890
891 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
892 dbuf = (ushort *) sect_buf;
893 while (words--) {
894 #if defined(CONFIG_PCS440EP)
895 /* not tested, because CF was write protected */
896 EIEIO;
897 *pbuf = ld_le16(dbuf++);
898 EIEIO;
899 *pbuf = ld_le16(dbuf++);
900 #else
901 EIEIO;
902 *pbuf = *dbuf++;
903 EIEIO;
904 *pbuf = *dbuf++;
905 #endif
906 }
907 #endif
908 }
909 #else /* ! CONFIG_IDE_SWAP_IO */
910 static void output_data(int dev, const ulong *sect_buf, int words)
911 {
912 #if defined(CONFIG_IDE_AHB)
913 ide_write_data(dev, sect_buf, words);
914 #else
915 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
916 #endif
917 }
918 #endif /* CONFIG_IDE_SWAP_IO */
919
920 #if defined(CONFIG_IDE_SWAP_IO)
921 static void input_data(int dev, ulong *sect_buf, int words)
922 {
923 #if defined(CONFIG_CPC45)
924 uchar *dbuf;
925 volatile uchar *pbuf_even;
926 volatile uchar *pbuf_odd;
927
928 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
929 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
930 dbuf = (uchar *) sect_buf;
931 while (words--) {
932 *dbuf++ = *pbuf_even;
933 EIEIO;
934 SYNC;
935 *dbuf++ = *pbuf_odd;
936 EIEIO;
937 SYNC;
938 *dbuf++ = *pbuf_even;
939 EIEIO;
940 SYNC;
941 *dbuf++ = *pbuf_odd;
942 EIEIO;
943 SYNC;
944 }
945 #else
946 ushort *dbuf;
947 volatile ushort *pbuf;
948
949 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
950 dbuf = (ushort *) sect_buf;
951
952 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
953
954 while (words--) {
955 #if defined(CONFIG_PCS440EP)
956 EIEIO;
957 *dbuf++ = ld_le16(pbuf);
958 EIEIO;
959 *dbuf++ = ld_le16(pbuf);
960 #else
961 EIEIO;
962 *dbuf++ = *pbuf;
963 EIEIO;
964 *dbuf++ = *pbuf;
965 #endif
966 }
967 #endif
968 }
969 #else /* ! CONFIG_IDE_SWAP_IO */
970 static void input_data(int dev, ulong *sect_buf, int words)
971 {
972 #if defined(CONFIG_IDE_AHB)
973 ide_read_data(dev, sect_buf, words);
974 #else
975 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
976 #endif
977 }
978
979 #endif /* CONFIG_IDE_SWAP_IO */
980
981 /* -------------------------------------------------------------------------
982 */
983 static void ide_ident(block_dev_desc_t *dev_desc)
984 {
985 unsigned char c;
986 hd_driveid_t iop;
987
988 #ifdef CONFIG_ATAPI
989 int retries = 0;
990 #endif
991
992 #ifdef CONFIG_TUNE_PIO
993 int pio_mode;
994 #endif
995
996 #if 0
997 int mode, cycle_time;
998 #endif
999 int device;
1000
1001 device = dev_desc->dev;
1002 printf(" Device %d: ", device);
1003
1004 ide_led(DEVICE_LED(device), 1); /* LED on */
1005 /* Select device
1006 */
1007 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1008 dev_desc->if_type = IF_TYPE_IDE;
1009 #ifdef CONFIG_ATAPI
1010
1011 retries = 0;
1012
1013 /* Warning: This will be tricky to read */
1014 while (retries <= 1) {
1015 /* check signature */
1016 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
1017 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
1018 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
1019 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
1020 /* ATAPI Signature found */
1021 dev_desc->if_type = IF_TYPE_ATAPI;
1022 /*
1023 * Start Ident Command
1024 */
1025 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
1026 /*
1027 * Wait for completion - ATAPI devices need more time
1028 * to become ready
1029 */
1030 c = ide_wait(device, ATAPI_TIME_OUT);
1031 } else
1032 #endif
1033 {
1034 /*
1035 * Start Ident Command
1036 */
1037 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
1038
1039 /*
1040 * Wait for completion
1041 */
1042 c = ide_wait(device, IDE_TIME_OUT);
1043 }
1044 ide_led(DEVICE_LED(device), 0); /* LED off */
1045
1046 if (((c & ATA_STAT_DRQ) == 0) ||
1047 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
1048 #ifdef CONFIG_ATAPI
1049 {
1050 /*
1051 * Need to soft reset the device
1052 * in case it's an ATAPI...
1053 */
1054 debug("Retrying...\n");
1055 ide_outb(device, ATA_DEV_HD,
1056 ATA_LBA | ATA_DEVICE(device));
1057 udelay(100000);
1058 ide_outb(device, ATA_COMMAND, 0x08);
1059 udelay(500000); /* 500 ms */
1060 }
1061 /*
1062 * Select device
1063 */
1064 ide_outb(device, ATA_DEV_HD,
1065 ATA_LBA | ATA_DEVICE(device));
1066 retries++;
1067 #else
1068 return;
1069 #endif
1070 }
1071 #ifdef CONFIG_ATAPI
1072 else
1073 break;
1074 } /* see above - ugly to read */
1075
1076 if (retries == 2) /* Not found */
1077 return;
1078 #endif
1079
1080 input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
1081
1082 ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
1083 sizeof(dev_desc->revision));
1084 ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
1085 sizeof(dev_desc->vendor));
1086 ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
1087 sizeof(dev_desc->product));
1088 #ifdef __LITTLE_ENDIAN
1089 /*
1090 * firmware revision, model, and serial number have Big Endian Byte
1091 * order in Word. Convert all three to little endian.
1092 *
1093 * See CF+ and CompactFlash Specification Revision 2.0:
1094 * 6.2.1.6: Identify Drive, Table 39 for more details
1095 */
1096
1097 strswab(dev_desc->revision);
1098 strswab(dev_desc->vendor);
1099 strswab(dev_desc->product);
1100 #endif /* __LITTLE_ENDIAN */
1101
1102 if ((iop.config & 0x0080) == 0x0080)
1103 dev_desc->removable = 1;
1104 else
1105 dev_desc->removable = 0;
1106
1107 #ifdef CONFIG_TUNE_PIO
1108 /* Mode 0 - 2 only, are directly determined by word 51. */
1109 pio_mode = iop.tPIO;
1110 if (pio_mode > 2) {
1111 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1112 /* Force it to dead slow, and hope for the best... */
1113 pio_mode = 0;
1114 }
1115
1116 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1117 * shall set bit 1 of word 53 to one and support the fields contained
1118 * in words 64 through 70.
1119 */
1120 if (iop.field_valid & 0x02) {
1121 /*
1122 * Mode 3 and above are possible. Check in order from slow
1123 * to fast, so we wind up with the highest mode allowed.
1124 */
1125 if (iop.eide_pio_modes & 0x01)
1126 pio_mode = 3;
1127 if (iop.eide_pio_modes & 0x02)
1128 pio_mode = 4;
1129 if (ata_id_is_cfa((u16 *)&iop)) {
1130 if ((iop.cf_advanced_caps & 0x07) == 0x01)
1131 pio_mode = 5;
1132 if ((iop.cf_advanced_caps & 0x07) == 0x02)
1133 pio_mode = 6;
1134 }
1135 }
1136
1137 /* System-specific, depends on bus speeds, etc. */
1138 ide_set_piomode(pio_mode);
1139 #endif /* CONFIG_TUNE_PIO */
1140
1141 #if 0
1142 /*
1143 * Drive PIO mode autoselection
1144 */
1145 mode = iop.tPIO;
1146
1147 printf("tPIO = 0x%02x = %d\n", mode, mode);
1148 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1149 mode = 2;
1150 debug("Override tPIO -> 2\n");
1151 }
1152 if (iop.field_valid & 2) { /* drive implements ATA2? */
1153 debug("Drive implements ATA2\n");
1154 if (iop.capability & 8) { /* drive supports use_iordy? */
1155 cycle_time = iop.eide_pio_iordy;
1156 } else {
1157 cycle_time = iop.eide_pio;
1158 }
1159 debug("cycle time = %d\n", cycle_time);
1160 mode = 4;
1161 if (cycle_time > 120)
1162 mode = 3; /* 120 ns for PIO mode 4 */
1163 if (cycle_time > 180)
1164 mode = 2; /* 180 ns for PIO mode 3 */
1165 if (cycle_time > 240)
1166 mode = 1; /* 240 ns for PIO mode 4 */
1167 if (cycle_time > 383)
1168 mode = 0; /* 383 ns for PIO mode 4 */
1169 }
1170 printf("PIO mode to use: PIO %d\n", mode);
1171 #endif /* 0 */
1172
1173 #ifdef CONFIG_ATAPI
1174 if (dev_desc->if_type == IF_TYPE_ATAPI) {
1175 atapi_inquiry(dev_desc);
1176 return;
1177 }
1178 #endif /* CONFIG_ATAPI */
1179
1180 #ifdef __BIG_ENDIAN
1181 /* swap shorts */
1182 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
1183 #else /* ! __BIG_ENDIAN */
1184 /*
1185 * do not swap shorts on little endian
1186 *
1187 * See CF+ and CompactFlash Specification Revision 2.0:
1188 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1189 */
1190 dev_desc->lba = iop.lba_capacity;
1191 #endif /* __BIG_ENDIAN */
1192
1193 #ifdef CONFIG_LBA48
1194 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
1195 dev_desc->lba48 = 1;
1196 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
1197 ((unsigned long long) iop.lba48_capacity[1] << 16) |
1198 ((unsigned long long) iop.lba48_capacity[2] << 32) |
1199 ((unsigned long long) iop.lba48_capacity[3] << 48);
1200 } else {
1201 dev_desc->lba48 = 0;
1202 }
1203 #endif /* CONFIG_LBA48 */
1204 /* assuming HD */
1205 dev_desc->type = DEV_TYPE_HARDDISK;
1206 dev_desc->blksz = ATA_BLOCKSIZE;
1207 dev_desc->lun = 0; /* just to fill something in... */
1208
1209 #if 0 /* only used to test the powersaving mode,
1210 * if enabled, the drive goes after 5 sec
1211 * in standby mode */
1212 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1213 c = ide_wait(device, IDE_TIME_OUT);
1214 ide_outb(device, ATA_SECT_CNT, 1);
1215 ide_outb(device, ATA_LBA_LOW, 0);
1216 ide_outb(device, ATA_LBA_MID, 0);
1217 ide_outb(device, ATA_LBA_HIGH, 0);
1218 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1219 ide_outb(device, ATA_COMMAND, 0xe3);
1220 udelay(50);
1221 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1222 #endif
1223 }
1224
1225
1226 /* ------------------------------------------------------------------------- */
1227
1228 ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1229 {
1230 ulong n = 0;
1231 unsigned char c;
1232 unsigned char pwrsave = 0; /* power save */
1233
1234 #ifdef CONFIG_LBA48
1235 unsigned char lba48 = 0;
1236
1237 if (blknr & 0x0000fffff0000000ULL) {
1238 /* more than 28 bits used, use 48bit mode */
1239 lba48 = 1;
1240 }
1241 #endif
1242 debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n",
1243 device, blknr, blkcnt, (ulong) buffer);
1244
1245 ide_led(DEVICE_LED(device), 1); /* LED on */
1246
1247 /* Select device
1248 */
1249 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1250 c = ide_wait(device, IDE_TIME_OUT);
1251
1252 if (c & ATA_STAT_BUSY) {
1253 printf("IDE read: device %d not ready\n", device);
1254 goto IDE_READ_E;
1255 }
1256
1257 /* first check if the drive is in Powersaving mode, if yes,
1258 * increase the timeout value */
1259 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1260 udelay(50);
1261
1262 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1263
1264 if (c & ATA_STAT_BUSY) {
1265 printf("IDE read: device %d not ready\n", device);
1266 goto IDE_READ_E;
1267 }
1268 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1269 printf("No Powersaving mode %X\n", c);
1270 } else {
1271 c = ide_inb(device, ATA_SECT_CNT);
1272 debug("Powersaving %02X\n", c);
1273 if (c == 0)
1274 pwrsave = 1;
1275 }
1276
1277
1278 while (blkcnt-- > 0) {
1279
1280 c = ide_wait(device, IDE_TIME_OUT);
1281
1282 if (c & ATA_STAT_BUSY) {
1283 printf("IDE read: device %d not ready\n", device);
1284 break;
1285 }
1286 #ifdef CONFIG_LBA48
1287 if (lba48) {
1288 /* write high bits */
1289 ide_outb(device, ATA_SECT_CNT, 0);
1290 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1291 #ifdef CONFIG_SYS_64BIT_LBA
1292 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1293 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1294 #else
1295 ide_outb(device, ATA_LBA_MID, 0);
1296 ide_outb(device, ATA_LBA_HIGH, 0);
1297 #endif
1298 }
1299 #endif
1300 ide_outb(device, ATA_SECT_CNT, 1);
1301 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1302 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1303 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1304
1305 #ifdef CONFIG_LBA48
1306 if (lba48) {
1307 ide_outb(device, ATA_DEV_HD,
1308 ATA_LBA | ATA_DEVICE(device));
1309 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1310
1311 } else
1312 #endif
1313 {
1314 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1315 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1316 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1317 }
1318
1319 udelay(50);
1320
1321 if (pwrsave) {
1322 /* may take up to 4 sec */
1323 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1324 pwrsave = 0;
1325 } else {
1326 /* can't take over 500 ms */
1327 c = ide_wait(device, IDE_TIME_OUT);
1328 }
1329
1330 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1331 ATA_STAT_DRQ) {
1332 #if defined(CONFIG_SYS_64BIT_LBA)
1333 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1334 device, blknr, c);
1335 #else
1336 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1337 device, (ulong) blknr, c);
1338 #endif
1339 break;
1340 }
1341
1342 input_data(device, buffer, ATA_SECTORWORDS);
1343 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1344
1345 ++n;
1346 ++blknr;
1347 buffer += ATA_BLOCKSIZE;
1348 }
1349 IDE_READ_E:
1350 ide_led(DEVICE_LED(device), 0); /* LED off */
1351 return (n);
1352 }
1353
1354 /* ------------------------------------------------------------------------- */
1355
1356
1357 ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
1358 {
1359 ulong n = 0;
1360 unsigned char c;
1361
1362 #ifdef CONFIG_LBA48
1363 unsigned char lba48 = 0;
1364
1365 if (blknr & 0x0000fffff0000000ULL) {
1366 /* more than 28 bits used, use 48bit mode */
1367 lba48 = 1;
1368 }
1369 #endif
1370
1371 ide_led(DEVICE_LED(device), 1); /* LED on */
1372
1373 /* Select device
1374 */
1375 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1376
1377 while (blkcnt-- > 0) {
1378
1379 c = ide_wait(device, IDE_TIME_OUT);
1380
1381 if (c & ATA_STAT_BUSY) {
1382 printf("IDE read: device %d not ready\n", device);
1383 goto WR_OUT;
1384 }
1385 #ifdef CONFIG_LBA48
1386 if (lba48) {
1387 /* write high bits */
1388 ide_outb(device, ATA_SECT_CNT, 0);
1389 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1390 #ifdef CONFIG_SYS_64BIT_LBA
1391 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1392 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1393 #else
1394 ide_outb(device, ATA_LBA_MID, 0);
1395 ide_outb(device, ATA_LBA_HIGH, 0);
1396 #endif
1397 }
1398 #endif
1399 ide_outb(device, ATA_SECT_CNT, 1);
1400 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1401 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1402 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1403
1404 #ifdef CONFIG_LBA48
1405 if (lba48) {
1406 ide_outb(device, ATA_DEV_HD,
1407 ATA_LBA | ATA_DEVICE(device));
1408 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1409
1410 } else
1411 #endif
1412 {
1413 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1414 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1415 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1416 }
1417
1418 udelay(50);
1419
1420 /* can't take over 500 ms */
1421 c = ide_wait(device, IDE_TIME_OUT);
1422
1423 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1424 ATA_STAT_DRQ) {
1425 #if defined(CONFIG_SYS_64BIT_LBA)
1426 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1427 device, blknr, c);
1428 #else
1429 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1430 device, (ulong) blknr, c);
1431 #endif
1432 goto WR_OUT;
1433 }
1434
1435 output_data(device, buffer, ATA_SECTORWORDS);
1436 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1437 ++n;
1438 ++blknr;
1439 buffer += ATA_BLOCKSIZE;
1440 }
1441 WR_OUT:
1442 ide_led(DEVICE_LED(device), 0); /* LED off */
1443 return (n);
1444 }
1445
1446 /* ------------------------------------------------------------------------- */
1447
1448 /*
1449 * copy src to dest, skipping leading and trailing blanks and null
1450 * terminate the string
1451 * "len" is the size of available memory including the terminating '\0'
1452 */
1453 static void ident_cpy(unsigned char *dst, unsigned char *src,
1454 unsigned int len)
1455 {
1456 unsigned char *end, *last;
1457
1458 last = dst;
1459 end = src + len - 1;
1460
1461 /* reserve space for '\0' */
1462 if (len < 2)
1463 goto OUT;
1464
1465 /* skip leading white space */
1466 while ((*src) && (src < end) && (*src == ' '))
1467 ++src;
1468
1469 /* copy string, omitting trailing white space */
1470 while ((*src) && (src < end)) {
1471 *dst++ = *src;
1472 if (*src++ != ' ')
1473 last = dst;
1474 }
1475 OUT:
1476 *last = '\0';
1477 }
1478
1479 /* ------------------------------------------------------------------------- */
1480
1481 /*
1482 * Wait until Busy bit is off, or timeout (in ms)
1483 * Return last status
1484 */
1485 static uchar ide_wait(int dev, ulong t)
1486 {
1487 ulong delay = 10 * t; /* poll every 100 us */
1488 uchar c;
1489
1490 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1491 udelay(100);
1492 if (delay-- == 0)
1493 break;
1494 }
1495 return (c);
1496 }
1497
1498 /* ------------------------------------------------------------------------- */
1499
1500 #ifdef CONFIG_IDE_RESET
1501 extern void ide_set_reset(int idereset);
1502
1503 static void ide_reset(void)
1504 {
1505 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1506 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
1507 #endif
1508 int i;
1509
1510 curr_device = -1;
1511 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
1512 ide_bus_ok[i] = 0;
1513 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
1514 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1515
1516 ide_set_reset(1); /* assert reset */
1517
1518 /* the reset signal shall be asserted for et least 25 us */
1519 udelay(25);
1520
1521 WATCHDOG_RESET();
1522
1523 #ifdef CONFIG_SYS_PB_12V_ENABLE
1524 /* 12V Enable output OFF */
1525 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);
1526
1527 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1528 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1529 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1530
1531 /* wait 500 ms for the voltage to stabilize */
1532 for (i = 0; i < 500; ++i)
1533 udelay(1000);
1534
1535 /* 12V Enable output ON */
1536 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE;
1537 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1538
1539 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1540 /* configure IDE Motor voltage monitor pin as input */
1541 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1542 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1543 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1544
1545 /* wait up to 1 s for the motor voltage to stabilize */
1546 for (i = 0; i < 1000; ++i) {
1547 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1548 break;
1549 }
1550 udelay(1000);
1551 }
1552
1553 if (i == 1000) { /* Timeout */
1554 printf("\nWarning: 5V for IDE Motor missing\n");
1555 #ifdef CONFIG_STATUS_LED
1556 #ifdef STATUS_LED_YELLOW
1557 status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON);
1558 #endif
1559 #ifdef STATUS_LED_GREEN
1560 status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF);
1561 #endif
1562 #endif /* CONFIG_STATUS_LED */
1563 }
1564 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1565
1566 WATCHDOG_RESET();
1567
1568 /* de-assert RESET signal */
1569 ide_set_reset(0);
1570
1571 /* wait 250 ms */
1572 for (i = 0; i < 250; ++i)
1573 udelay(1000);
1574 }
1575
1576 #endif /* CONFIG_IDE_RESET */
1577
1578 /* ------------------------------------------------------------------------- */
1579
1580 #if defined(CONFIG_IDE_LED) && \
1581 !defined(CONFIG_CPC45) && \
1582 !defined(CONFIG_KUP4K) && \
1583 !defined(CONFIG_KUP4X)
1584
1585 static uchar led_buffer; /* Buffer for current LED status */
1586
1587 static void ide_led(uchar led, uchar status)
1588 {
1589 uchar *led_port = LED_PORT;
1590
1591 if (status) /* switch LED on */
1592 led_buffer |= led;
1593 else /* switch LED off */
1594 led_buffer &= ~led;
1595
1596 *led_port = led_buffer;
1597 }
1598
1599 #endif /* CONFIG_IDE_LED */
1600
1601 #if defined(CONFIG_OF_IDE_FIXUP)
1602 int ide_device_present(int dev)
1603 {
1604 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1605 return 0;
1606 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1607 }
1608 #endif
1609 /* ------------------------------------------------------------------------- */
1610
1611 #ifdef CONFIG_ATAPI
1612 /****************************************************************************
1613 * ATAPI Support
1614 */
1615
1616 #if defined(CONFIG_IDE_SWAP_IO)
1617 /* since ATAPI may use commands with not 4 bytes alligned length
1618 * we have our own transfer functions, 2 bytes alligned */
1619 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1620 {
1621 #if defined(CONFIG_CPC45)
1622 uchar *dbuf;
1623 volatile uchar *pbuf_even;
1624 volatile uchar *pbuf_odd;
1625
1626 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1627 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1628 while (shorts--) {
1629 EIEIO;
1630 *pbuf_even = *dbuf++;
1631 EIEIO;
1632 *pbuf_odd = *dbuf++;
1633 }
1634 #else
1635 ushort *dbuf;
1636 volatile ushort *pbuf;
1637
1638 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1639 dbuf = (ushort *) sect_buf;
1640
1641 debug("in output data shorts base for read is %lx\n",
1642 (unsigned long) pbuf);
1643
1644 while (shorts--) {
1645 EIEIO;
1646 *pbuf = *dbuf++;
1647 }
1648 #endif
1649 }
1650
1651 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1652 {
1653 #if defined(CONFIG_CPC45)
1654 uchar *dbuf;
1655 volatile uchar *pbuf_even;
1656 volatile uchar *pbuf_odd;
1657
1658 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1659 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1660 while (shorts--) {
1661 EIEIO;
1662 *dbuf++ = *pbuf_even;
1663 EIEIO;
1664 *dbuf++ = *pbuf_odd;
1665 }
1666 #else
1667 ushort *dbuf;
1668 volatile ushort *pbuf;
1669
1670 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1671 dbuf = (ushort *) sect_buf;
1672
1673 debug("in input data shorts base for read is %lx\n",
1674 (unsigned long) pbuf);
1675
1676 while (shorts--) {
1677 EIEIO;
1678 *dbuf++ = *pbuf;
1679 }
1680 #endif
1681 }
1682
1683 #else /* ! CONFIG_IDE_SWAP_IO */
1684 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1685 {
1686 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1687 }
1688
1689 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1690 {
1691 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1692 }
1693
1694 #endif /* CONFIG_IDE_SWAP_IO */
1695
1696 /*
1697 * Wait until (Status & mask) == res, or timeout (in ms)
1698 * Return last status
1699 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1700 * and then they set their DRQ Bit
1701 */
1702 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
1703 {
1704 ulong delay = 10 * t; /* poll every 100 us */
1705 uchar c;
1706
1707 /* prevents to read the status before valid */
1708 c = ide_inb(dev, ATA_DEV_CTL);
1709
1710 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1711 /* break if error occurs (doesn't make sense to wait more) */
1712 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
1713 break;
1714 udelay(100);
1715 if (delay-- == 0)
1716 break;
1717 }
1718 return (c);
1719 }
1720
1721 /*
1722 * issue an atapi command
1723 */
1724 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
1725 unsigned char *buffer, int buflen)
1726 {
1727 unsigned char c, err, mask, res;
1728 int n;
1729
1730 ide_led(DEVICE_LED(device), 1); /* LED on */
1731
1732 /* Select device
1733 */
1734 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
1735 res = 0;
1736 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1737 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1738 if ((c & mask) != res) {
1739 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
1740 c);
1741 err = 0xFF;
1742 goto AI_OUT;
1743 }
1744 /* write taskfile */
1745 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1746 ide_outb(device, ATA_SECT_CNT, 0);
1747 ide_outb(device, ATA_SECT_NUM, 0);
1748 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
1749 ide_outb(device, ATA_CYL_HIGH,
1750 (unsigned char) ((buflen >> 8) & 0xFF));
1751 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1752
1753 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
1754 udelay(50);
1755
1756 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1757 res = ATA_STAT_DRQ;
1758 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1759
1760 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1761 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
1762 device, c);
1763 err = 0xFF;
1764 goto AI_OUT;
1765 }
1766
1767 /* write command block */
1768 output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
1769
1770 /* ATAPI Command written wait for completition */
1771 udelay(5000); /* device must set bsy */
1772
1773 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1774 /*
1775 * if no data wait for DRQ = 0 BSY = 0
1776 * if data wait for DRQ = 1 BSY = 0
1777 */
1778 res = 0;
1779 if (buflen)
1780 res = ATA_STAT_DRQ;
1781 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1782 if ((c & mask) != res) {
1783 if (c & ATA_STAT_ERR) {
1784 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
1785 debug("atapi_issue 1 returned sense key %X status %02X\n",
1786 err, c);
1787 } else {
1788 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
1789 ccb[0], c);
1790 err = 0xFF;
1791 }
1792 goto AI_OUT;
1793 }
1794 n = ide_inb(device, ATA_CYL_HIGH);
1795 n <<= 8;
1796 n += ide_inb(device, ATA_CYL_LOW);
1797 if (n > buflen) {
1798 printf("ERROR, transfer bytes %d requested only %d\n", n,
1799 buflen);
1800 err = 0xff;
1801 goto AI_OUT;
1802 }
1803 if ((n == 0) && (buflen < 0)) {
1804 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
1805 err = 0xff;
1806 goto AI_OUT;
1807 }
1808 if (n != buflen) {
1809 debug("WARNING, transfer bytes %d not equal with requested %d\n",
1810 n, buflen);
1811 }
1812 if (n != 0) { /* data transfer */
1813 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
1814 /* we transfer shorts */
1815 n >>= 1;
1816 /* ok now decide if it is an in or output */
1817 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
1818 debug("Write to device\n");
1819 output_data_shorts(device, (unsigned short *) buffer,
1820 n);
1821 } else {
1822 debug("Read from device @ %p shorts %d\n", buffer, n);
1823 input_data_shorts(device, (unsigned short *) buffer,
1824 n);
1825 }
1826 }
1827 udelay(5000); /* seems that some CD ROMs need this... */
1828 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
1829 res = 0;
1830 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1831 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1832 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
1833 debug("atapi_issue 2 returned sense key %X status %X\n", err,
1834 c);
1835 } else {
1836 err = 0;
1837 }
1838 AI_OUT:
1839 ide_led(DEVICE_LED(device), 0); /* LED off */
1840 return (err);
1841 }
1842
1843 /*
1844 * sending the command to atapi_issue. If an status other than good
1845 * returns, an request_sense will be issued
1846 */
1847
1848 #define ATAPI_DRIVE_NOT_READY 100
1849 #define ATAPI_UNIT_ATTN 10
1850
1851 unsigned char atapi_issue_autoreq(int device,
1852 unsigned char *ccb,
1853 int ccblen,
1854 unsigned char *buffer, int buflen)
1855 {
1856 unsigned char sense_data[18], sense_ccb[12];
1857 unsigned char res, key, asc, ascq;
1858 int notready, unitattn;
1859
1860 unitattn = ATAPI_UNIT_ATTN;
1861 notready = ATAPI_DRIVE_NOT_READY;
1862
1863 retry:
1864 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
1865 if (res == 0)
1866 return 0; /* Ok */
1867
1868 if (res == 0xFF)
1869 return 0xFF; /* error */
1870
1871 debug("(auto_req)atapi_issue returned sense key %X\n", res);
1872
1873 memset(sense_ccb, 0, sizeof(sense_ccb));
1874 memset(sense_data, 0, sizeof(sense_data));
1875 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
1876 sense_ccb[4] = 18; /* allocation Length */
1877
1878 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
1879 key = (sense_data[2] & 0xF);
1880 asc = (sense_data[12]);
1881 ascq = (sense_data[13]);
1882
1883 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
1884 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1885 sense_data[0], key, asc, ascq);
1886
1887 if ((key == 0))
1888 return 0; /* ok device ready */
1889
1890 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
1891 if (unitattn-- > 0) {
1892 udelay(200 * 1000);
1893 goto retry;
1894 }
1895 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
1896 goto error;
1897 }
1898 if ((asc == 0x4) && (ascq == 0x1)) {
1899 /* not ready, but will be ready soon */
1900 if (notready-- > 0) {
1901 udelay(200 * 1000);
1902 goto retry;
1903 }
1904 printf("Drive not ready, tried %d times\n",
1905 ATAPI_DRIVE_NOT_READY);
1906 goto error;
1907 }
1908 if (asc == 0x3a) {
1909 debug("Media not present\n");
1910 goto error;
1911 }
1912
1913 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
1914 ascq);
1915 error:
1916 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
1917 return (0xFF);
1918 }
1919
1920
1921 static void atapi_inquiry(block_dev_desc_t *dev_desc)
1922 {
1923 unsigned char ccb[12]; /* Command descriptor block */
1924 unsigned char iobuf[64]; /* temp buf */
1925 unsigned char c;
1926 int device;
1927
1928 device = dev_desc->dev;
1929 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
1930 dev_desc->block_read = atapi_read;
1931
1932 memset(ccb, 0, sizeof(ccb));
1933 memset(iobuf, 0, sizeof(iobuf));
1934
1935 ccb[0] = ATAPI_CMD_INQUIRY;
1936 ccb[4] = 40; /* allocation Legnth */
1937 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
1938
1939 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
1940 if (c != 0)
1941 return;
1942
1943 /* copy device ident strings */
1944 ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
1945 ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
1946 ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
1947
1948 dev_desc->lun = 0;
1949 dev_desc->lba = 0;
1950 dev_desc->blksz = 0;
1951 dev_desc->type = iobuf[0] & 0x1f;
1952
1953 if ((iobuf[1] & 0x80) == 0x80)
1954 dev_desc->removable = 1;
1955 else
1956 dev_desc->removable = 0;
1957
1958 memset(ccb, 0, sizeof(ccb));
1959 memset(iobuf, 0, sizeof(iobuf));
1960 ccb[0] = ATAPI_CMD_START_STOP;
1961 ccb[4] = 0x03; /* start */
1962
1963 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1964
1965 debug("ATAPI_CMD_START_STOP returned %x\n", c);
1966 if (c != 0)
1967 return;
1968
1969 memset(ccb, 0, sizeof(ccb));
1970 memset(iobuf, 0, sizeof(iobuf));
1971 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1972
1973 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
1974 if (c != 0)
1975 return;
1976
1977 memset(ccb, 0, sizeof(ccb));
1978 memset(iobuf, 0, sizeof(iobuf));
1979 ccb[0] = ATAPI_CMD_READ_CAP;
1980 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
1981 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
1982 if (c != 0)
1983 return;
1984
1985 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1986 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
1987 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
1988
1989 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
1990 ((unsigned long) iobuf[1] << 16) +
1991 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
1992 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
1993 ((unsigned long) iobuf[5] << 16) +
1994 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
1995 #ifdef CONFIG_LBA48
1996 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1997 dev_desc->lba48 = 0;
1998 #endif
1999 return;
2000 }
2001
2002
2003 /*
2004 * atapi_read:
2005 * we transfer only one block per command, since the multiple DRQ per
2006 * command is not yet implemented
2007 */
2008 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2009 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2010 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
2011
2012 ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
2013 {
2014 ulong n = 0;
2015 unsigned char ccb[12]; /* Command descriptor block */
2016 ulong cnt;
2017
2018 debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
2019 device, blknr, blkcnt, (ulong) buffer);
2020
2021 do {
2022 if (blkcnt > ATAPI_READ_MAX_BLOCK)
2023 cnt = ATAPI_READ_MAX_BLOCK;
2024 else
2025 cnt = blkcnt;
2026
2027 ccb[0] = ATAPI_CMD_READ_12;
2028 ccb[1] = 0; /* reserved */
2029 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
2030 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
2031 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
2032 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
2033 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
2034 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
2035 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
2036 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
2037 ccb[10] = 0; /* reserved */
2038 ccb[11] = 0; /* reserved */
2039
2040 if (atapi_issue_autoreq(device, ccb, 12,
2041 (unsigned char *) buffer,
2042 cnt * ATAPI_READ_BLOCK_SIZE)
2043 == 0xFF) {
2044 return (n);
2045 }
2046 n += cnt;
2047 blkcnt -= cnt;
2048 blknr += cnt;
2049 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
2050 } while (blkcnt > 0);
2051 return (n);
2052 }
2053
2054 /* ------------------------------------------------------------------------- */
2055
2056 #endif /* CONFIG_ATAPI */
2057
2058 U_BOOT_CMD(ide, 5, 1, do_ide,
2059 "IDE sub-system",
2060 "reset - reset IDE controller\n"
2061 "ide info - show available IDE devices\n"
2062 "ide device [dev] - show or set current device\n"
2063 "ide part [dev] - print partition table of one or all IDE devices\n"
2064 "ide read addr blk# cnt\n"
2065 "ide write addr blk# cnt - read/write `cnt'"
2066 " blocks starting at block `blk#'\n"
2067 " to/from memory address `addr'");
2068
2069 U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
2070 "boot from IDE device", "loadAddr dev:part");
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