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cmd_ide: enhance new feature "CONFIG_IDE_AHB"
[people/ms/u-boot.git] / common / cmd_ide.c
1 /*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25 /*
26 * IDE support
27 */
28
29 #include <common.h>
30 #include <config.h>
31 #include <watchdog.h>
32 #include <command.h>
33 #include <image.h>
34 #include <asm/byteorder.h>
35 #include <asm/io.h>
36
37 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
38 # include <pcmcia.h>
39 #endif
40
41 #ifdef CONFIG_8xx
42 # include <mpc8xx.h>
43 #endif
44
45 #ifdef CONFIG_MPC5xxx
46 #include <mpc5xxx.h>
47 #endif
48
49 #ifdef CONFIG_ORION5X
50 #include <asm/arch/orion5x.h>
51 #elif defined CONFIG_KIRKWOOD
52 #include <asm/arch/kirkwood.h>
53 #endif
54
55 #include <ide.h>
56 #include <ata.h>
57
58 #ifdef CONFIG_STATUS_LED
59 # include <status_led.h>
60 #endif
61
62 #ifdef CONFIG_IDE_8xx_DIRECT
63 DECLARE_GLOBAL_DATA_PTR;
64 #endif
65
66 #ifdef __PPC__
67 # define EIEIO __asm__ volatile ("eieio")
68 # define SYNC __asm__ volatile ("sync")
69 #else
70 # define EIEIO /* nothing */
71 # define SYNC /* nothing */
72 #endif
73
74 #ifdef CONFIG_IDE_8xx_DIRECT
75 /* Timings for IDE Interface
76 *
77 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
78 * 70 165 30 PIO-Mode 0, [ns]
79 * 4 9 2 [Cycles]
80 * 50 125 20 PIO-Mode 1, [ns]
81 * 3 7 2 [Cycles]
82 * 30 100 15 PIO-Mode 2, [ns]
83 * 2 6 1 [Cycles]
84 * 30 80 10 PIO-Mode 3, [ns]
85 * 2 5 1 [Cycles]
86 * 25 70 10 PIO-Mode 4, [ns]
87 * 2 4 1 [Cycles]
88 */
89
90 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
91 {
92 /* Setup Length Hold */
93 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
94 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
95 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
96 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
97 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
98 };
99
100 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
101
102 #ifndef CONFIG_SYS_PIO_MODE
103 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
104 #endif
105 static int pio_mode = CONFIG_SYS_PIO_MODE;
106
107 /* Make clock cycles and always round up */
108
109 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
110
111 #endif /* CONFIG_IDE_8xx_DIRECT */
112
113 /* ------------------------------------------------------------------------- */
114
115 /* Current I/O Device */
116 static int curr_device = -1;
117
118 /* Current offset for IDE0 / IDE1 bus access */
119 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
120 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
121 CONFIG_SYS_ATA_IDE0_OFFSET,
122 #endif
123 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
124 CONFIG_SYS_ATA_IDE1_OFFSET,
125 #endif
126 };
127
128
129 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
130
131 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
132 /* ------------------------------------------------------------------------- */
133
134 #ifdef CONFIG_IDE_LED
135 # if !defined(CONFIG_BMS2003) && \
136 !defined(CONFIG_CPC45) && \
137 !defined(CONFIG_KUP4K) && \
138 !defined(CONFIG_KUP4X)
139 static void ide_led (uchar led, uchar status);
140 #else
141 extern void ide_led (uchar led, uchar status);
142 #endif
143 #else
144 #define ide_led(a,b) /* dummy */
145 #endif
146
147 #ifdef CONFIG_IDE_RESET
148 static void ide_reset (void);
149 #else
150 #define ide_reset() /* dummy */
151 #endif
152
153 static void ide_ident (block_dev_desc_t *dev_desc);
154 static uchar ide_wait (int dev, ulong t);
155
156 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
157
158 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
159
160 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
161
162 static void input_data(int dev, ulong *sect_buf, int words);
163 static void output_data(int dev, ulong *sect_buf, int words);
164 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
165
166 #ifndef CONFIG_SYS_ATA_PORT_ADDR
167 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
168 #endif
169
170 #ifdef CONFIG_ATAPI
171 static void atapi_inquiry(block_dev_desc_t *dev_desc);
172 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
173 #endif
174
175
176 #ifdef CONFIG_IDE_8xx_DIRECT
177 static void set_pcmcia_timing (int pmode);
178 #endif
179
180 /* ------------------------------------------------------------------------- */
181
182 int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
183 {
184 int rcode = 0;
185
186 switch (argc) {
187 case 0:
188 case 1:
189 return cmd_usage(cmdtp);
190 case 2:
191 if (strncmp(argv[1],"res",3) == 0) {
192 puts ("\nReset IDE"
193 #ifdef CONFIG_IDE_8xx_DIRECT
194 " on PCMCIA " PCMCIA_SLOT_MSG
195 #endif
196 ": ");
197
198 ide_init ();
199 return 0;
200 } else if (strncmp(argv[1],"inf",3) == 0) {
201 int i;
202
203 putc ('\n');
204
205 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
206 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
207 continue; /* list only known devices */
208 printf ("IDE device %d: ", i);
209 dev_print(&ide_dev_desc[i]);
210 }
211 return 0;
212
213 } else if (strncmp(argv[1],"dev",3) == 0) {
214 if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
215 puts ("\nno IDE devices available\n");
216 return 1;
217 }
218 printf ("\nIDE device %d: ", curr_device);
219 dev_print(&ide_dev_desc[curr_device]);
220 return 0;
221 } else if (strncmp(argv[1],"part",4) == 0) {
222 int dev, ok;
223
224 for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
225 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
226 ++ok;
227 if (dev)
228 putc ('\n');
229 print_part(&ide_dev_desc[dev]);
230 }
231 }
232 if (!ok) {
233 puts ("\nno IDE devices available\n");
234 rcode ++;
235 }
236 return rcode;
237 }
238 return cmd_usage(cmdtp);
239 case 3:
240 if (strncmp(argv[1],"dev",3) == 0) {
241 int dev = (int)simple_strtoul(argv[2], NULL, 10);
242
243 printf ("\nIDE device %d: ", dev);
244 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
245 puts ("unknown device\n");
246 return 1;
247 }
248 dev_print(&ide_dev_desc[dev]);
249 /*ide_print (dev);*/
250
251 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
252 return 1;
253 }
254
255 curr_device = dev;
256
257 puts ("... is now current device\n");
258
259 return 0;
260 } else if (strncmp(argv[1],"part",4) == 0) {
261 int dev = (int)simple_strtoul(argv[2], NULL, 10);
262
263 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
264 print_part(&ide_dev_desc[dev]);
265 } else {
266 printf ("\nIDE device %d not available\n", dev);
267 rcode = 1;
268 }
269 return rcode;
270 #if 0
271 } else if (strncmp(argv[1],"pio",4) == 0) {
272 int mode = (int)simple_strtoul(argv[2], NULL, 10);
273
274 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
275 puts ("\nSetting ");
276 pio_mode = mode;
277 ide_init ();
278 } else {
279 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
280 mode, IDE_MAX_PIO_MODE);
281 }
282 return;
283 #endif
284 }
285
286 return cmd_usage(cmdtp);
287 default:
288 /* at least 4 args */
289
290 if (strcmp(argv[1],"read") == 0) {
291 ulong addr = simple_strtoul(argv[2], NULL, 16);
292 ulong cnt = simple_strtoul(argv[4], NULL, 16);
293 ulong n;
294 #ifdef CONFIG_SYS_64BIT_LBA
295 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
296
297 printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
298 curr_device, blk, cnt);
299 #else
300 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
301
302 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
303 curr_device, blk, cnt);
304 #endif
305
306 n = ide_dev_desc[curr_device].block_read (curr_device,
307 blk, cnt,
308 (ulong *)addr);
309 /* flush cache after read */
310 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
311
312 printf ("%ld blocks read: %s\n",
313 n, (n==cnt) ? "OK" : "ERROR");
314 if (n==cnt) {
315 return 0;
316 } else {
317 return 1;
318 }
319 } else if (strcmp(argv[1],"write") == 0) {
320 ulong addr = simple_strtoul(argv[2], NULL, 16);
321 ulong cnt = simple_strtoul(argv[4], NULL, 16);
322 ulong n;
323 #ifdef CONFIG_SYS_64BIT_LBA
324 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
325
326 printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
327 curr_device, blk, cnt);
328 #else
329 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
330
331 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
332 curr_device, blk, cnt);
333 #endif
334
335 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
336
337 printf ("%ld blocks written: %s\n",
338 n, (n==cnt) ? "OK" : "ERROR");
339 if (n==cnt)
340 return 0;
341 else
342 return 1;
343 } else {
344 return cmd_usage(cmdtp);
345 }
346
347 return rcode;
348 }
349 }
350
351 int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
352 {
353 char *boot_device = NULL;
354 char *ep;
355 int dev, part = 0;
356 ulong addr, cnt;
357 disk_partition_t info;
358 image_header_t *hdr;
359 int rcode = 0;
360 #if defined(CONFIG_FIT)
361 const void *fit_hdr = NULL;
362 #endif
363
364 show_boot_progress (41);
365 switch (argc) {
366 case 1:
367 addr = CONFIG_SYS_LOAD_ADDR;
368 boot_device = getenv ("bootdevice");
369 break;
370 case 2:
371 addr = simple_strtoul(argv[1], NULL, 16);
372 boot_device = getenv ("bootdevice");
373 break;
374 case 3:
375 addr = simple_strtoul(argv[1], NULL, 16);
376 boot_device = argv[2];
377 break;
378 default:
379 show_boot_progress (-42);
380 return cmd_usage(cmdtp);
381 }
382 show_boot_progress (42);
383
384 if (!boot_device) {
385 puts ("\n** No boot device **\n");
386 show_boot_progress (-43);
387 return 1;
388 }
389 show_boot_progress (43);
390
391 dev = simple_strtoul(boot_device, &ep, 16);
392
393 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
394 printf ("\n** Device %d not available\n", dev);
395 show_boot_progress (-44);
396 return 1;
397 }
398 show_boot_progress (44);
399
400 if (*ep) {
401 if (*ep != ':') {
402 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
403 show_boot_progress (-45);
404 return 1;
405 }
406 part = simple_strtoul(++ep, NULL, 16);
407 }
408 show_boot_progress (45);
409 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
410 show_boot_progress (-46);
411 return 1;
412 }
413 show_boot_progress (46);
414 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
415 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
416 printf ("\n** Invalid partition type \"%.32s\""
417 " (expect \"" BOOT_PART_TYPE "\")\n",
418 info.type);
419 show_boot_progress (-47);
420 return 1;
421 }
422 show_boot_progress (47);
423
424 printf ("\nLoading from IDE device %d, partition %d: "
425 "Name: %.32s Type: %.32s\n",
426 dev, part, info.name, info.type);
427
428 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
429 info.start, info.size, info.blksz);
430
431 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
432 printf ("** Read error on %d:%d\n", dev, part);
433 show_boot_progress (-48);
434 return 1;
435 }
436 show_boot_progress (48);
437
438 switch (genimg_get_format ((void *)addr)) {
439 case IMAGE_FORMAT_LEGACY:
440 hdr = (image_header_t *)addr;
441
442 show_boot_progress (49);
443
444 if (!image_check_hcrc (hdr)) {
445 puts ("\n** Bad Header Checksum **\n");
446 show_boot_progress (-50);
447 return 1;
448 }
449 show_boot_progress (50);
450
451 image_print_contents (hdr);
452
453 cnt = image_get_image_size (hdr);
454 break;
455 #if defined(CONFIG_FIT)
456 case IMAGE_FORMAT_FIT:
457 fit_hdr = (const void *)addr;
458 puts ("Fit image detected...\n");
459
460 cnt = fit_get_size (fit_hdr);
461 break;
462 #endif
463 default:
464 show_boot_progress (-49);
465 puts ("** Unknown image type\n");
466 return 1;
467 }
468
469 cnt += info.blksz - 1;
470 cnt /= info.blksz;
471 cnt -= 1;
472
473 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
474 (ulong *)(addr+info.blksz)) != cnt) {
475 printf ("** Read error on %d:%d\n", dev, part);
476 show_boot_progress (-51);
477 return 1;
478 }
479 show_boot_progress (51);
480
481 #if defined(CONFIG_FIT)
482 /* This cannot be done earlier, we need complete FIT image in RAM first */
483 if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
484 if (!fit_check_format (fit_hdr)) {
485 show_boot_progress (-140);
486 puts ("** Bad FIT image format\n");
487 return 1;
488 }
489 show_boot_progress (141);
490 fit_print_contents (fit_hdr);
491 }
492 #endif
493
494 /* Loading ok, update default load address */
495
496 load_addr = addr;
497
498 /* Check if we should attempt an auto-start */
499 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
500 char *local_args[2];
501
502 local_args[0] = argv[0];
503 local_args[1] = NULL;
504
505 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
506
507 do_bootm (cmdtp, 0, 1, local_args);
508 rcode = 1;
509 }
510 return rcode;
511 }
512
513 /* ------------------------------------------------------------------------- */
514
515 void inline
516 __ide_outb(int dev, int port, unsigned char val)
517 {
518 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
519 dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
520
521 #if defined(CONFIG_IDE_AHB)
522 if (port) {
523 /* write command */
524 ide_write_register(dev, port, val);
525 } else {
526 /* write data */
527 outb(val, (ATA_CURR_BASE(dev)));
528 }
529 #else
530 outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
531 #endif
532 }
533
534 void ide_outb (int dev, int port, unsigned char val)
535 __attribute__((weak, alias("__ide_outb")));
536
537 unsigned char inline
538 __ide_inb(int dev, int port)
539 {
540 uchar val;
541
542 #if defined(CONFIG_IDE_AHB)
543 val = ide_read_register(dev, port);
544 #else
545 val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
546 #endif
547
548 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
549 dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
550 return val;
551 }
552 unsigned char ide_inb(int dev, int port)
553 __attribute__((weak, alias("__ide_inb")));
554
555 #ifdef CONFIG_TUNE_PIO
556 int inline
557 __ide_set_piomode(int pio_mode)
558 {
559 return 0;
560 }
561 int inline ide_set_piomode(int pio_mode)
562 __attribute__((weak, alias("__ide_set_piomode")));
563 #endif
564
565 void ide_init (void)
566 {
567
568 #ifdef CONFIG_IDE_8xx_DIRECT
569 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
570 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
571 #endif
572 unsigned char c;
573 int i, bus;
574 #if defined(CONFIG_SC3)
575 unsigned int ata_reset_time = ATA_RESET_TIME;
576 #endif
577 #ifdef CONFIG_IDE_8xx_PCCARD
578 extern int pcmcia_on (void);
579 extern int ide_devices_found; /* Initialized in check_ide_device() */
580 #endif /* CONFIG_IDE_8xx_PCCARD */
581
582 #ifdef CONFIG_IDE_PREINIT
583 extern int ide_preinit (void);
584 WATCHDOG_RESET();
585
586 if (ide_preinit ()) {
587 puts ("ide_preinit failed\n");
588 return;
589 }
590 #endif /* CONFIG_IDE_PREINIT */
591
592 #ifdef CONFIG_IDE_8xx_PCCARD
593 extern int pcmcia_on (void);
594 extern int ide_devices_found; /* Initialized in check_ide_device() */
595
596 WATCHDOG_RESET();
597
598 ide_devices_found = 0;
599 /* initialize the PCMCIA IDE adapter card */
600 pcmcia_on();
601 if (!ide_devices_found)
602 return;
603 udelay (1000000); /* 1 s */
604 #endif /* CONFIG_IDE_8xx_PCCARD */
605
606 WATCHDOG_RESET();
607
608 #ifdef CONFIG_IDE_8xx_DIRECT
609 /* Initialize PIO timing tables */
610 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
611 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
612 gd->bus_clk);
613 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
614 gd->bus_clk);
615 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
616 gd->bus_clk);
617 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
618 " len=%3d ns/%d clk"
619 " hold=%2d ns/%d clk\n",
620 i,
621 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
622 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
623 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
624 }
625 #endif /* CONFIG_IDE_8xx_DIRECT */
626
627 /* Reset the IDE just to be sure.
628 * Light LED's to show
629 */
630 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
631 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
632
633 #ifdef CONFIG_IDE_8xx_DIRECT
634 /* PCMCIA / IDE initialization for common mem space */
635 pcmp->pcmc_pgcrb = 0;
636
637 /* start in PIO mode 0 - most relaxed timings */
638 pio_mode = 0;
639 set_pcmcia_timing (pio_mode);
640 #endif /* CONFIG_IDE_8xx_DIRECT */
641
642 /*
643 * Wait for IDE to get ready.
644 * According to spec, this can take up to 31 seconds!
645 */
646 for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
647 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
648
649 #ifdef CONFIG_IDE_8xx_PCCARD
650 /* Skip non-ide devices from probing */
651 if ((ide_devices_found & (1 << bus)) == 0) {
652 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
653 continue;
654 }
655 #endif
656 printf ("Bus %d: ", bus);
657
658 ide_bus_ok[bus] = 0;
659
660 /* Select device
661 */
662 udelay (100000); /* 100 ms */
663 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
664 udelay (100000); /* 100 ms */
665 i = 0;
666 do {
667 udelay (10000); /* 10 ms */
668
669 c = ide_inb (dev, ATA_STATUS);
670 i++;
671 #if defined(CONFIG_SC3)
672 if (i > (ata_reset_time * 100)) {
673 #else
674 if (i > (ATA_RESET_TIME * 100)) {
675 #endif
676 puts ("** Timeout **\n");
677 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
678 return;
679 }
680 if ((i >= 100) && ((i%100)==0)) {
681 putc ('.');
682 }
683 } while (c & ATA_STAT_BUSY);
684
685 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
686 puts ("not available ");
687 debug ("Status = 0x%02X ", c);
688 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
689 } else if ((c & ATA_STAT_READY) == 0) {
690 puts ("not available ");
691 debug ("Status = 0x%02X ", c);
692 #endif
693 } else {
694 puts ("OK ");
695 ide_bus_ok[bus] = 1;
696 }
697 WATCHDOG_RESET();
698 }
699
700 putc ('\n');
701
702 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
703
704 curr_device = -1;
705 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
706 #ifdef CONFIG_IDE_LED
707 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
708 #endif
709 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
710 ide_dev_desc[i].if_type=IF_TYPE_IDE;
711 ide_dev_desc[i].dev=i;
712 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
713 ide_dev_desc[i].blksz=0;
714 ide_dev_desc[i].lba=0;
715 ide_dev_desc[i].block_read=ide_read;
716 ide_dev_desc[i].block_write = ide_write;
717 if (!ide_bus_ok[IDE_BUS(i)])
718 continue;
719 ide_led (led, 1); /* LED on */
720 ide_ident(&ide_dev_desc[i]);
721 ide_led (led, 0); /* LED off */
722 dev_print(&ide_dev_desc[i]);
723 /* ide_print (i); */
724 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
725 init_part (&ide_dev_desc[i]); /* initialize partition type */
726 if (curr_device < 0)
727 curr_device = i;
728 }
729 }
730 WATCHDOG_RESET();
731 }
732
733 /* ------------------------------------------------------------------------- */
734
735 block_dev_desc_t * ide_get_dev(int dev)
736 {
737 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
738 }
739
740
741 #ifdef CONFIG_IDE_8xx_DIRECT
742
743 static void
744 set_pcmcia_timing (int pmode)
745 {
746 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
747 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
748 ulong timings;
749
750 debug ("Set timing for PIO Mode %d\n", pmode);
751
752 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
753 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
754 | PCMCIA_SL (pio_config_clk[pmode].t_length)
755 ;
756
757 /* IDE 0
758 */
759 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
760 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
761 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
762 | timings
763 #endif
764 ;
765 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
766
767 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
768 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
769 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
770 | timings
771 #endif
772 ;
773 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
774
775 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
776 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
777 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
778 | timings
779 #endif
780 ;
781 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
782
783 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
784 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
785 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
786 | timings
787 #endif
788 ;
789 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
790
791 /* IDE 1
792 */
793 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
794 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
795 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
796 | timings
797 #endif
798 ;
799 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
800
801 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
802 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
803 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
804 | timings
805 #endif
806 ;
807 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
808
809 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
810 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
811 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
812 | timings
813 #endif
814 ;
815 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
816
817 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
818 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
819 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
820 | timings
821 #endif
822 ;
823 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
824
825 }
826
827 #endif /* CONFIG_IDE_8xx_DIRECT */
828
829 /* ------------------------------------------------------------------------- */
830
831 /* We only need to swap data if we are running on a big endian cpu. */
832 /* But Au1x00 cpu:s already swaps data in big endian mode! */
833 #if defined(__LITTLE_ENDIAN) || \
834 (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
835 #define input_swap_data(x,y,z) input_data(x,y,z)
836 #else
837 static void
838 input_swap_data(int dev, ulong *sect_buf, int words)
839 {
840 #if defined(CONFIG_CPC45)
841 uchar i;
842 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
843 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
844 ushort *dbuf = (ushort *)sect_buf;
845
846 while (words--) {
847 for (i=0; i<2; i++) {
848 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
849 *(uchar *)dbuf = *pbuf_odd;
850 dbuf+=1;
851 }
852 }
853 #else
854 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
855 ushort *dbuf = (ushort *)sect_buf;
856
857 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
858
859 while (words--) {
860 #ifdef __MIPS__
861 *dbuf++ = swab16p((u16*)pbuf);
862 *dbuf++ = swab16p((u16*)pbuf);
863 #elif defined(CONFIG_PCS440EP)
864 *dbuf++ = *pbuf;
865 *dbuf++ = *pbuf;
866 #else
867 *dbuf++ = ld_le16(pbuf);
868 *dbuf++ = ld_le16(pbuf);
869 #endif /* !MIPS */
870 }
871 #endif
872 }
873 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
874
875
876 #if defined(CONFIG_IDE_SWAP_IO)
877 static void
878 output_data(int dev, ulong *sect_buf, int words)
879 {
880 #if defined(CONFIG_CPC45)
881 uchar *dbuf;
882 volatile uchar *pbuf_even;
883 volatile uchar *pbuf_odd;
884
885 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
886 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
887 dbuf = (uchar *)sect_buf;
888 while (words--) {
889 EIEIO;
890 *pbuf_even = *dbuf++;
891 EIEIO;
892 *pbuf_odd = *dbuf++;
893 EIEIO;
894 *pbuf_even = *dbuf++;
895 EIEIO;
896 *pbuf_odd = *dbuf++;
897 }
898 #else
899 ushort *dbuf;
900 volatile ushort *pbuf;
901
902 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
903 dbuf = (ushort *)sect_buf;
904 while (words--) {
905 #if defined(CONFIG_PCS440EP)
906 /* not tested, because CF was write protected */
907 EIEIO;
908 *pbuf = ld_le16(dbuf++);
909 EIEIO;
910 *pbuf = ld_le16(dbuf++);
911 #else
912 EIEIO;
913 *pbuf = *dbuf++;
914 EIEIO;
915 *pbuf = *dbuf++;
916 #endif
917 }
918 #endif
919 }
920 #else /* ! CONFIG_IDE_SWAP_IO */
921 static void
922 output_data(int dev, ulong *sect_buf, int words)
923 {
924 #if defined(CONFIG_IDE_AHB)
925 ide_write_data(dev, sect_buf, words);
926 #else
927 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
928 #endif
929 }
930 #endif /* CONFIG_IDE_SWAP_IO */
931
932 #if defined(CONFIG_IDE_SWAP_IO)
933 static void
934 input_data(int dev, ulong *sect_buf, int words)
935 {
936 #if defined(CONFIG_CPC45)
937 uchar *dbuf;
938 volatile uchar *pbuf_even;
939 volatile uchar *pbuf_odd;
940
941 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
942 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
943 dbuf = (uchar *)sect_buf;
944 while (words--) {
945 *dbuf++ = *pbuf_even;
946 EIEIO;
947 SYNC;
948 *dbuf++ = *pbuf_odd;
949 EIEIO;
950 SYNC;
951 *dbuf++ = *pbuf_even;
952 EIEIO;
953 SYNC;
954 *dbuf++ = *pbuf_odd;
955 EIEIO;
956 SYNC;
957 }
958 #else
959 ushort *dbuf;
960 volatile ushort *pbuf;
961
962 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
963 dbuf = (ushort *)sect_buf;
964
965 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
966
967 while (words--) {
968 #if defined(CONFIG_PCS440EP)
969 EIEIO;
970 *dbuf++ = ld_le16(pbuf);
971 EIEIO;
972 *dbuf++ = ld_le16(pbuf);
973 #else
974 EIEIO;
975 *dbuf++ = *pbuf;
976 EIEIO;
977 *dbuf++ = *pbuf;
978 #endif
979 }
980 #endif
981 }
982 #else /* ! CONFIG_IDE_SWAP_IO */
983 static void
984 input_data(int dev, ulong *sect_buf, int words)
985 {
986 #if defined(CONFIG_IDE_AHB)
987 ide_read_data(dev, sect_buf, words);
988 #else
989 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
990 #endif
991 }
992
993 #endif /* CONFIG_IDE_SWAP_IO */
994
995 /* -------------------------------------------------------------------------
996 */
997 static void ide_ident (block_dev_desc_t *dev_desc)
998 {
999 ulong iobuf[ATA_SECTORWORDS];
1000 unsigned char c;
1001 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1002
1003 #ifdef CONFIG_ATAPI
1004 int retries = 0;
1005 int do_retry = 0;
1006 #endif
1007
1008 #ifdef CONFIG_TUNE_PIO
1009 int pio_mode;
1010 #endif
1011
1012 #if 0
1013 int mode, cycle_time;
1014 #endif
1015 int device;
1016 device=dev_desc->dev;
1017 printf (" Device %d: ", device);
1018
1019 ide_led (DEVICE_LED(device), 1); /* LED on */
1020 /* Select device
1021 */
1022 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1023 dev_desc->if_type=IF_TYPE_IDE;
1024 #ifdef CONFIG_ATAPI
1025
1026 do_retry = 0;
1027 retries = 0;
1028
1029 /* Warning: This will be tricky to read */
1030 while (retries <= 1) {
1031 /* check signature */
1032 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1033 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1034 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1035 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
1036 /* ATAPI Signature found */
1037 dev_desc->if_type=IF_TYPE_ATAPI;
1038 /* Start Ident Command
1039 */
1040 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
1041 /*
1042 * Wait for completion - ATAPI devices need more time
1043 * to become ready
1044 */
1045 c = ide_wait (device, ATAPI_TIME_OUT);
1046 } else
1047 #endif
1048 {
1049 /* Start Ident Command
1050 */
1051 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
1052
1053 /* Wait for completion
1054 */
1055 c = ide_wait (device, IDE_TIME_OUT);
1056 }
1057 ide_led (DEVICE_LED(device), 0); /* LED off */
1058
1059 if (((c & ATA_STAT_DRQ) == 0) ||
1060 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
1061 #ifdef CONFIG_ATAPI
1062 {
1063 /* Need to soft reset the device in case it's an ATAPI... */
1064 debug ("Retrying...\n");
1065 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1066 udelay(100000);
1067 ide_outb (device, ATA_COMMAND, 0x08);
1068 udelay (500000); /* 500 ms */
1069 }
1070 /* Select device
1071 */
1072 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1073 retries++;
1074 #else
1075 return;
1076 #endif
1077 }
1078 #ifdef CONFIG_ATAPI
1079 else
1080 break;
1081 } /* see above - ugly to read */
1082
1083 if (retries == 2) /* Not found */
1084 return;
1085 #endif
1086
1087 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1088
1089 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1090 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1091 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
1092 #ifdef __LITTLE_ENDIAN
1093 /*
1094 * firmware revision, model, and serial number have Big Endian Byte
1095 * order in Word. Convert all three to little endian.
1096 *
1097 * See CF+ and CompactFlash Specification Revision 2.0:
1098 * 6.2.1.6: Identify Drive, Table 39 for more details
1099 */
1100
1101 strswab (dev_desc->revision);
1102 strswab (dev_desc->vendor);
1103 strswab (dev_desc->product);
1104 #endif /* __LITTLE_ENDIAN */
1105
1106 if ((iop->config & 0x0080)==0x0080)
1107 dev_desc->removable = 1;
1108 else
1109 dev_desc->removable = 0;
1110
1111 #ifdef CONFIG_TUNE_PIO
1112 /* Mode 0 - 2 only, are directly determined by word 51. */
1113 pio_mode = iop->tPIO;
1114 if (pio_mode > 2) {
1115 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1116 pio_mode = 0; /* Force it to dead slow, and hope for the best... */
1117 }
1118
1119 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1120 * shall set bit 1 of word 53 to one and support the fields contained
1121 * in words 64 through 70.
1122 */
1123 if (iop->field_valid & 0x02) {
1124 /* Mode 3 and above are possible. Check in order from slow
1125 * to fast, so we wind up with the highest mode allowed.
1126 */
1127 if (iop->eide_pio_modes & 0x01)
1128 pio_mode = 3;
1129 if (iop->eide_pio_modes & 0x02)
1130 pio_mode = 4;
1131 if (ata_id_is_cfa((u16 *)iop)) {
1132 if ((iop->cf_advanced_caps & 0x07) == 0x01)
1133 pio_mode = 5;
1134 if ((iop->cf_advanced_caps & 0x07) == 0x02)
1135 pio_mode = 6;
1136 }
1137 }
1138
1139 /* System-specific, depends on bus speeds, etc. */
1140 ide_set_piomode(pio_mode);
1141 #endif /* CONFIG_TUNE_PIO */
1142
1143 #if 0
1144 /*
1145 * Drive PIO mode autoselection
1146 */
1147 mode = iop->tPIO;
1148
1149 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1150 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1151 mode = 2;
1152 debug ("Override tPIO -> 2\n");
1153 }
1154 if (iop->field_valid & 2) { /* drive implements ATA2? */
1155 debug ("Drive implements ATA2\n");
1156 if (iop->capability & 8) { /* drive supports use_iordy? */
1157 cycle_time = iop->eide_pio_iordy;
1158 } else {
1159 cycle_time = iop->eide_pio;
1160 }
1161 debug ("cycle time = %d\n", cycle_time);
1162 mode = 4;
1163 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1164 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1165 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1166 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1167 }
1168 printf ("PIO mode to use: PIO %d\n", mode);
1169 #endif /* 0 */
1170
1171 #ifdef CONFIG_ATAPI
1172 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1173 atapi_inquiry(dev_desc);
1174 return;
1175 }
1176 #endif /* CONFIG_ATAPI */
1177
1178 #ifdef __BIG_ENDIAN
1179 /* swap shorts */
1180 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
1181 #else /* ! __BIG_ENDIAN */
1182 /*
1183 * do not swap shorts on little endian
1184 *
1185 * See CF+ and CompactFlash Specification Revision 2.0:
1186 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1187 */
1188 dev_desc->lba = iop->lba_capacity;
1189 #endif /* __BIG_ENDIAN */
1190
1191 #ifdef CONFIG_LBA48
1192 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
1193 dev_desc->lba48 = 1;
1194 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
1195 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1196 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1197 ((unsigned long long)iop->lba48_capacity[3] << 48);
1198 } else {
1199 dev_desc->lba48 = 0;
1200 }
1201 #endif /* CONFIG_LBA48 */
1202 /* assuming HD */
1203 dev_desc->type=DEV_TYPE_HARDDISK;
1204 dev_desc->blksz=ATA_BLOCKSIZE;
1205 dev_desc->lun=0; /* just to fill something in... */
1206
1207 #if 0 /* only used to test the powersaving mode,
1208 * if enabled, the drive goes after 5 sec
1209 * in standby mode */
1210 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1211 c = ide_wait (device, IDE_TIME_OUT);
1212 ide_outb (device, ATA_SECT_CNT, 1);
1213 ide_outb (device, ATA_LBA_LOW, 0);
1214 ide_outb (device, ATA_LBA_MID, 0);
1215 ide_outb (device, ATA_LBA_HIGH, 0);
1216 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1217 ide_outb (device, ATA_COMMAND, 0xe3);
1218 udelay (50);
1219 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1220 #endif
1221 }
1222
1223
1224 /* ------------------------------------------------------------------------- */
1225
1226 ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1227 {
1228 ulong n = 0;
1229 unsigned char c;
1230 unsigned char pwrsave=0; /* power save */
1231 #ifdef CONFIG_LBA48
1232 unsigned char lba48 = 0;
1233
1234 if (blknr & 0x0000fffff0000000ULL) {
1235 /* more than 28 bits used, use 48bit mode */
1236 lba48 = 1;
1237 }
1238 #endif
1239 debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
1240 device, blknr, blkcnt, (ulong)buffer);
1241
1242 ide_led (DEVICE_LED(device), 1); /* LED on */
1243
1244 /* Select device
1245 */
1246 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1247 c = ide_wait (device, IDE_TIME_OUT);
1248
1249 if (c & ATA_STAT_BUSY) {
1250 printf ("IDE read: device %d not ready\n", device);
1251 goto IDE_READ_E;
1252 }
1253
1254 /* first check if the drive is in Powersaving mode, if yes,
1255 * increase the timeout value */
1256 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1257 udelay (50);
1258
1259 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1260
1261 if (c & ATA_STAT_BUSY) {
1262 printf ("IDE read: device %d not ready\n", device);
1263 goto IDE_READ_E;
1264 }
1265 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1266 printf ("No Powersaving mode %X\n", c);
1267 } else {
1268 c = ide_inb(device,ATA_SECT_CNT);
1269 debug ("Powersaving %02X\n",c);
1270 if(c==0)
1271 pwrsave=1;
1272 }
1273
1274
1275 while (blkcnt-- > 0) {
1276
1277 c = ide_wait (device, IDE_TIME_OUT);
1278
1279 if (c & ATA_STAT_BUSY) {
1280 printf ("IDE read: device %d not ready\n", device);
1281 break;
1282 }
1283 #ifdef CONFIG_LBA48
1284 if (lba48) {
1285 /* write high bits */
1286 ide_outb (device, ATA_SECT_CNT, 0);
1287 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1288 #ifdef CONFIG_SYS_64BIT_LBA
1289 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1290 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1291 #else
1292 ide_outb (device, ATA_LBA_MID, 0);
1293 ide_outb (device, ATA_LBA_HIGH, 0);
1294 #endif
1295 }
1296 #endif
1297 ide_outb (device, ATA_SECT_CNT, 1);
1298 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1299 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1300 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1301
1302 #ifdef CONFIG_LBA48
1303 if (lba48) {
1304 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1305 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1306
1307 } else
1308 #endif
1309 {
1310 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1311 ATA_DEVICE(device) |
1312 ((blknr >> 24) & 0xF) );
1313 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1314 }
1315
1316 udelay (50);
1317
1318 if(pwrsave) {
1319 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1320 pwrsave=0;
1321 } else {
1322 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1323 }
1324
1325 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1326 #if defined(CONFIG_SYS_64BIT_LBA)
1327 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1328 device, blknr, c);
1329 #else
1330 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1331 device, (ulong)blknr, c);
1332 #endif
1333 break;
1334 }
1335
1336 input_data (device, buffer, ATA_SECTORWORDS);
1337 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
1338
1339 ++n;
1340 ++blknr;
1341 buffer += ATA_BLOCKSIZE;
1342 }
1343 IDE_READ_E:
1344 ide_led (DEVICE_LED(device), 0); /* LED off */
1345 return (n);
1346 }
1347
1348 /* ------------------------------------------------------------------------- */
1349
1350
1351 ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1352 {
1353 ulong n = 0;
1354 unsigned char c;
1355 #ifdef CONFIG_LBA48
1356 unsigned char lba48 = 0;
1357
1358 if (blknr & 0x0000fffff0000000ULL) {
1359 /* more than 28 bits used, use 48bit mode */
1360 lba48 = 1;
1361 }
1362 #endif
1363
1364 ide_led (DEVICE_LED(device), 1); /* LED on */
1365
1366 /* Select device
1367 */
1368 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1369
1370 while (blkcnt-- > 0) {
1371
1372 c = ide_wait (device, IDE_TIME_OUT);
1373
1374 if (c & ATA_STAT_BUSY) {
1375 printf ("IDE read: device %d not ready\n", device);
1376 goto WR_OUT;
1377 }
1378 #ifdef CONFIG_LBA48
1379 if (lba48) {
1380 /* write high bits */
1381 ide_outb (device, ATA_SECT_CNT, 0);
1382 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1383 #ifdef CONFIG_SYS_64BIT_LBA
1384 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1385 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1386 #else
1387 ide_outb (device, ATA_LBA_MID, 0);
1388 ide_outb (device, ATA_LBA_HIGH, 0);
1389 #endif
1390 }
1391 #endif
1392 ide_outb (device, ATA_SECT_CNT, 1);
1393 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1394 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1395 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1396
1397 #ifdef CONFIG_LBA48
1398 if (lba48) {
1399 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1400 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1401
1402 } else
1403 #endif
1404 {
1405 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1406 ATA_DEVICE(device) |
1407 ((blknr >> 24) & 0xF) );
1408 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1409 }
1410
1411 udelay (50);
1412
1413 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1414
1415 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1416 #if defined(CONFIG_SYS_64BIT_LBA)
1417 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1418 device, blknr, c);
1419 #else
1420 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1421 device, (ulong)blknr, c);
1422 #endif
1423 goto WR_OUT;
1424 }
1425
1426 output_data (device, buffer, ATA_SECTORWORDS);
1427 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
1428 ++n;
1429 ++blknr;
1430 buffer += ATA_BLOCKSIZE;
1431 }
1432 WR_OUT:
1433 ide_led (DEVICE_LED(device), 0); /* LED off */
1434 return (n);
1435 }
1436
1437 /* ------------------------------------------------------------------------- */
1438
1439 /*
1440 * copy src to dest, skipping leading and trailing blanks and null
1441 * terminate the string
1442 * "len" is the size of available memory including the terminating '\0'
1443 */
1444 static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
1445 {
1446 unsigned char *end, *last;
1447
1448 last = dst;
1449 end = src + len - 1;
1450
1451 /* reserve space for '\0' */
1452 if (len < 2)
1453 goto OUT;
1454
1455 /* skip leading white space */
1456 while ((*src) && (src<end) && (*src==' '))
1457 ++src;
1458
1459 /* copy string, omitting trailing white space */
1460 while ((*src) && (src<end)) {
1461 *dst++ = *src;
1462 if (*src++ != ' ')
1463 last = dst;
1464 }
1465 OUT:
1466 *last = '\0';
1467 }
1468
1469 /* ------------------------------------------------------------------------- */
1470
1471 /*
1472 * Wait until Busy bit is off, or timeout (in ms)
1473 * Return last status
1474 */
1475 static uchar ide_wait (int dev, ulong t)
1476 {
1477 ulong delay = 10 * t; /* poll every 100 us */
1478 uchar c;
1479
1480 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1481 udelay (100);
1482 if (delay-- == 0) {
1483 break;
1484 }
1485 }
1486 return (c);
1487 }
1488
1489 /* ------------------------------------------------------------------------- */
1490
1491 #ifdef CONFIG_IDE_RESET
1492 extern void ide_set_reset(int idereset);
1493
1494 static void ide_reset (void)
1495 {
1496 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1497 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
1498 #endif
1499 int i;
1500
1501 curr_device = -1;
1502 for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
1503 ide_bus_ok[i] = 0;
1504 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
1505 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1506
1507 ide_set_reset (1); /* assert reset */
1508
1509 /* the reset signal shall be asserted for et least 25 us */
1510 udelay(25);
1511
1512 WATCHDOG_RESET();
1513
1514 #ifdef CONFIG_SYS_PB_12V_ENABLE
1515 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
1516 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1517 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1518 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1519
1520 /* wait 500 ms for the voltage to stabilize
1521 */
1522 for (i=0; i<500; ++i) {
1523 udelay (1000);
1524 }
1525
1526 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
1527 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1528
1529 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1530 /* configure IDE Motor voltage monitor pin as input */
1531 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1532 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1533 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1534
1535 /* wait up to 1 s for the motor voltage to stabilize
1536 */
1537 for (i=0; i<1000; ++i) {
1538 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1539 break;
1540 }
1541 udelay (1000);
1542 }
1543
1544 if (i == 1000) { /* Timeout */
1545 printf ("\nWarning: 5V for IDE Motor missing\n");
1546 # ifdef CONFIG_STATUS_LED
1547 # ifdef STATUS_LED_YELLOW
1548 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1549 # endif
1550 # ifdef STATUS_LED_GREEN
1551 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1552 # endif
1553 # endif /* CONFIG_STATUS_LED */
1554 }
1555 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1556
1557 WATCHDOG_RESET();
1558
1559 /* de-assert RESET signal */
1560 ide_set_reset(0);
1561
1562 /* wait 250 ms */
1563 for (i=0; i<250; ++i) {
1564 udelay (1000);
1565 }
1566 }
1567
1568 #endif /* CONFIG_IDE_RESET */
1569
1570 /* ------------------------------------------------------------------------- */
1571
1572 #if defined(CONFIG_IDE_LED) && \
1573 !defined(CONFIG_CPC45) && \
1574 !defined(CONFIG_KUP4K) && \
1575 !defined(CONFIG_KUP4X)
1576
1577 static uchar led_buffer = 0; /* Buffer for current LED status */
1578
1579 static void ide_led (uchar led, uchar status)
1580 {
1581 uchar *led_port = LED_PORT;
1582
1583 if (status) { /* switch LED on */
1584 led_buffer |= led;
1585 } else { /* switch LED off */
1586 led_buffer &= ~led;
1587 }
1588
1589 *led_port = led_buffer;
1590 }
1591
1592 #endif /* CONFIG_IDE_LED */
1593
1594 #if defined(CONFIG_OF_IDE_FIXUP)
1595 int ide_device_present(int dev)
1596 {
1597 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1598 return 0;
1599 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1600 }
1601 #endif
1602 /* ------------------------------------------------------------------------- */
1603
1604 #ifdef CONFIG_ATAPI
1605 /****************************************************************************
1606 * ATAPI Support
1607 */
1608
1609 #if defined(CONFIG_IDE_SWAP_IO)
1610 /* since ATAPI may use commands with not 4 bytes alligned length
1611 * we have our own transfer functions, 2 bytes alligned */
1612 static void
1613 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1614 {
1615 #if defined(CONFIG_CPC45)
1616 uchar *dbuf;
1617 volatile uchar *pbuf_even;
1618 volatile uchar *pbuf_odd;
1619
1620 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1621 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1622 while (shorts--) {
1623 EIEIO;
1624 *pbuf_even = *dbuf++;
1625 EIEIO;
1626 *pbuf_odd = *dbuf++;
1627 }
1628 #else
1629 ushort *dbuf;
1630 volatile ushort *pbuf;
1631
1632 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1633 dbuf = (ushort *)sect_buf;
1634
1635 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
1636
1637 while (shorts--) {
1638 EIEIO;
1639 *pbuf = *dbuf++;
1640 }
1641 #endif
1642 }
1643
1644 static void
1645 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1646 {
1647 #if defined(CONFIG_CPC45)
1648 uchar *dbuf;
1649 volatile uchar *pbuf_even;
1650 volatile uchar *pbuf_odd;
1651
1652 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1653 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1654 while (shorts--) {
1655 EIEIO;
1656 *dbuf++ = *pbuf_even;
1657 EIEIO;
1658 *dbuf++ = *pbuf_odd;
1659 }
1660 #else
1661 ushort *dbuf;
1662 volatile ushort *pbuf;
1663
1664 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1665 dbuf = (ushort *)sect_buf;
1666
1667 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1668
1669 while (shorts--) {
1670 EIEIO;
1671 *dbuf++ = *pbuf;
1672 }
1673 #endif
1674 }
1675
1676 #else /* ! CONFIG_IDE_SWAP_IO */
1677 static void
1678 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1679 {
1680 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1681 }
1682
1683 static void
1684 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1685 {
1686 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1687 }
1688
1689 #endif /* CONFIG_IDE_SWAP_IO */
1690
1691 /*
1692 * Wait until (Status & mask) == res, or timeout (in ms)
1693 * Return last status
1694 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1695 * and then they set their DRQ Bit
1696 */
1697 static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1698 {
1699 ulong delay = 10 * t; /* poll every 100 us */
1700 uchar c;
1701
1702 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1703 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1704 /* break if error occurs (doesn't make sense to wait more) */
1705 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1706 break;
1707 udelay (100);
1708 if (delay-- == 0) {
1709 break;
1710 }
1711 }
1712 return (c);
1713 }
1714
1715 /*
1716 * issue an atapi command
1717 */
1718 unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1719 {
1720 unsigned char c,err,mask,res;
1721 int n;
1722 ide_led (DEVICE_LED(device), 1); /* LED on */
1723
1724 /* Select device
1725 */
1726 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1727 res = 0;
1728 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1729 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1730 if ((c & mask) != res) {
1731 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1732 err=0xFF;
1733 goto AI_OUT;
1734 }
1735 /* write taskfile */
1736 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1737 ide_outb (device, ATA_SECT_CNT, 0);
1738 ide_outb (device, ATA_SECT_NUM, 0);
1739 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
1740 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1741 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1742
1743 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
1744 udelay (50);
1745
1746 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1747 res = ATA_STAT_DRQ;
1748 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1749
1750 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1751 printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1752 err=0xFF;
1753 goto AI_OUT;
1754 }
1755
1756 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1757 /* ATAPI Command written wait for completition */
1758 udelay (5000); /* device must set bsy */
1759
1760 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1761 /* if no data wait for DRQ = 0 BSY = 0
1762 * if data wait for DRQ = 1 BSY = 0 */
1763 res=0;
1764 if(buflen)
1765 res = ATA_STAT_DRQ;
1766 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1767 if ((c & mask) != res ) {
1768 if (c & ATA_STAT_ERR) {
1769 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1770 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
1771 } else {
1772 printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1773 err=0xFF;
1774 }
1775 goto AI_OUT;
1776 }
1777 n=ide_inb(device, ATA_CYL_HIGH);
1778 n<<=8;
1779 n+=ide_inb(device, ATA_CYL_LOW);
1780 if(n>buflen) {
1781 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1782 err=0xff;
1783 goto AI_OUT;
1784 }
1785 if((n==0)&&(buflen<0)) {
1786 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1787 err=0xff;
1788 goto AI_OUT;
1789 }
1790 if(n!=buflen) {
1791 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
1792 }
1793 if(n!=0) { /* data transfer */
1794 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
1795 /* we transfer shorts */
1796 n>>=1;
1797 /* ok now decide if it is an in or output */
1798 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1799 debug ("Write to device\n");
1800 output_data_shorts(device,(unsigned short *)buffer,n);
1801 } else {
1802 debug ("Read from device @ %p shorts %d\n",buffer,n);
1803 input_data_shorts(device,(unsigned short *)buffer,n);
1804 }
1805 }
1806 udelay(5000); /* seems that some CD ROMs need this... */
1807 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1808 res=0;
1809 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1810 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1811 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1812 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
1813 } else {
1814 err = 0;
1815 }
1816 AI_OUT:
1817 ide_led (DEVICE_LED(device), 0); /* LED off */
1818 return (err);
1819 }
1820
1821 /*
1822 * sending the command to atapi_issue. If an status other than good
1823 * returns, an request_sense will be issued
1824 */
1825
1826 #define ATAPI_DRIVE_NOT_READY 100
1827 #define ATAPI_UNIT_ATTN 10
1828
1829 unsigned char atapi_issue_autoreq (int device,
1830 unsigned char* ccb,
1831 int ccblen,
1832 unsigned char *buffer,
1833 int buflen)
1834 {
1835 unsigned char sense_data[18],sense_ccb[12];
1836 unsigned char res,key,asc,ascq;
1837 int notready,unitattn;
1838
1839 unitattn=ATAPI_UNIT_ATTN;
1840 notready=ATAPI_DRIVE_NOT_READY;
1841
1842 retry:
1843 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1844 if (res==0)
1845 return (0); /* Ok */
1846
1847 if (res==0xFF)
1848 return (0xFF); /* error */
1849
1850 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
1851
1852 memset(sense_ccb,0,sizeof(sense_ccb));
1853 memset(sense_data,0,sizeof(sense_data));
1854 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
1855 sense_ccb[4]=18; /* allocation Length */
1856
1857 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1858 key=(sense_data[2]&0xF);
1859 asc=(sense_data[12]);
1860 ascq=(sense_data[13]);
1861
1862 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1863 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1864 sense_data[0],
1865 key,
1866 asc,
1867 ascq);
1868
1869 if((key==0))
1870 return 0; /* ok device ready */
1871
1872 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1873 if(unitattn-->0) {
1874 udelay(200*1000);
1875 goto retry;
1876 }
1877 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1878 goto error;
1879 }
1880 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1881 if (notready-->0) {
1882 udelay(200*1000);
1883 goto retry;
1884 }
1885 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1886 goto error;
1887 }
1888 if(asc==0x3a) {
1889 debug ("Media not present\n");
1890 goto error;
1891 }
1892
1893 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1894 error:
1895 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1896 return (0xFF);
1897 }
1898
1899
1900 static void atapi_inquiry(block_dev_desc_t * dev_desc)
1901 {
1902 unsigned char ccb[12]; /* Command descriptor block */
1903 unsigned char iobuf[64]; /* temp buf */
1904 unsigned char c;
1905 int device;
1906
1907 device=dev_desc->dev;
1908 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1909 dev_desc->block_read=atapi_read;
1910
1911 memset(ccb,0,sizeof(ccb));
1912 memset(iobuf,0,sizeof(iobuf));
1913
1914 ccb[0]=ATAPI_CMD_INQUIRY;
1915 ccb[4]=40; /* allocation Legnth */
1916 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1917
1918 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
1919 if (c!=0)
1920 return;
1921
1922 /* copy device ident strings */
1923 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1924 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1925 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
1926
1927 dev_desc->lun=0;
1928 dev_desc->lba=0;
1929 dev_desc->blksz=0;
1930 dev_desc->type=iobuf[0] & 0x1f;
1931
1932 if ((iobuf[1]&0x80)==0x80)
1933 dev_desc->removable = 1;
1934 else
1935 dev_desc->removable = 0;
1936
1937 memset(ccb,0,sizeof(ccb));
1938 memset(iobuf,0,sizeof(iobuf));
1939 ccb[0]=ATAPI_CMD_START_STOP;
1940 ccb[4]=0x03; /* start */
1941
1942 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1943
1944 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
1945 if (c!=0)
1946 return;
1947
1948 memset(ccb,0,sizeof(ccb));
1949 memset(iobuf,0,sizeof(iobuf));
1950 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1951
1952 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
1953 if (c!=0)
1954 return;
1955
1956 memset(ccb,0,sizeof(ccb));
1957 memset(iobuf,0,sizeof(iobuf));
1958 ccb[0]=ATAPI_CMD_READ_CAP;
1959 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1960 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
1961 if (c!=0)
1962 return;
1963
1964 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1965 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1966 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1967
1968 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1969 ((unsigned long)iobuf[1]<<16) +
1970 ((unsigned long)iobuf[2]<< 8) +
1971 ((unsigned long)iobuf[3]);
1972 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1973 ((unsigned long)iobuf[5]<<16) +
1974 ((unsigned long)iobuf[6]<< 8) +
1975 ((unsigned long)iobuf[7]);
1976 #ifdef CONFIG_LBA48
1977 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1978 #endif
1979 return;
1980 }
1981
1982
1983 /*
1984 * atapi_read:
1985 * we transfer only one block per command, since the multiple DRQ per
1986 * command is not yet implemented
1987 */
1988 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1989 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
1990 #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
1991
1992 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1993 {
1994 ulong n = 0;
1995 unsigned char ccb[12]; /* Command descriptor block */
1996 ulong cnt;
1997
1998 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
1999 device, blknr, blkcnt, (ulong)buffer);
2000
2001 do {
2002 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2003 cnt=ATAPI_READ_MAX_BLOCK;
2004 } else {
2005 cnt=blkcnt;
2006 }
2007 ccb[0]=ATAPI_CMD_READ_12;
2008 ccb[1]=0; /* reserved */
2009 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2010 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2011 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2012 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2013 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2014 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2015 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2016 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2017 ccb[10]=0; /* reserved */
2018 ccb[11]=0; /* reserved */
2019
2020 if (atapi_issue_autoreq(device,ccb,12,
2021 (unsigned char *)buffer,
2022 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2023 return (n);
2024 }
2025 n+=cnt;
2026 blkcnt-=cnt;
2027 blknr+=cnt;
2028 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
2029 } while (blkcnt > 0);
2030 return (n);
2031 }
2032
2033 /* ------------------------------------------------------------------------- */
2034
2035 #endif /* CONFIG_ATAPI */
2036
2037 U_BOOT_CMD(
2038 ide, 5, 1, do_ide,
2039 "IDE sub-system",
2040 "reset - reset IDE controller\n"
2041 "ide info - show available IDE devices\n"
2042 "ide device [dev] - show or set current device\n"
2043 "ide part [dev] - print partition table of one or all IDE devices\n"
2044 "ide read addr blk# cnt\n"
2045 "ide write addr blk# cnt - read/write `cnt'"
2046 " blocks starting at block `blk#'\n"
2047 " to/from memory address `addr'"
2048 );
2049
2050 U_BOOT_CMD(
2051 diskboot, 3, 1, do_diskboot,
2052 "boot from IDE device",
2053 "loadAddr dev:part"
2054 );
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