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Merge branch 'next' of git://git.denx.de/u-boot-ti into next
[people/ms/u-boot.git] / common / cmd_ide.c
1 /*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25 /*
26 * IDE support
27 */
28 #include <common.h>
29 #include <config.h>
30 #include <watchdog.h>
31 #include <command.h>
32 #include <image.h>
33 #include <asm/byteorder.h>
34 #include <asm/io.h>
35
36 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
37 # include <pcmcia.h>
38 #endif
39
40 #ifdef CONFIG_8xx
41 # include <mpc8xx.h>
42 #endif
43
44 #ifdef CONFIG_MPC5xxx
45 #include <mpc5xxx.h>
46 #endif
47
48 #include <ide.h>
49 #include <ata.h>
50
51 #ifdef CONFIG_STATUS_LED
52 # include <status_led.h>
53 #endif
54
55 #ifdef CONFIG_IDE_8xx_DIRECT
56 DECLARE_GLOBAL_DATA_PTR;
57 #endif
58
59 #ifdef __PPC__
60 # define EIEIO __asm__ volatile ("eieio")
61 # define SYNC __asm__ volatile ("sync")
62 #else
63 # define EIEIO /* nothing */
64 # define SYNC /* nothing */
65 #endif
66
67 #ifdef CONFIG_IDE_8xx_DIRECT
68 /* Timings for IDE Interface
69 *
70 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
71 * 70 165 30 PIO-Mode 0, [ns]
72 * 4 9 2 [Cycles]
73 * 50 125 20 PIO-Mode 1, [ns]
74 * 3 7 2 [Cycles]
75 * 30 100 15 PIO-Mode 2, [ns]
76 * 2 6 1 [Cycles]
77 * 30 80 10 PIO-Mode 3, [ns]
78 * 2 5 1 [Cycles]
79 * 25 70 10 PIO-Mode 4, [ns]
80 * 2 4 1 [Cycles]
81 */
82
83 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
84 {
85 /* Setup Length Hold */
86 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
87 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
88 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
89 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
90 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
91 };
92
93 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
94
95 #ifndef CONFIG_SYS_PIO_MODE
96 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
97 #endif
98 static int pio_mode = CONFIG_SYS_PIO_MODE;
99
100 /* Make clock cycles and always round up */
101
102 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
103
104 #endif /* CONFIG_IDE_8xx_DIRECT */
105
106 /* ------------------------------------------------------------------------- */
107
108 /* Current I/O Device */
109 static int curr_device = -1;
110
111 /* Current offset for IDE0 / IDE1 bus access */
112 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
113 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
114 CONFIG_SYS_ATA_IDE0_OFFSET,
115 #endif
116 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
117 CONFIG_SYS_ATA_IDE1_OFFSET,
118 #endif
119 };
120
121
122 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
123
124 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
125 /* ------------------------------------------------------------------------- */
126
127 #ifdef CONFIG_IDE_LED
128 # if !defined(CONFIG_BMS2003) && \
129 !defined(CONFIG_CPC45) && \
130 !defined(CONFIG_KUP4K) && \
131 !defined(CONFIG_KUP4X)
132 static void ide_led (uchar led, uchar status);
133 #else
134 extern void ide_led (uchar led, uchar status);
135 #endif
136 #else
137 #define ide_led(a,b) /* dummy */
138 #endif
139
140 #ifdef CONFIG_IDE_RESET
141 static void ide_reset (void);
142 #else
143 #define ide_reset() /* dummy */
144 #endif
145
146 static void ide_ident (block_dev_desc_t *dev_desc);
147 static uchar ide_wait (int dev, ulong t);
148
149 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
150
151 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
152
153 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
154
155 static void input_data(int dev, ulong *sect_buf, int words);
156 static void output_data(int dev, ulong *sect_buf, int words);
157 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
158
159 #ifndef CONFIG_SYS_ATA_PORT_ADDR
160 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
161 #endif
162
163 #ifdef CONFIG_ATAPI
164 static void atapi_inquiry(block_dev_desc_t *dev_desc);
165 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
166 #endif
167
168
169 #ifdef CONFIG_IDE_8xx_DIRECT
170 static void set_pcmcia_timing (int pmode);
171 #endif
172
173 /* ------------------------------------------------------------------------- */
174
175 int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
176 {
177 int rcode = 0;
178
179 switch (argc) {
180 case 0:
181 case 1:
182 cmd_usage(cmdtp);
183 return 1;
184 case 2:
185 if (strncmp(argv[1],"res",3) == 0) {
186 puts ("\nReset IDE"
187 #ifdef CONFIG_IDE_8xx_DIRECT
188 " on PCMCIA " PCMCIA_SLOT_MSG
189 #endif
190 ": ");
191
192 ide_init ();
193 return 0;
194 } else if (strncmp(argv[1],"inf",3) == 0) {
195 int i;
196
197 putc ('\n');
198
199 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
200 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
201 continue; /* list only known devices */
202 printf ("IDE device %d: ", i);
203 dev_print(&ide_dev_desc[i]);
204 }
205 return 0;
206
207 } else if (strncmp(argv[1],"dev",3) == 0) {
208 if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
209 puts ("\nno IDE devices available\n");
210 return 1;
211 }
212 printf ("\nIDE device %d: ", curr_device);
213 dev_print(&ide_dev_desc[curr_device]);
214 return 0;
215 } else if (strncmp(argv[1],"part",4) == 0) {
216 int dev, ok;
217
218 for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
219 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
220 ++ok;
221 if (dev)
222 putc ('\n');
223 print_part(&ide_dev_desc[dev]);
224 }
225 }
226 if (!ok) {
227 puts ("\nno IDE devices available\n");
228 rcode ++;
229 }
230 return rcode;
231 }
232 cmd_usage(cmdtp);
233 return 1;
234 case 3:
235 if (strncmp(argv[1],"dev",3) == 0) {
236 int dev = (int)simple_strtoul(argv[2], NULL, 10);
237
238 printf ("\nIDE device %d: ", dev);
239 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
240 puts ("unknown device\n");
241 return 1;
242 }
243 dev_print(&ide_dev_desc[dev]);
244 /*ide_print (dev);*/
245
246 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
247 return 1;
248 }
249
250 curr_device = dev;
251
252 puts ("... is now current device\n");
253
254 return 0;
255 } else if (strncmp(argv[1],"part",4) == 0) {
256 int dev = (int)simple_strtoul(argv[2], NULL, 10);
257
258 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
259 print_part(&ide_dev_desc[dev]);
260 } else {
261 printf ("\nIDE device %d not available\n", dev);
262 rcode = 1;
263 }
264 return rcode;
265 #if 0
266 } else if (strncmp(argv[1],"pio",4) == 0) {
267 int mode = (int)simple_strtoul(argv[2], NULL, 10);
268
269 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
270 puts ("\nSetting ");
271 pio_mode = mode;
272 ide_init ();
273 } else {
274 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
275 mode, IDE_MAX_PIO_MODE);
276 }
277 return;
278 #endif
279 }
280
281 cmd_usage(cmdtp);
282 return 1;
283 default:
284 /* at least 4 args */
285
286 if (strcmp(argv[1],"read") == 0) {
287 ulong addr = simple_strtoul(argv[2], NULL, 16);
288 ulong cnt = simple_strtoul(argv[4], NULL, 16);
289 ulong n;
290 #ifdef CONFIG_SYS_64BIT_LBA
291 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
292
293 printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
294 curr_device, blk, cnt);
295 #else
296 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
297
298 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
299 curr_device, blk, cnt);
300 #endif
301
302 n = ide_dev_desc[curr_device].block_read (curr_device,
303 blk, cnt,
304 (ulong *)addr);
305 /* flush cache after read */
306 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
307
308 printf ("%ld blocks read: %s\n",
309 n, (n==cnt) ? "OK" : "ERROR");
310 if (n==cnt) {
311 return 0;
312 } else {
313 return 1;
314 }
315 } else if (strcmp(argv[1],"write") == 0) {
316 ulong addr = simple_strtoul(argv[2], NULL, 16);
317 ulong cnt = simple_strtoul(argv[4], NULL, 16);
318 ulong n;
319 #ifdef CONFIG_SYS_64BIT_LBA
320 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
321
322 printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
323 curr_device, blk, cnt);
324 #else
325 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
326
327 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
328 curr_device, blk, cnt);
329 #endif
330
331 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
332
333 printf ("%ld blocks written: %s\n",
334 n, (n==cnt) ? "OK" : "ERROR");
335 if (n==cnt) {
336 return 0;
337 } else {
338 return 1;
339 }
340 } else {
341 cmd_usage(cmdtp);
342 rcode = 1;
343 }
344
345 return rcode;
346 }
347 }
348
349 int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
350 {
351 char *boot_device = NULL;
352 char *ep;
353 int dev, part = 0;
354 ulong addr, cnt;
355 disk_partition_t info;
356 image_header_t *hdr;
357 int rcode = 0;
358 #if defined(CONFIG_FIT)
359 const void *fit_hdr = NULL;
360 #endif
361
362 show_boot_progress (41);
363 switch (argc) {
364 case 1:
365 addr = CONFIG_SYS_LOAD_ADDR;
366 boot_device = getenv ("bootdevice");
367 break;
368 case 2:
369 addr = simple_strtoul(argv[1], NULL, 16);
370 boot_device = getenv ("bootdevice");
371 break;
372 case 3:
373 addr = simple_strtoul(argv[1], NULL, 16);
374 boot_device = argv[2];
375 break;
376 default:
377 cmd_usage(cmdtp);
378 show_boot_progress (-42);
379 return 1;
380 }
381 show_boot_progress (42);
382
383 if (!boot_device) {
384 puts ("\n** No boot device **\n");
385 show_boot_progress (-43);
386 return 1;
387 }
388 show_boot_progress (43);
389
390 dev = simple_strtoul(boot_device, &ep, 16);
391
392 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
393 printf ("\n** Device %d not available\n", dev);
394 show_boot_progress (-44);
395 return 1;
396 }
397 show_boot_progress (44);
398
399 if (*ep) {
400 if (*ep != ':') {
401 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
402 show_boot_progress (-45);
403 return 1;
404 }
405 part = simple_strtoul(++ep, NULL, 16);
406 }
407 show_boot_progress (45);
408 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
409 show_boot_progress (-46);
410 return 1;
411 }
412 show_boot_progress (46);
413 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
414 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
415 printf ("\n** Invalid partition type \"%.32s\""
416 " (expect \"" BOOT_PART_TYPE "\")\n",
417 info.type);
418 show_boot_progress (-47);
419 return 1;
420 }
421 show_boot_progress (47);
422
423 printf ("\nLoading from IDE device %d, partition %d: "
424 "Name: %.32s Type: %.32s\n",
425 dev, part, info.name, info.type);
426
427 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
428 info.start, info.size, info.blksz);
429
430 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
431 printf ("** Read error on %d:%d\n", dev, part);
432 show_boot_progress (-48);
433 return 1;
434 }
435 show_boot_progress (48);
436
437 switch (genimg_get_format ((void *)addr)) {
438 case IMAGE_FORMAT_LEGACY:
439 hdr = (image_header_t *)addr;
440
441 show_boot_progress (49);
442
443 if (!image_check_hcrc (hdr)) {
444 puts ("\n** Bad Header Checksum **\n");
445 show_boot_progress (-50);
446 return 1;
447 }
448 show_boot_progress (50);
449
450 image_print_contents (hdr);
451
452 cnt = image_get_image_size (hdr);
453 break;
454 #if defined(CONFIG_FIT)
455 case IMAGE_FORMAT_FIT:
456 fit_hdr = (const void *)addr;
457 puts ("Fit image detected...\n");
458
459 cnt = fit_get_size (fit_hdr);
460 break;
461 #endif
462 default:
463 show_boot_progress (-49);
464 puts ("** Unknown image type\n");
465 return 1;
466 }
467
468 cnt += info.blksz - 1;
469 cnt /= info.blksz;
470 cnt -= 1;
471
472 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
473 (ulong *)(addr+info.blksz)) != cnt) {
474 printf ("** Read error on %d:%d\n", dev, part);
475 show_boot_progress (-51);
476 return 1;
477 }
478 show_boot_progress (51);
479
480 #if defined(CONFIG_FIT)
481 /* This cannot be done earlier, we need complete FIT image in RAM first */
482 if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
483 if (!fit_check_format (fit_hdr)) {
484 show_boot_progress (-140);
485 puts ("** Bad FIT image format\n");
486 return 1;
487 }
488 show_boot_progress (141);
489 fit_print_contents (fit_hdr);
490 }
491 #endif
492
493 /* Loading ok, update default load address */
494
495 load_addr = addr;
496
497 /* Check if we should attempt an auto-start */
498 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
499 char *local_args[2];
500 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
501
502 local_args[0] = argv[0];
503 local_args[1] = NULL;
504
505 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
506
507 do_bootm (cmdtp, 0, 1, local_args);
508 rcode = 1;
509 }
510 return rcode;
511 }
512
513 /* ------------------------------------------------------------------------- */
514
515 void inline
516 __ide_outb(int dev, int port, unsigned char val)
517 {
518 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
519 dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
520 outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
521 }
522 void ide_outb (int dev, int port, unsigned char val)
523 __attribute__((weak, alias("__ide_outb")));
524
525 unsigned char inline
526 __ide_inb(int dev, int port)
527 {
528 uchar val;
529 val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
530 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
531 dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
532 return val;
533 }
534 unsigned char ide_inb(int dev, int port)
535 __attribute__((weak, alias("__ide_inb")));
536
537 #ifdef CONFIG_TUNE_PIO
538 int inline
539 __ide_set_piomode(int pio_mode)
540 {
541 return 0;
542 }
543 int inline ide_set_piomode(int pio_mode)
544 __attribute__((weak, alias("__ide_set_piomode")));
545 #endif
546
547 void ide_init (void)
548 {
549
550 #ifdef CONFIG_IDE_8xx_DIRECT
551 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
552 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
553 #endif
554 unsigned char c;
555 int i, bus;
556 #if defined(CONFIG_SC3)
557 unsigned int ata_reset_time = ATA_RESET_TIME;
558 char *s;
559 #endif
560 #ifdef CONFIG_IDE_8xx_PCCARD
561 extern int pcmcia_on (void);
562 extern int ide_devices_found; /* Initialized in check_ide_device() */
563 #endif /* CONFIG_IDE_8xx_PCCARD */
564
565 #ifdef CONFIG_IDE_PREINIT
566 extern int ide_preinit (void);
567 WATCHDOG_RESET();
568
569 if (ide_preinit ()) {
570 puts ("ide_preinit failed\n");
571 return;
572 }
573 #endif /* CONFIG_IDE_PREINIT */
574
575 #ifdef CONFIG_IDE_8xx_PCCARD
576 extern int pcmcia_on (void);
577 extern int ide_devices_found; /* Initialized in check_ide_device() */
578
579 WATCHDOG_RESET();
580
581 ide_devices_found = 0;
582 /* initialize the PCMCIA IDE adapter card */
583 pcmcia_on();
584 if (!ide_devices_found)
585 return;
586 udelay (1000000); /* 1 s */
587 #endif /* CONFIG_IDE_8xx_PCCARD */
588
589 WATCHDOG_RESET();
590
591 #ifdef CONFIG_IDE_8xx_DIRECT
592 /* Initialize PIO timing tables */
593 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
594 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
595 gd->bus_clk);
596 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
597 gd->bus_clk);
598 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
599 gd->bus_clk);
600 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
601 " len=%3d ns/%d clk"
602 " hold=%2d ns/%d clk\n",
603 i,
604 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
605 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
606 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
607 }
608 #endif /* CONFIG_IDE_8xx_DIRECT */
609
610 /* Reset the IDE just to be sure.
611 * Light LED's to show
612 */
613 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
614 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
615
616 #ifdef CONFIG_IDE_8xx_DIRECT
617 /* PCMCIA / IDE initialization for common mem space */
618 pcmp->pcmc_pgcrb = 0;
619
620 /* start in PIO mode 0 - most relaxed timings */
621 pio_mode = 0;
622 set_pcmcia_timing (pio_mode);
623 #endif /* CONFIG_IDE_8xx_DIRECT */
624
625 /*
626 * Wait for IDE to get ready.
627 * According to spec, this can take up to 31 seconds!
628 */
629 for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
630 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
631
632 #ifdef CONFIG_IDE_8xx_PCCARD
633 /* Skip non-ide devices from probing */
634 if ((ide_devices_found & (1 << bus)) == 0) {
635 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
636 continue;
637 }
638 #endif
639 printf ("Bus %d: ", bus);
640
641 ide_bus_ok[bus] = 0;
642
643 /* Select device
644 */
645 udelay (100000); /* 100 ms */
646 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
647 udelay (100000); /* 100 ms */
648 i = 0;
649 do {
650 udelay (10000); /* 10 ms */
651
652 c = ide_inb (dev, ATA_STATUS);
653 i++;
654 #if defined(CONFIG_SC3)
655 if (i > (ata_reset_time * 100)) {
656 #else
657 if (i > (ATA_RESET_TIME * 100)) {
658 #endif
659 puts ("** Timeout **\n");
660 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
661 return;
662 }
663 if ((i >= 100) && ((i%100)==0)) {
664 putc ('.');
665 }
666 } while (c & ATA_STAT_BUSY);
667
668 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
669 puts ("not available ");
670 debug ("Status = 0x%02X ", c);
671 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
672 } else if ((c & ATA_STAT_READY) == 0) {
673 puts ("not available ");
674 debug ("Status = 0x%02X ", c);
675 #endif
676 } else {
677 puts ("OK ");
678 ide_bus_ok[bus] = 1;
679 }
680 WATCHDOG_RESET();
681 }
682
683 putc ('\n');
684
685 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
686
687 curr_device = -1;
688 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
689 #ifdef CONFIG_IDE_LED
690 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
691 #endif
692 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
693 ide_dev_desc[i].if_type=IF_TYPE_IDE;
694 ide_dev_desc[i].dev=i;
695 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
696 ide_dev_desc[i].blksz=0;
697 ide_dev_desc[i].lba=0;
698 ide_dev_desc[i].block_read=ide_read;
699 if (!ide_bus_ok[IDE_BUS(i)])
700 continue;
701 ide_led (led, 1); /* LED on */
702 ide_ident(&ide_dev_desc[i]);
703 ide_led (led, 0); /* LED off */
704 dev_print(&ide_dev_desc[i]);
705 /* ide_print (i); */
706 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
707 init_part (&ide_dev_desc[i]); /* initialize partition type */
708 if (curr_device < 0)
709 curr_device = i;
710 }
711 }
712 WATCHDOG_RESET();
713 }
714
715 /* ------------------------------------------------------------------------- */
716
717 block_dev_desc_t * ide_get_dev(int dev)
718 {
719 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
720 }
721
722
723 #ifdef CONFIG_IDE_8xx_DIRECT
724
725 static void
726 set_pcmcia_timing (int pmode)
727 {
728 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
729 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
730 ulong timings;
731
732 debug ("Set timing for PIO Mode %d\n", pmode);
733
734 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
735 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
736 | PCMCIA_SL (pio_config_clk[pmode].t_length)
737 ;
738
739 /* IDE 0
740 */
741 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
742 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
743 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
744 | timings
745 #endif
746 ;
747 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
748
749 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
750 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
751 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
752 | timings
753 #endif
754 ;
755 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
756
757 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
758 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
759 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
760 | timings
761 #endif
762 ;
763 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
764
765 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
766 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
767 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
768 | timings
769 #endif
770 ;
771 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
772
773 /* IDE 1
774 */
775 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
776 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
777 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
778 | timings
779 #endif
780 ;
781 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
782
783 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
784 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
785 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
786 | timings
787 #endif
788 ;
789 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
790
791 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
792 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
793 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
794 | timings
795 #endif
796 ;
797 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
798
799 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
800 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
801 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
802 | timings
803 #endif
804 ;
805 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
806
807 }
808
809 #endif /* CONFIG_IDE_8xx_DIRECT */
810
811 /* ------------------------------------------------------------------------- */
812
813 /* We only need to swap data if we are running on a big endian cpu. */
814 /* But Au1x00 cpu:s already swaps data in big endian mode! */
815 #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
816 #define input_swap_data(x,y,z) input_data(x,y,z)
817 #else
818 static void
819 input_swap_data(int dev, ulong *sect_buf, int words)
820 {
821 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
822 uchar i;
823 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
824 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
825 ushort *dbuf = (ushort *)sect_buf;
826
827 while (words--) {
828 for (i=0; i<2; i++) {
829 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
830 *(uchar *)dbuf = *pbuf_odd;
831 dbuf+=1;
832 }
833 }
834 #else
835 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
836 ushort *dbuf = (ushort *)sect_buf;
837
838 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
839
840 while (words--) {
841 #ifdef __MIPS__
842 *dbuf++ = swab16p((u16*)pbuf);
843 *dbuf++ = swab16p((u16*)pbuf);
844 #elif defined(CONFIG_PCS440EP)
845 *dbuf++ = *pbuf;
846 *dbuf++ = *pbuf;
847 #else
848 *dbuf++ = ld_le16(pbuf);
849 *dbuf++ = ld_le16(pbuf);
850 #endif /* !MIPS */
851 }
852 #endif
853 }
854 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
855
856
857 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
858 static void
859 output_data(int dev, ulong *sect_buf, int words)
860 {
861 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
862 uchar *dbuf;
863 volatile uchar *pbuf_even;
864 volatile uchar *pbuf_odd;
865
866 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
867 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
868 dbuf = (uchar *)sect_buf;
869 while (words--) {
870 EIEIO;
871 *pbuf_even = *dbuf++;
872 EIEIO;
873 *pbuf_odd = *dbuf++;
874 EIEIO;
875 *pbuf_even = *dbuf++;
876 EIEIO;
877 *pbuf_odd = *dbuf++;
878 }
879 #else
880 ushort *dbuf;
881 volatile ushort *pbuf;
882
883 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
884 dbuf = (ushort *)sect_buf;
885 while (words--) {
886 #if defined(CONFIG_PCS440EP)
887 /* not tested, because CF was write protected */
888 EIEIO;
889 *pbuf = ld_le16(dbuf++);
890 EIEIO;
891 *pbuf = ld_le16(dbuf++);
892 #else
893 EIEIO;
894 *pbuf = *dbuf++;
895 EIEIO;
896 *pbuf = *dbuf++;
897 #endif
898 }
899 #endif
900 }
901 #else /* ! __PPC__ */
902 static void
903 output_data(int dev, ulong *sect_buf, int words)
904 {
905 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
906 }
907 #endif /* __PPC__ */
908
909 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
910 static void
911 input_data(int dev, ulong *sect_buf, int words)
912 {
913 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
914 uchar *dbuf;
915 volatile uchar *pbuf_even;
916 volatile uchar *pbuf_odd;
917
918 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
919 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
920 dbuf = (uchar *)sect_buf;
921 while (words--) {
922 *dbuf++ = *pbuf_even;
923 EIEIO;
924 SYNC;
925 *dbuf++ = *pbuf_odd;
926 EIEIO;
927 SYNC;
928 *dbuf++ = *pbuf_even;
929 EIEIO;
930 SYNC;
931 *dbuf++ = *pbuf_odd;
932 EIEIO;
933 SYNC;
934 }
935 #else
936 ushort *dbuf;
937 volatile ushort *pbuf;
938
939 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
940 dbuf = (ushort *)sect_buf;
941
942 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
943
944 while (words--) {
945 #if defined(CONFIG_PCS440EP)
946 EIEIO;
947 *dbuf++ = ld_le16(pbuf);
948 EIEIO;
949 *dbuf++ = ld_le16(pbuf);
950 #else
951 EIEIO;
952 *dbuf++ = *pbuf;
953 EIEIO;
954 *dbuf++ = *pbuf;
955 #endif
956 }
957 #endif
958 }
959 #else /* ! __PPC__ */
960 static void
961 input_data(int dev, ulong *sect_buf, int words)
962 {
963 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
964 }
965
966 #endif /* __PPC__ */
967
968 /* -------------------------------------------------------------------------
969 */
970 static void ide_ident (block_dev_desc_t *dev_desc)
971 {
972 ulong iobuf[ATA_SECTORWORDS];
973 unsigned char c;
974 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
975
976 #ifdef CONFIG_ATAPI
977 int retries = 0;
978 int do_retry = 0;
979 #endif
980
981 #ifdef CONFIG_TUNE_PIO
982 int pio_mode;
983 #endif
984
985 #if 0
986 int mode, cycle_time;
987 #endif
988 int device;
989 device=dev_desc->dev;
990 printf (" Device %d: ", device);
991
992 ide_led (DEVICE_LED(device), 1); /* LED on */
993 /* Select device
994 */
995 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
996 dev_desc->if_type=IF_TYPE_IDE;
997 #ifdef CONFIG_ATAPI
998
999 do_retry = 0;
1000 retries = 0;
1001
1002 /* Warning: This will be tricky to read */
1003 while (retries <= 1) {
1004 /* check signature */
1005 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1006 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1007 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1008 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
1009 /* ATAPI Signature found */
1010 dev_desc->if_type=IF_TYPE_ATAPI;
1011 /* Start Ident Command
1012 */
1013 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
1014 /*
1015 * Wait for completion - ATAPI devices need more time
1016 * to become ready
1017 */
1018 c = ide_wait (device, ATAPI_TIME_OUT);
1019 } else
1020 #endif
1021 {
1022 /* Start Ident Command
1023 */
1024 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
1025
1026 /* Wait for completion
1027 */
1028 c = ide_wait (device, IDE_TIME_OUT);
1029 }
1030 ide_led (DEVICE_LED(device), 0); /* LED off */
1031
1032 if (((c & ATA_STAT_DRQ) == 0) ||
1033 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
1034 #ifdef CONFIG_ATAPI
1035 {
1036 /* Need to soft reset the device in case it's an ATAPI... */
1037 debug ("Retrying...\n");
1038 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1039 udelay(100000);
1040 ide_outb (device, ATA_COMMAND, 0x08);
1041 udelay (500000); /* 500 ms */
1042 }
1043 /* Select device
1044 */
1045 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1046 retries++;
1047 #else
1048 return;
1049 #endif
1050 }
1051 #ifdef CONFIG_ATAPI
1052 else
1053 break;
1054 } /* see above - ugly to read */
1055
1056 if (retries == 2) /* Not found */
1057 return;
1058 #endif
1059
1060 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1061
1062 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1063 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1064 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
1065 #ifdef __LITTLE_ENDIAN
1066 /*
1067 * firmware revision, model, and serial number have Big Endian Byte
1068 * order in Word. Convert all three to little endian.
1069 *
1070 * See CF+ and CompactFlash Specification Revision 2.0:
1071 * 6.2.1.6: Identify Drive, Table 39 for more details
1072 */
1073
1074 strswab (dev_desc->revision);
1075 strswab (dev_desc->vendor);
1076 strswab (dev_desc->product);
1077 #endif /* __LITTLE_ENDIAN */
1078
1079 if ((iop->config & 0x0080)==0x0080)
1080 dev_desc->removable = 1;
1081 else
1082 dev_desc->removable = 0;
1083
1084 #ifdef CONFIG_TUNE_PIO
1085 /* Mode 0 - 2 only, are directly determined by word 51. */
1086 pio_mode = iop->tPIO;
1087 if (pio_mode > 2) {
1088 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1089 pio_mode = 0; /* Force it to dead slow, and hope for the best... */
1090 }
1091
1092 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1093 * shall set bit 1 of word 53 to one and support the fields contained
1094 * in words 64 through 70.
1095 */
1096 if (iop->field_valid & 0x02) {
1097 /* Mode 3 and above are possible. Check in order from slow
1098 * to fast, so we wind up with the highest mode allowed.
1099 */
1100 if (iop->eide_pio_modes & 0x01)
1101 pio_mode = 3;
1102 if (iop->eide_pio_modes & 0x02)
1103 pio_mode = 4;
1104 if (ata_id_is_cfa((u16 *)iop)) {
1105 if ((iop->cf_advanced_caps & 0x07) == 0x01)
1106 pio_mode = 5;
1107 if ((iop->cf_advanced_caps & 0x07) == 0x02)
1108 pio_mode = 6;
1109 }
1110 }
1111
1112 /* System-specific, depends on bus speeds, etc. */
1113 ide_set_piomode(pio_mode);
1114 #endif /* CONFIG_TUNE_PIO */
1115
1116 #if 0
1117 /*
1118 * Drive PIO mode autoselection
1119 */
1120 mode = iop->tPIO;
1121
1122 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1123 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1124 mode = 2;
1125 debug ("Override tPIO -> 2\n");
1126 }
1127 if (iop->field_valid & 2) { /* drive implements ATA2? */
1128 debug ("Drive implements ATA2\n");
1129 if (iop->capability & 8) { /* drive supports use_iordy? */
1130 cycle_time = iop->eide_pio_iordy;
1131 } else {
1132 cycle_time = iop->eide_pio;
1133 }
1134 debug ("cycle time = %d\n", cycle_time);
1135 mode = 4;
1136 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1137 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1138 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1139 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1140 }
1141 printf ("PIO mode to use: PIO %d\n", mode);
1142 #endif /* 0 */
1143
1144 #ifdef CONFIG_ATAPI
1145 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1146 atapi_inquiry(dev_desc);
1147 return;
1148 }
1149 #endif /* CONFIG_ATAPI */
1150
1151 #ifdef __BIG_ENDIAN
1152 /* swap shorts */
1153 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
1154 #else /* ! __BIG_ENDIAN */
1155 /*
1156 * do not swap shorts on little endian
1157 *
1158 * See CF+ and CompactFlash Specification Revision 2.0:
1159 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1160 */
1161 dev_desc->lba = iop->lba_capacity;
1162 #endif /* __BIG_ENDIAN */
1163
1164 #ifdef CONFIG_LBA48
1165 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
1166 dev_desc->lba48 = 1;
1167 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
1168 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1169 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1170 ((unsigned long long)iop->lba48_capacity[3] << 48);
1171 } else {
1172 dev_desc->lba48 = 0;
1173 }
1174 #endif /* CONFIG_LBA48 */
1175 /* assuming HD */
1176 dev_desc->type=DEV_TYPE_HARDDISK;
1177 dev_desc->blksz=ATA_BLOCKSIZE;
1178 dev_desc->lun=0; /* just to fill something in... */
1179
1180 #if 0 /* only used to test the powersaving mode,
1181 * if enabled, the drive goes after 5 sec
1182 * in standby mode */
1183 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1184 c = ide_wait (device, IDE_TIME_OUT);
1185 ide_outb (device, ATA_SECT_CNT, 1);
1186 ide_outb (device, ATA_LBA_LOW, 0);
1187 ide_outb (device, ATA_LBA_MID, 0);
1188 ide_outb (device, ATA_LBA_HIGH, 0);
1189 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1190 ide_outb (device, ATA_COMMAND, 0xe3);
1191 udelay (50);
1192 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1193 #endif
1194 }
1195
1196
1197 /* ------------------------------------------------------------------------- */
1198
1199 ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1200 {
1201 ulong n = 0;
1202 unsigned char c;
1203 unsigned char pwrsave=0; /* power save */
1204 #ifdef CONFIG_LBA48
1205 unsigned char lba48 = 0;
1206
1207 if (blknr & 0x0000fffff0000000ULL) {
1208 /* more than 28 bits used, use 48bit mode */
1209 lba48 = 1;
1210 }
1211 #endif
1212 debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
1213 device, blknr, blkcnt, (ulong)buffer);
1214
1215 ide_led (DEVICE_LED(device), 1); /* LED on */
1216
1217 /* Select device
1218 */
1219 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1220 c = ide_wait (device, IDE_TIME_OUT);
1221
1222 if (c & ATA_STAT_BUSY) {
1223 printf ("IDE read: device %d not ready\n", device);
1224 goto IDE_READ_E;
1225 }
1226
1227 /* first check if the drive is in Powersaving mode, if yes,
1228 * increase the timeout value */
1229 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1230 udelay (50);
1231
1232 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1233
1234 if (c & ATA_STAT_BUSY) {
1235 printf ("IDE read: device %d not ready\n", device);
1236 goto IDE_READ_E;
1237 }
1238 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1239 printf ("No Powersaving mode %X\n", c);
1240 } else {
1241 c = ide_inb(device,ATA_SECT_CNT);
1242 debug ("Powersaving %02X\n",c);
1243 if(c==0)
1244 pwrsave=1;
1245 }
1246
1247
1248 while (blkcnt-- > 0) {
1249
1250 c = ide_wait (device, IDE_TIME_OUT);
1251
1252 if (c & ATA_STAT_BUSY) {
1253 printf ("IDE read: device %d not ready\n", device);
1254 break;
1255 }
1256 #ifdef CONFIG_LBA48
1257 if (lba48) {
1258 /* write high bits */
1259 ide_outb (device, ATA_SECT_CNT, 0);
1260 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1261 #ifdef CONFIG_SYS_64BIT_LBA
1262 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1263 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1264 #else
1265 ide_outb (device, ATA_LBA_MID, 0);
1266 ide_outb (device, ATA_LBA_HIGH, 0);
1267 #endif
1268 }
1269 #endif
1270 ide_outb (device, ATA_SECT_CNT, 1);
1271 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1272 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1273 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1274
1275 #ifdef CONFIG_LBA48
1276 if (lba48) {
1277 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1278 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1279
1280 } else
1281 #endif
1282 {
1283 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1284 ATA_DEVICE(device) |
1285 ((blknr >> 24) & 0xF) );
1286 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1287 }
1288
1289 udelay (50);
1290
1291 if(pwrsave) {
1292 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1293 pwrsave=0;
1294 } else {
1295 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1296 }
1297
1298 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1299 #if defined(CONFIG_SYS_64BIT_LBA)
1300 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1301 device, blknr, c);
1302 #else
1303 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1304 device, (ulong)blknr, c);
1305 #endif
1306 break;
1307 }
1308
1309 input_data (device, buffer, ATA_SECTORWORDS);
1310 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
1311
1312 ++n;
1313 ++blknr;
1314 buffer += ATA_BLOCKSIZE;
1315 }
1316 IDE_READ_E:
1317 ide_led (DEVICE_LED(device), 0); /* LED off */
1318 return (n);
1319 }
1320
1321 /* ------------------------------------------------------------------------- */
1322
1323
1324 ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1325 {
1326 ulong n = 0;
1327 unsigned char c;
1328 #ifdef CONFIG_LBA48
1329 unsigned char lba48 = 0;
1330
1331 if (blknr & 0x0000fffff0000000ULL) {
1332 /* more than 28 bits used, use 48bit mode */
1333 lba48 = 1;
1334 }
1335 #endif
1336
1337 ide_led (DEVICE_LED(device), 1); /* LED on */
1338
1339 /* Select device
1340 */
1341 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1342
1343 while (blkcnt-- > 0) {
1344
1345 c = ide_wait (device, IDE_TIME_OUT);
1346
1347 if (c & ATA_STAT_BUSY) {
1348 printf ("IDE read: device %d not ready\n", device);
1349 goto WR_OUT;
1350 }
1351 #ifdef CONFIG_LBA48
1352 if (lba48) {
1353 /* write high bits */
1354 ide_outb (device, ATA_SECT_CNT, 0);
1355 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1356 #ifdef CONFIG_SYS_64BIT_LBA
1357 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1358 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1359 #else
1360 ide_outb (device, ATA_LBA_MID, 0);
1361 ide_outb (device, ATA_LBA_HIGH, 0);
1362 #endif
1363 }
1364 #endif
1365 ide_outb (device, ATA_SECT_CNT, 1);
1366 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1367 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1368 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1369
1370 #ifdef CONFIG_LBA48
1371 if (lba48) {
1372 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1373 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1374
1375 } else
1376 #endif
1377 {
1378 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1379 ATA_DEVICE(device) |
1380 ((blknr >> 24) & 0xF) );
1381 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1382 }
1383
1384 udelay (50);
1385
1386 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1387
1388 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1389 #if defined(CONFIG_SYS_64BIT_LBA)
1390 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
1391 device, blknr, c);
1392 #else
1393 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1394 device, (ulong)blknr, c);
1395 #endif
1396 goto WR_OUT;
1397 }
1398
1399 output_data (device, buffer, ATA_SECTORWORDS);
1400 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
1401 ++n;
1402 ++blknr;
1403 buffer += ATA_BLOCKSIZE;
1404 }
1405 WR_OUT:
1406 ide_led (DEVICE_LED(device), 0); /* LED off */
1407 return (n);
1408 }
1409
1410 /* ------------------------------------------------------------------------- */
1411
1412 /*
1413 * copy src to dest, skipping leading and trailing blanks and null
1414 * terminate the string
1415 * "len" is the size of available memory including the terminating '\0'
1416 */
1417 static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
1418 {
1419 unsigned char *end, *last;
1420
1421 last = dst;
1422 end = src + len - 1;
1423
1424 /* reserve space for '\0' */
1425 if (len < 2)
1426 goto OUT;
1427
1428 /* skip leading white space */
1429 while ((*src) && (src<end) && (*src==' '))
1430 ++src;
1431
1432 /* copy string, omitting trailing white space */
1433 while ((*src) && (src<end)) {
1434 *dst++ = *src;
1435 if (*src++ != ' ')
1436 last = dst;
1437 }
1438 OUT:
1439 *last = '\0';
1440 }
1441
1442 /* ------------------------------------------------------------------------- */
1443
1444 /*
1445 * Wait until Busy bit is off, or timeout (in ms)
1446 * Return last status
1447 */
1448 static uchar ide_wait (int dev, ulong t)
1449 {
1450 ulong delay = 10 * t; /* poll every 100 us */
1451 uchar c;
1452
1453 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1454 udelay (100);
1455 if (delay-- == 0) {
1456 break;
1457 }
1458 }
1459 return (c);
1460 }
1461
1462 /* ------------------------------------------------------------------------- */
1463
1464 #ifdef CONFIG_IDE_RESET
1465 extern void ide_set_reset(int idereset);
1466
1467 static void ide_reset (void)
1468 {
1469 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1470 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
1471 #endif
1472 int i;
1473
1474 curr_device = -1;
1475 for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
1476 ide_bus_ok[i] = 0;
1477 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
1478 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1479
1480 ide_set_reset (1); /* assert reset */
1481
1482 /* the reset signal shall be asserted for et least 25 us */
1483 udelay(25);
1484
1485 WATCHDOG_RESET();
1486
1487 #ifdef CONFIG_SYS_PB_12V_ENABLE
1488 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
1489 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1490 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1491 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1492
1493 /* wait 500 ms for the voltage to stabilize
1494 */
1495 for (i=0; i<500; ++i) {
1496 udelay (1000);
1497 }
1498
1499 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
1500 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1501
1502 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1503 /* configure IDE Motor voltage monitor pin as input */
1504 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1505 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1506 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1507
1508 /* wait up to 1 s for the motor voltage to stabilize
1509 */
1510 for (i=0; i<1000; ++i) {
1511 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1512 break;
1513 }
1514 udelay (1000);
1515 }
1516
1517 if (i == 1000) { /* Timeout */
1518 printf ("\nWarning: 5V for IDE Motor missing\n");
1519 # ifdef CONFIG_STATUS_LED
1520 # ifdef STATUS_LED_YELLOW
1521 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1522 # endif
1523 # ifdef STATUS_LED_GREEN
1524 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1525 # endif
1526 # endif /* CONFIG_STATUS_LED */
1527 }
1528 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1529
1530 WATCHDOG_RESET();
1531
1532 /* de-assert RESET signal */
1533 ide_set_reset(0);
1534
1535 /* wait 250 ms */
1536 for (i=0; i<250; ++i) {
1537 udelay (1000);
1538 }
1539 }
1540
1541 #endif /* CONFIG_IDE_RESET */
1542
1543 /* ------------------------------------------------------------------------- */
1544
1545 #if defined(CONFIG_IDE_LED) && \
1546 !defined(CONFIG_CPC45) && \
1547 !defined(CONFIG_HMI10) && \
1548 !defined(CONFIG_KUP4K) && \
1549 !defined(CONFIG_KUP4X)
1550
1551 static uchar led_buffer = 0; /* Buffer for current LED status */
1552
1553 static void ide_led (uchar led, uchar status)
1554 {
1555 uchar *led_port = LED_PORT;
1556
1557 if (status) { /* switch LED on */
1558 led_buffer |= led;
1559 } else { /* switch LED off */
1560 led_buffer &= ~led;
1561 }
1562
1563 *led_port = led_buffer;
1564 }
1565
1566 #endif /* CONFIG_IDE_LED */
1567
1568 #if defined(CONFIG_OF_IDE_FIXUP)
1569 int ide_device_present(int dev)
1570 {
1571 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1572 return 0;
1573 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1574 }
1575 #endif
1576 /* ------------------------------------------------------------------------- */
1577
1578 #ifdef CONFIG_ATAPI
1579 /****************************************************************************
1580 * ATAPI Support
1581 */
1582
1583 #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
1584 /* since ATAPI may use commands with not 4 bytes alligned length
1585 * we have our own transfer functions, 2 bytes alligned */
1586 static void
1587 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1588 {
1589 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1590 uchar *dbuf;
1591 volatile uchar *pbuf_even;
1592 volatile uchar *pbuf_odd;
1593
1594 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1595 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1596 while (shorts--) {
1597 EIEIO;
1598 *pbuf_even = *dbuf++;
1599 EIEIO;
1600 *pbuf_odd = *dbuf++;
1601 }
1602 #else
1603 ushort *dbuf;
1604 volatile ushort *pbuf;
1605
1606 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1607 dbuf = (ushort *)sect_buf;
1608
1609 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
1610
1611 while (shorts--) {
1612 EIEIO;
1613 *pbuf = *dbuf++;
1614 }
1615 #endif
1616 }
1617
1618 static void
1619 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1620 {
1621 #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1622 uchar *dbuf;
1623 volatile uchar *pbuf_even;
1624 volatile uchar *pbuf_odd;
1625
1626 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1627 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1628 while (shorts--) {
1629 EIEIO;
1630 *dbuf++ = *pbuf_even;
1631 EIEIO;
1632 *dbuf++ = *pbuf_odd;
1633 }
1634 #else
1635 ushort *dbuf;
1636 volatile ushort *pbuf;
1637
1638 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1639 dbuf = (ushort *)sect_buf;
1640
1641 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1642
1643 while (shorts--) {
1644 EIEIO;
1645 *dbuf++ = *pbuf;
1646 }
1647 #endif
1648 }
1649
1650 #else /* ! __PPC__ */
1651 static void
1652 output_data_shorts(int dev, ushort *sect_buf, int shorts)
1653 {
1654 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1655 }
1656
1657 static void
1658 input_data_shorts(int dev, ushort *sect_buf, int shorts)
1659 {
1660 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
1661 }
1662
1663 #endif /* __PPC__ */
1664
1665 /*
1666 * Wait until (Status & mask) == res, or timeout (in ms)
1667 * Return last status
1668 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1669 * and then they set their DRQ Bit
1670 */
1671 static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1672 {
1673 ulong delay = 10 * t; /* poll every 100 us */
1674 uchar c;
1675
1676 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1677 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1678 /* break if error occurs (doesn't make sense to wait more) */
1679 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1680 break;
1681 udelay (100);
1682 if (delay-- == 0) {
1683 break;
1684 }
1685 }
1686 return (c);
1687 }
1688
1689 /*
1690 * issue an atapi command
1691 */
1692 unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1693 {
1694 unsigned char c,err,mask,res;
1695 int n;
1696 ide_led (DEVICE_LED(device), 1); /* LED on */
1697
1698 /* Select device
1699 */
1700 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1701 res = 0;
1702 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1703 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1704 if ((c & mask) != res) {
1705 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1706 err=0xFF;
1707 goto AI_OUT;
1708 }
1709 /* write taskfile */
1710 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1711 ide_outb (device, ATA_SECT_CNT, 0);
1712 ide_outb (device, ATA_SECT_NUM, 0);
1713 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
1714 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1715 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1716
1717 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
1718 udelay (50);
1719
1720 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1721 res = ATA_STAT_DRQ;
1722 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1723
1724 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1725 printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1726 err=0xFF;
1727 goto AI_OUT;
1728 }
1729
1730 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1731 /* ATAPI Command written wait for completition */
1732 udelay (5000); /* device must set bsy */
1733
1734 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1735 /* if no data wait for DRQ = 0 BSY = 0
1736 * if data wait for DRQ = 1 BSY = 0 */
1737 res=0;
1738 if(buflen)
1739 res = ATA_STAT_DRQ;
1740 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1741 if ((c & mask) != res ) {
1742 if (c & ATA_STAT_ERR) {
1743 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1744 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
1745 } else {
1746 printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1747 err=0xFF;
1748 }
1749 goto AI_OUT;
1750 }
1751 n=ide_inb(device, ATA_CYL_HIGH);
1752 n<<=8;
1753 n+=ide_inb(device, ATA_CYL_LOW);
1754 if(n>buflen) {
1755 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1756 err=0xff;
1757 goto AI_OUT;
1758 }
1759 if((n==0)&&(buflen<0)) {
1760 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1761 err=0xff;
1762 goto AI_OUT;
1763 }
1764 if(n!=buflen) {
1765 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
1766 }
1767 if(n!=0) { /* data transfer */
1768 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
1769 /* we transfer shorts */
1770 n>>=1;
1771 /* ok now decide if it is an in or output */
1772 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1773 debug ("Write to device\n");
1774 output_data_shorts(device,(unsigned short *)buffer,n);
1775 } else {
1776 debug ("Read from device @ %p shorts %d\n",buffer,n);
1777 input_data_shorts(device,(unsigned short *)buffer,n);
1778 }
1779 }
1780 udelay(5000); /* seems that some CD ROMs need this... */
1781 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1782 res=0;
1783 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1784 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1785 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1786 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
1787 } else {
1788 err = 0;
1789 }
1790 AI_OUT:
1791 ide_led (DEVICE_LED(device), 0); /* LED off */
1792 return (err);
1793 }
1794
1795 /*
1796 * sending the command to atapi_issue. If an status other than good
1797 * returns, an request_sense will be issued
1798 */
1799
1800 #define ATAPI_DRIVE_NOT_READY 100
1801 #define ATAPI_UNIT_ATTN 10
1802
1803 unsigned char atapi_issue_autoreq (int device,
1804 unsigned char* ccb,
1805 int ccblen,
1806 unsigned char *buffer,
1807 int buflen)
1808 {
1809 unsigned char sense_data[18],sense_ccb[12];
1810 unsigned char res,key,asc,ascq;
1811 int notready,unitattn;
1812
1813 unitattn=ATAPI_UNIT_ATTN;
1814 notready=ATAPI_DRIVE_NOT_READY;
1815
1816 retry:
1817 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1818 if (res==0)
1819 return (0); /* Ok */
1820
1821 if (res==0xFF)
1822 return (0xFF); /* error */
1823
1824 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
1825
1826 memset(sense_ccb,0,sizeof(sense_ccb));
1827 memset(sense_data,0,sizeof(sense_data));
1828 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
1829 sense_ccb[4]=18; /* allocation Length */
1830
1831 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1832 key=(sense_data[2]&0xF);
1833 asc=(sense_data[12]);
1834 ascq=(sense_data[13]);
1835
1836 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1837 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1838 sense_data[0],
1839 key,
1840 asc,
1841 ascq);
1842
1843 if((key==0))
1844 return 0; /* ok device ready */
1845
1846 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1847 if(unitattn-->0) {
1848 udelay(200*1000);
1849 goto retry;
1850 }
1851 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1852 goto error;
1853 }
1854 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1855 if (notready-->0) {
1856 udelay(200*1000);
1857 goto retry;
1858 }
1859 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1860 goto error;
1861 }
1862 if(asc==0x3a) {
1863 debug ("Media not present\n");
1864 goto error;
1865 }
1866
1867 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1868 error:
1869 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1870 return (0xFF);
1871 }
1872
1873
1874 static void atapi_inquiry(block_dev_desc_t * dev_desc)
1875 {
1876 unsigned char ccb[12]; /* Command descriptor block */
1877 unsigned char iobuf[64]; /* temp buf */
1878 unsigned char c;
1879 int device;
1880
1881 device=dev_desc->dev;
1882 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1883 dev_desc->block_read=atapi_read;
1884
1885 memset(ccb,0,sizeof(ccb));
1886 memset(iobuf,0,sizeof(iobuf));
1887
1888 ccb[0]=ATAPI_CMD_INQUIRY;
1889 ccb[4]=40; /* allocation Legnth */
1890 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1891
1892 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
1893 if (c!=0)
1894 return;
1895
1896 /* copy device ident strings */
1897 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1898 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1899 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
1900
1901 dev_desc->lun=0;
1902 dev_desc->lba=0;
1903 dev_desc->blksz=0;
1904 dev_desc->type=iobuf[0] & 0x1f;
1905
1906 if ((iobuf[1]&0x80)==0x80)
1907 dev_desc->removable = 1;
1908 else
1909 dev_desc->removable = 0;
1910
1911 memset(ccb,0,sizeof(ccb));
1912 memset(iobuf,0,sizeof(iobuf));
1913 ccb[0]=ATAPI_CMD_START_STOP;
1914 ccb[4]=0x03; /* start */
1915
1916 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1917
1918 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
1919 if (c!=0)
1920 return;
1921
1922 memset(ccb,0,sizeof(ccb));
1923 memset(iobuf,0,sizeof(iobuf));
1924 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1925
1926 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
1927 if (c!=0)
1928 return;
1929
1930 memset(ccb,0,sizeof(ccb));
1931 memset(iobuf,0,sizeof(iobuf));
1932 ccb[0]=ATAPI_CMD_READ_CAP;
1933 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1934 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
1935 if (c!=0)
1936 return;
1937
1938 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1939 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1940 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1941
1942 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1943 ((unsigned long)iobuf[1]<<16) +
1944 ((unsigned long)iobuf[2]<< 8) +
1945 ((unsigned long)iobuf[3]);
1946 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1947 ((unsigned long)iobuf[5]<<16) +
1948 ((unsigned long)iobuf[6]<< 8) +
1949 ((unsigned long)iobuf[7]);
1950 #ifdef CONFIG_LBA48
1951 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1952 #endif
1953 return;
1954 }
1955
1956
1957 /*
1958 * atapi_read:
1959 * we transfer only one block per command, since the multiple DRQ per
1960 * command is not yet implemented
1961 */
1962 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1963 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
1964 #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
1965
1966 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1967 {
1968 ulong n = 0;
1969 unsigned char ccb[12]; /* Command descriptor block */
1970 ulong cnt;
1971
1972 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
1973 device, blknr, blkcnt, (ulong)buffer);
1974
1975 do {
1976 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
1977 cnt=ATAPI_READ_MAX_BLOCK;
1978 } else {
1979 cnt=blkcnt;
1980 }
1981 ccb[0]=ATAPI_CMD_READ_12;
1982 ccb[1]=0; /* reserved */
1983 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
1984 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
1985 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
1986 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
1987 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
1988 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
1989 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
1990 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
1991 ccb[10]=0; /* reserved */
1992 ccb[11]=0; /* reserved */
1993
1994 if (atapi_issue_autoreq(device,ccb,12,
1995 (unsigned char *)buffer,
1996 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
1997 return (n);
1998 }
1999 n+=cnt;
2000 blkcnt-=cnt;
2001 blknr+=cnt;
2002 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
2003 } while (blkcnt > 0);
2004 return (n);
2005 }
2006
2007 /* ------------------------------------------------------------------------- */
2008
2009 #endif /* CONFIG_ATAPI */
2010
2011 U_BOOT_CMD(
2012 ide, 5, 1, do_ide,
2013 "IDE sub-system",
2014 "reset - reset IDE controller\n"
2015 "ide info - show available IDE devices\n"
2016 "ide device [dev] - show or set current device\n"
2017 "ide part [dev] - print partition table of one or all IDE devices\n"
2018 "ide read addr blk# cnt\n"
2019 "ide write addr blk# cnt - read/write `cnt'"
2020 " blocks starting at block `blk#'\n"
2021 " to/from memory address `addr'"
2022 );
2023
2024 U_BOOT_CMD(
2025 diskboot, 3, 1, do_diskboot,
2026 "boot from IDE device",
2027 "loadAddr dev:part"
2028 );
"Das U-Boot" Source Tree