3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #if (CONFIG_COMMANDS & CFG_CMD_MII)
34 #ifdef CONFIG_TERSE_MII
36 * Display values from last command.
44 * MII device/info/read/write
47 * mii device {devname}
49 * mii read {addr} {reg}
50 * mii write {addr} {reg} {data}
52 int do_mii (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
55 unsigned char addr
, reg
;
60 #if defined(CONFIG_8xx) || defined(CONFIG_MCF52x2)
65 * We use the last specified parameters, unless new ones are
73 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
76 addr
= simple_strtoul (argv
[2], NULL
, 16);
78 reg
= simple_strtoul (argv
[3], NULL
, 16);
80 data
= simple_strtoul (argv
[4], NULL
, 16);
83 /* use current device */
84 devname
= miiphy_get_current_dev();
87 * check device/read/write/list.
90 unsigned char j
, start
, end
;
96 * Look for any and all PHYs. Valid addresses are 0..31.
99 start
= addr
; end
= addr
+ 1;
104 for (j
= start
; j
< end
; j
++) {
105 if (miiphy_info (devname
, j
, &oui
, &model
, &rev
) == 0) {
106 printf ("PHY 0x%02X: "
112 miiphy_speed (devname
, j
),
113 (miiphy_duplex (devname
, j
) == FULL
)
116 puts ("Error reading info from the PHY\n");
119 } else if (op
== 'r') {
120 if (miiphy_read (devname
, addr
, reg
, &data
) != 0) {
121 puts ("Error reading from the PHY\n");
124 printf ("%04X\n", data
& 0x0000FFFF);
126 } else if (op
== 'w') {
127 if (miiphy_write (devname
, addr
, reg
, data
) != 0) {
128 puts ("Error writing to the PHY\n");
131 } else if (op
== 'd') {
135 miiphy_set_current_dev (argv
[2]);
137 printf ("Usage:\n%s\n", cmdtp
->usage
);
142 * Save the parameters for repeats.
152 /***************************************************/
156 "mii - MII utility commands\n",
157 "device - list available devices\n"
158 "mii device <devname> - set current device\n"
159 "mii info <addr> - display MII PHY info\n"
160 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
161 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
164 #else /* ! CONFIG_TERSE_MII ================================================= */
166 typedef struct _MII_reg_desc_t
{
171 MII_reg_desc_t reg_0_5_desc_tbl
[] = {
172 { 0, "PHY control register" },
173 { 1, "PHY status register" },
174 { 2, "PHY ID 1 register" },
175 { 3, "PHY ID 2 register" },
176 { 4, "Autonegotiation advertisement register" },
177 { 5, "Autonegotiation partner abilities register" },
180 typedef struct _MII_field_desc_t
{
187 MII_field_desc_t reg_0_desc_tbl
[] = {
188 { 15, 15, 0x01, "reset" },
189 { 14, 14, 0x01, "loopback" },
190 { 13, 6, 0x81, "speed selection" }, /* special */
191 { 12, 12, 0x01, "A/N enable" },
192 { 11, 11, 0x01, "power-down" },
193 { 10, 10, 0x01, "isolate" },
194 { 9, 9, 0x01, "restart A/N" },
195 { 8, 8, 0x01, "duplex" }, /* special */
196 { 7, 7, 0x01, "collision test enable" },
197 { 5, 0, 0x3f, "(reserved)" }
200 MII_field_desc_t reg_1_desc_tbl
[] = {
201 { 15, 15, 0x01, "100BASE-T4 able" },
202 { 14, 14, 0x01, "100BASE-X full duplex able" },
203 { 13, 13, 0x01, "100BASE-X half duplex able" },
204 { 12, 12, 0x01, "10 Mbps full duplex able" },
205 { 11, 11, 0x01, "10 Mbps half duplex able" },
206 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
207 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
208 { 8, 8, 0x01, "extended status" },
209 { 7, 7, 0x01, "(reserved)" },
210 { 6, 6, 0x01, "MF preamble suppression" },
211 { 5, 5, 0x01, "A/N complete" },
212 { 4, 4, 0x01, "remote fault" },
213 { 3, 3, 0x01, "A/N able" },
214 { 2, 2, 0x01, "link status" },
215 { 1, 1, 0x01, "jabber detect" },
216 { 0, 0, 0x01, "extended capabilities" },
219 MII_field_desc_t reg_2_desc_tbl
[] = {
220 { 15, 0, 0xffff, "OUI portion" },
223 MII_field_desc_t reg_3_desc_tbl
[] = {
224 { 15, 10, 0x3f, "OUI portion" },
225 { 9, 4, 0x3f, "manufacturer part number" },
226 { 3, 0, 0x0f, "manufacturer rev. number" },
229 MII_field_desc_t reg_4_desc_tbl
[] = {
230 { 15, 15, 0x01, "next page able" },
231 { 14, 14, 0x01, "reserved" },
232 { 13, 13, 0x01, "remote fault" },
233 { 12, 12, 0x01, "reserved" },
234 { 11, 11, 0x01, "asymmetric pause" },
235 { 10, 10, 0x01, "pause enable" },
236 { 9, 9, 0x01, "100BASE-T4 able" },
237 { 8, 8, 0x01, "100BASE-TX full duplex able" },
238 { 7, 7, 0x01, "100BASE-TX able" },
239 { 6, 6, 0x01, "10BASE-T full duplex able" },
240 { 5, 5, 0x01, "10BASE-T able" },
241 { 4, 0, 0x1f, "xxx to do" },
244 MII_field_desc_t reg_5_desc_tbl
[] = {
245 { 15, 15, 0x01, "next page able" },
246 { 14, 14, 0x01, "acknowledge" },
247 { 13, 13, 0x01, "remote fault" },
248 { 12, 12, 0x01, "(reserved)" },
249 { 11, 11, 0x01, "asymmetric pause able" },
250 { 10, 10, 0x01, "pause able" },
251 { 9, 9, 0x01, "100BASE-T4 able" },
252 { 8, 8, 0x01, "100BASE-X full duplex able" },
253 { 7, 7, 0x01, "100BASE-TX able" },
254 { 6, 6, 0x01, "10BASE-T full duplex able" },
255 { 5, 5, 0x01, "10BASE-T able" },
256 { 4, 0, 0x1f, "xxx to do" },
259 #define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
260 #define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
261 #define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
262 #define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
263 #define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
264 #define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
266 typedef struct _MII_field_desc_and_len_t
{
267 MII_field_desc_t
* pdesc
;
269 } MII_field_desc_and_len_t
;
271 MII_field_desc_and_len_t desc_and_len_tbl
[] = {
272 { reg_0_desc_tbl
, DESC0LEN
},
273 { reg_1_desc_tbl
, DESC1LEN
},
274 { reg_2_desc_tbl
, DESC2LEN
},
275 { reg_3_desc_tbl
, DESC3LEN
},
276 { reg_4_desc_tbl
, DESC4LEN
},
277 { reg_5_desc_tbl
, DESC5LEN
},
280 static void dump_reg(
282 MII_reg_desc_t
* prd
,
283 MII_field_desc_and_len_t
* pdl
);
285 static int special_field(
287 MII_field_desc_t
* pdesc
,
290 void MII_dump_0_to_5(
297 for (i
= 0; i
< 6; i
++) {
298 if ((reglo
<= i
) && (i
<= reghi
))
299 dump_reg(regvals
[i
], ®_0_5_desc_tbl
[i
],
300 &desc_and_len_tbl
[i
]);
304 static void dump_reg(
306 MII_reg_desc_t
* prd
,
307 MII_field_desc_and_len_t
* pdl
)
310 ushort mask_in_place
;
311 MII_field_desc_t
* pdesc
;
313 printf("%u. (%04hx) -- %s --\n",
314 prd
->regno
, regval
, prd
->name
);
316 for (i
= 0; i
< pdl
->len
; i
++) {
317 pdesc
= &pdl
->pdesc
[i
];
319 mask_in_place
= pdesc
->mask
<< pdesc
->lo
;
321 printf(" (%04hx:%04hx) %u.",
323 regval
& mask_in_place
,
326 if (special_field(prd
->regno
, pdesc
, regval
)) {
329 if (pdesc
->hi
== pdesc
->lo
)
330 printf("%2u ", pdesc
->lo
);
332 printf("%2u-%2u", pdesc
->hi
, pdesc
->lo
);
334 (regval
& mask_in_place
) >> pdesc
->lo
,
352 static int special_field(
354 MII_field_desc_t
* pdesc
,
357 if ((regno
== 0) && (pdesc
->lo
== 6)) {
358 ushort speed_bits
= regval
& PHY_BMCR_SPEED_MASK
;
359 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
363 speed_bits
== PHY_BMCR_1000_MBPS
? "1000" :
364 speed_bits
== PHY_BMCR_100_MBPS
? "100" :
365 speed_bits
== PHY_BMCR_10_MBPS
? "10" :
370 else if ((regno
== 0) && (pdesc
->lo
== 8)) {
371 printf("%2u = %5u duplex = %s",
373 (regval
>> pdesc
->lo
) & 1,
374 ((regval
>> pdesc
->lo
) & 1) ? "full" : "half");
378 else if ((regno
== 4) && (pdesc
->lo
== 0)) {
379 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
380 printf("%2u-%2u = %5u selector = %s",
381 pdesc
->hi
, pdesc
->lo
, sel_bits
,
382 sel_bits
== PHY_ANLPAR_PSB_802_3
?
384 sel_bits
== PHY_ANLPAR_PSB_802_9
?
385 "IEEE 802.9 ISLAN-16T" :
390 else if ((regno
== 5) && (pdesc
->lo
== 0)) {
391 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
392 printf("%2u-%2u = %u selector = %s",
393 pdesc
->hi
, pdesc
->lo
, sel_bits
,
394 sel_bits
== PHY_ANLPAR_PSB_802_3
?
396 sel_bits
== PHY_ANLPAR_PSB_802_9
?
397 "IEEE 802.9 ISLAN-16T" :
412 static void extract_range(
418 *plo
= simple_strtoul(input
, &end
, 16);
421 *phi
= simple_strtoul(end
, NULL
, 16);
428 /* ---------------------------------------------------------------- */
429 int do_mii (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
432 unsigned char addrlo
, addrhi
, reglo
, reghi
;
433 unsigned char addr
, reg
;
443 * We use the last specified parameters, unless new ones are
448 addrlo
= last_addr_lo
;
449 addrhi
= last_addr_hi
;
454 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
456 if (strlen(argv
[1]) > 1)
462 extract_range(argv
[2], &addrlo
, &addrhi
);
464 extract_range(argv
[3], ®lo
, ®hi
);
466 data
= simple_strtoul (argv
[4], NULL
, 16);
469 /* use current device */
470 devname
= miiphy_get_current_dev();
473 * check info/read/write.
476 unsigned char j
, start
, end
;
482 * Look for any and all PHYs. Valid addresses are 0..31.
485 start
= addrlo
; end
= addrhi
;
490 for (j
= start
; j
<= end
; j
++) {
491 if (miiphy_info (devname
, j
, &oui
, &model
, &rev
) == 0) {
492 printf("PHY 0x%02X: "
498 miiphy_speed (devname
, j
),
499 (miiphy_duplex (devname
, j
) == FULL
)
502 puts ("Error reading info from the PHY\n");
505 } else if (op
[0] == 'r') {
506 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
507 for (reg
= reglo
; reg
<= reghi
; reg
++) {
509 if (miiphy_read (devname
, addr
, reg
, &data
) != 0) {
511 "Error reading from the PHY addr=%02x reg=%02x\n",
515 if ((addrlo
!= addrhi
) || (reglo
!= reghi
))
516 printf("addr=%02x reg=%02x data=",
517 (uint
)addr
, (uint
)reg
);
518 printf("%04X\n", data
& 0x0000FFFF);
521 if ((addrlo
!= addrhi
) && (reglo
!= reghi
))
524 } else if (op
[0] == 'w') {
525 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
526 for (reg
= reglo
; reg
<= reghi
; reg
++) {
527 if (miiphy_write (devname
, addr
, reg
, data
) != 0) {
528 printf("Error writing to the PHY addr=%02x reg=%02x\n",
534 } else if (strncmp(op
, "du", 2) == 0) {
537 if ((reglo
> 5) || (reghi
> 5)) {
539 "The MII dump command only formats the "
540 "standard MII registers, 0-5.\n");
543 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
544 for (reg
= reglo
; reg
< reghi
+ 1; reg
++) {
545 if (miiphy_read(devname
, addr
, reg
, ®s
[reg
]) != 0) {
548 "Error reading from the PHY addr=%02x reg=%02x\n",
554 MII_dump_0_to_5(regs
, reglo
, reghi
);
557 } else if (strncmp(op
, "de", 2) == 0) {
561 miiphy_set_current_dev (argv
[2]);
563 printf("Usage:\n%s\n", cmdtp
->usage
);
568 * Save the parameters for repeats.
572 last_addr_lo
= addrlo
;
573 last_addr_hi
= addrhi
;
581 /***************************************************/
585 "mii - MII utility commands\n",
586 "device - list available devices\n"
587 "mii device <devname> - set current device\n"
588 "mii info <addr> - display MII PHY info\n"
589 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
590 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
591 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
592 "Addr and/or reg may be ranges, e.g. 2-7.\n"
595 #endif /* CONFIG_TERSE_MII */
597 #endif /* CFG_CMD_MII */